74LVC2G240DC-Q100H

74LVC2G240-Q100 Dual inverting buffer/line driver; 3-state Rev. 3 — 1 November 2018 Product data sheet 1. General description The 74LVC2G240-Q100 is a dual inverting buffer/line driver with 3-state outputs. The output enable inputs 1OE and 2OE, control the 3-state outputs. A HIGH level at pins nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G240-Q100 as a translator in a mixed 3.3 V and 5 V environment. It is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) ±24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2G240DP-Q100 -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC2G240DC-Q100 -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 4. Marking Table 2. Marking codes Type number Marking code [1] 74LVC2G240DP-Q100 V240 74LVC2G240DC-Q100 V40 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram EN 1OE 1A 1Y EN 2OE 2A 2Y 001aah782 Fig. 1. Logic symbol 74LVC2G240_Q100 Product data sheet 001aah783 Fig. 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 2 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state 6. Pinning information 6.1. Pinning 74LVC2G240-Q100 1OE 1 8 VCC 1A 2 7 2OE 2Y 3 6 1Y GND 4 5 2A aaa-015347 Fig. 3. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 6.2. Pin description Table 3. Pin description Symbol Pin Description 1OE 1 output enable input 1OE (active LOW) 1A 2 data input 2Y 3 data output GND 4 ground (0 V) 2A 5 data input 1Y 6 data output 2OE 7 output enable input 2OE (active LOW) VCC 8 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Output Input nOE nA nY L L H L H L H X Z 74LVC2G240_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 3 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +6.5 V -50 - -0.5 +6.5 V - ±50 mA VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current VO > VCC or VO < 0 V VO output voltage Enable mode [1] -0.5 VCC + 0.5 V Disable mode [1] -0.5 +6.5 V Power-down mode; VCC = 0 V [1] -0.5 +6.5 V VI < 0 V [1] IO output current - ±50 mA ICC supply current - 100 mA IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 300 mW [1] [2] VO = 0 V to VCC mA Tamb = -40 °C to +125 °C [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For TSSOP8 packages: above 55 °C the value of Ptot derates linearly at 2.5 mW/K. For VSSOP8 packages: above 110 °C the value of Ptot derates linearly at 8.0 mW/K. 9. Recommended operating conditions Table 6. Operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate 74LVC2G240_Q100 Product data sheet Conditions Min Max Unit 1.65 5.5 V 0 5.5 V VCC = 1.65 V to 5.5 V; Enable mode 0 VCC V VCC = 1.65 V to 5.5 V; Disable mode 0 5.5 V VCC = 0 V; Power-down mode 0 5.5 V -40 +125 °C VCC = 1.65 V to 2.7 V - 20 ns/V VCC = 2.7 V to 5.5 V - 10 ns/V All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 4 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH HIGH-level input voltage VIL LOW-level input voltage VOL LOW-level output voltage VOH HIGH-level output voltage Conditions Tamb = -40 °C to +85 °C VCC = 1.65 V to 1.95 V Tamb = -40 °C to +125 °C Min Typ [1] Max Min Max Unit 0.65VCC - - 0.65VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC - V VCC = 1.65 V to 1.95 V - - 0.35VCC - VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3VCC - 0.3VCC V IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.1 - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.70 V IO = 8 mA; VCC = 2.3 V - - 0.3 - 0.45 V IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.60 V IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.80 V IO = 32 mA; VCC = 4.5 V - - 0.55 - 0.80 V - - 0.35VCC V VI = VIH or VIL VI = VIH or VIL IO = -100 μA; VCC = 1.65 V to 5.5 V VCC - 0.1 - - VCC - 0.1 - V IO = -4 mA; VCC = 1.65 V 1.2 - - 0.95 - V IO = -8 mA; VCC = 2.3 V 1.9 - - 1.7 - V IO = -12 mA; VCC = 2.7 V 2.2 - - 1.9 - V IO = -24 mA; VCC = 3.0 V 2.3 - - 2.0 - V IO = -32 mA; VCC = 4.5 V 3.8 - - 3.4 - V II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - ±0.1 ±1 - ±1 μA IOZ OFF-state output current VI = VIH or VIL; VO = 5.5 V or GND; VCC = 3.6 V - ±0.1 ±2 - ±2 μA IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - ±0.1 ±2 - ±2 μA ICC supply current VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V - 0.1 4 - 4 μA ΔICC additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - 5 500 - 500 μA CI input capacitance - 2 - - - pF [1] Typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 74LVC2G240_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 5 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6. Symbol Parameter tpd propagation delay Conditions Tamb = -40 °C to +85 °C Min Typ [1] Max Min Max VCC = 1.65 V to 1.95 V 1.0 4.1 9.5 1.0 11.9 ns VCC = 2.3 V to 2.7 V 0.5 2.6 5.2 0.5 6.5 ns VCC = 2.7 V 1.0 3.0 5.5 1.0 6.9 ns VCC = 3.0 V to 3.6 V 0.5 2.5 4.6 0.5 5.8 ns 0.5 2.0 4.0 0.5 5.0 ns VCC = 1.65 V to 1.95 V 1.5 4.5 10.3 1.5 12.9 ns VCC = 2.3 V to 2.7 V 1.0 2.9 5.6 1.0 7.0 ns VCC = 2.7 V 1.5 3.4 5.6 1.5 7.0 ns VCC = 3.0 V to 3.6 V 0.5 2.5 4.7 0.5 5.9 ns VCC = 4.5 V to 5.5 V 0.5 2.0 3.8 0.5 4.8 ns VCC = 1.65 V to 1.95 V 1.0 3.5 11.6 1.0 14.1 ns VCC = 2.3 V to 2.7 V 0.5 1.9 5.8 0.5 7.6 ns VCC = 2.7 V 1.0 2.8 4.5 1.0 5.8 ns VCC = 3.0 V to 3.6 V 1.0 2.7 4.4 1.0 5.7 ns VCC = 4.5 V to 5.5 V 0.5 1.9 3.4 0.5 4.6 ns output enabled - 18 - - - pF output disabled - 5 - - - pF nA to nY; see Fig. 4 [2] VCC = 4.5 V to 5.5 V ten tdis CPD [1] [2] [3] [4] [5] enable time disable time power dissipation capacitance Tamb = Unit -40 °C to +125 °C nOE to nY; see Fig. 5 nOE to nY; see Fig. 5 per buffer; VI = GND to VCC [3] [4] [5] Typical values are measured at nominal VCC and at Tamb = 25 °C. tpd is the same as tPLH and tPHL ten is the same as tPZH and tPZL tdis is the same as tPLZ and tPHZ CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of outputs. 74LVC2G240_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 6 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state 11.1. Waveforms and test circuit VI VM nA input VM GND t PHL t PLH VOH VM VM nY output VOL mna960 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 4. The data input (nA) to output (nY) propagation delays VI nOE input VM GND t PLZ t PZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL t PHZ output HIGH-to-OFF OFF-to-HIGH VOH t PZH VY VM GND outputs enabled outputs enabled outputs disabled mna961 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. 3-state enable and disable times Table 9. Measurement points Supply voltage Input Output VCC VM VM VX VY 1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 2.3 V to 2.7 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 4.5 V to 5.5 V 0.5 × VCC 0.5 × VCC VOL + 0.3 V VOH - 0.3 V 74LVC2G240_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 7 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state VEXT VCC G VI RL VO DUT RT CL RL mna616 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 6. Test circuit for measuring switching times Table 10. Test data Supply voltage Input Load VCC VI CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 1.65 V to 1.95 V VCC 30 pF 1 kΩ open GND 2 × VCC 2.3 V to 2.7 V VCC 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 6V 3.0 V to 3.6 V 2.7 V 50 pF 500 Ω open GND 6V 4.5 V to 5.5 V VCC 50 pF 500 Ω open GND 2 × VCC 74LVC2G240_Q100 Product data sheet VEXT All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 8 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 pin 1 index (A3) A1 θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 Fig. 7. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Package outline SOT505-2 (TSSOP8) 74LVC2G240_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 9 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v w y 0.2 0.08 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 Fig. 8. References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Package outline SOT765-1 (VSSOP8) 74LVC2G240_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 10 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state 13. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC2G240_Q100 v.3 20181101 Product data sheet - Modifications: • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. 74LVC2G240_Q100 v.2 20161214 Modifications: • 74LVC2G240_Q100 v.1 20141015 74LVC2G240_Q100 Product data sheet 74LVC2G240_Q100 v.2 Product data sheet - 74LVC2G240_Q100 v.1 Table 7: The maximum limits for leakage current and supply current have changed. Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 - © Nexperia B.V. 2018. All rights reserved 11 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 15. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74LVC2G240_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 12 / 13 74LVC2G240-Q100 Nexperia Dual inverting buffer/line driver; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 11. Dynamic characteristics.............................................6 11.1. Waveforms and test circuit........................................ 7 12. Package outline.......................................................... 9 13. Abbreviations............................................................ 11 14. Revision history........................................................11 15. Legal information......................................................12 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 1 November 2018 74LVC2G240_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 1 November 2018 © Nexperia B.V. 2018. All rights reserved 13 / 13 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74LVC2G240DC-Q100H 74LVC2G240DP-Q100H