74CBTLV3126PW,118

74CBTLV3126 4-bit bus switch Rev. 5 — 9 October 2018 Product data sheet 1. General description The 74CBTLV3126 provides a 4-bit high-speed bus switch with separate output enable inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The switch is disabled (high-impedance OFF-state) when the output enable (nOE) input is LOW. To ensure the high-impedance OFF-state during power-up or power-down, nOE should be tied to the GND through a pull-down resistor. The minimum value of the resistor is determined by the current-sinking capability of the driver. Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits • • • • • • • • • • • • Supply voltage range from 2.3 V to 3.6 V Standard ’126’-type pinout High noise immunity Complies with JEDEC standard: • JESD8-5 (2.3 V to 2.7 V) • JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • CDM AEC-Q100-011 revision B exceeds 1000 V 5 Ω switch connection between two ports Rail to rail switching on data I/O ports CMOS low power consumption Latch-up performance exceeds 250 mA per JESD78B Class I level A IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C 74CBTLV3126 Nexperia 4-bit bus switch 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74CBTLV3126DS -40 °C to +125 °C SSOP16 [1] plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm SOT519-1 74CBTLV3126PW -40 °C to +125 °C TSSOP14 SOT402-1 74CBTLV3126BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm [1] Description Version plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT762-1 Also known as QSOP16. 4. Functional diagram 1OE 1A 1B 2OE 2A 2B 3OE 3A 3B 4OE 4A nA nOE 001aaj023 Fig. 1. Logic symbol 74CBTLV3126 Product data sheet nB 4B Fig. 2. 001aal245 Logic diagram (one switch) All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 2 / 17 74CBTLV3126 Nexperia 4-bit bus switch 5. Pinning information 5.1. Pinning 74CBTLV3126 74CBTLV3126 n.c. 1 16 VCC 1OE 2 15 4OE 1OE 1 14 VCC 1A 3 14 4A 1A 2 13 4OE 1B 4 13 4B 1B 3 12 4A 2OE 5 12 3OE 2OE 4 11 4B 2A 6 11 3A 2A 5 10 3OE 2B 7 10 3B 2B 6 9 3A GND 8 GND 7 8 3B 9 n.c. 001aal247 001aal246 Fig. 3. Pin configuration SOT519-1 (SSOP16) Fig. 4. Pin configuration SOT402-1 (TSSOP14) 1 terminal 1 index area 14 VCC 1OE 74CBTLV3126 1A 2 13 4OE 1B 3 12 4A 2OE 4 2A 5 2B 6 11 4B GND(1) 10 3OE 7 8 GND 3B 9 3A 001aal248 Transparent top view (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig. 5. Pin configuration SOT762-1 (DHVQFN14) 5.2. Pin description Table 2. Pin description Symbol Pin Description SOT519-1 SOT402-1 and SOT762-1 1OE, 2OE, 3OE, 4OE 2, 5, 12, 15 1, 4, 10, 13 output enable input 1A, 2A, 3A, 4A 3, 6, 11, 14 2, 5, 9, 12 A input/output 1B, 2B, 3B, 4B 4, 7, 10, 13 3, 6, 8, 11 B output/input GND 8 7 ground (0 V) VCC 16 14 supply voltage n.c. 1, 9 - not connected 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 3 / 17 74CBTLV3126 Nexperia 4-bit bus switch 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level. Output enable input nOE Function switch L OFF-state H ON-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +4.6 V VCC supply voltage VI input voltage control inputs [1] -0.5 +4.6 V VSW switch voltage enable and disable mode [2] -0.5 VCC + 0.5 V IIK input clamping current VI < -0.5 V -50 - mA ISK switch clamping current VI < -0.5 V -50 - mA ISW switch current VSW = 0 V to VCC - ±128 mA ICC supply current - +100 mA IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW Min Max Unit [1] [2] [3] Tamb = -40 °C to +125 °C [3] The minimum input voltage rating may be exceeded if the input clamping current ratings are observed. The switch voltage ratings may be exceeded if switch clamping current ratings are observed For SSOP16 and TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage 2.3 3.6 V VI input voltage control inputs 0 3.6 V VSW switch voltage enable and disable mode 0 VCC V Tamb ambient temperature -40 +125 °C Δt/ΔV input transition rise and fall rate 0 200 ns/V 74CBTLV3126 Product data sheet pin nOE; VCC = 2.3 V to 3.6 V All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 4 / 17 74CBTLV3126 Nexperia 4-bit bus switch 9. Static characteristics Table 6. Static characteristics At recommended operating conditions voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Min Typ [1] Max Min Max Unit HIGH-level input voltage VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 3.0 V to 3.6 V 2.0 - - 2.0 - V LOW-level input voltage VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 - 0.9 V II input leakage current pin nOE; VI = GND to VCC; VCC = 3.6 V - - ±1.0 - ±20 μA IS(OFF) OFF-state leakage current VCC = 3.6 V; see Fig. 6 - - ±1 - ±20 μA IS(ON) ON-state leakage VCC = 3.6 V; see Fig. 7 current - - ±1 - ±20 μA IOFF power-off leakage VI or VO = 0 V to 3.6 V; current VCC = 0 V - - ±10 - ±50 μA ICC supply current VI = GND or VCC; IO = 0 A; VSW = GND or VCC; VCC = 3.6 V - - 10 - 50 μA ΔICC additional supply current pin nOE; VI = VCC - 0.6 V; VSW = GND or VCC; VCC = 3.6 V - - 300 - 2000 μA CI input capacitance pin nOE; VCC = 3.3 V; VI = 0 V to 3.3 V - 0.9 - - - pF CS(OFF) OFF-state capacitance VCC = 3.3 V; VI = 0 V to 3.3 V - 5.2 - - - pF CS(ON) ON-state capacitance VCC = 3.3 V; VI = 0 V to 3.3 V - 14.3 - - - pF VIH VIL [1] [2] [2] All typical values are measured at Tamb = 25 °C. One input at 3 V, other inputs at VCC or GND. 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 5 / 17 74CBTLV3126 Nexperia 4-bit bus switch 9.1. Test circuits VCC VCC nOE VIL A VI IS nB nA nOE VIH IS A A GND VO VI nA IS nB GND VO 001aal249 001aal250 VI = VCC or GND and VO = GND or VCC. Fig. 6. VI = VCC or GND and VO = open circuit. Test circuit for measuring OFF-state leakage current (one switch) Fig. 7. Test circuit for measuring ON-state leakage current (one switch) 9.2. ON resistance Table 7. Resistance RON At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 8. Symbol Parameter RON ON resistance Conditions Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Unit Min Typ [1] Max Min Max ISW = 64 mA; VI = 0 V - 4.2 8.0 - 15.0 Ω ISW = 24 mA; VI = 0 V - 4.2 8.0 - 15.0 Ω ISW = 15 mA; VI = 1.7 V - 8.4 40.0 - 60.0 Ω ISW = 64 mA; VI = 0 V - 4.0 7.0 - 11.0 Ω ISW = 24 mA; VI = 0 V - 4.0 7.0 - 11.0 Ω ISW = 15 mA; VI = 2.4 V - 6.2 15.0 - 25.5 Ω VCC = 2.3 V to 2.7 V; see Fig. 9 to Fig. 11 [2] VCC = 3.0 V to 3.6 V; see Fig. 12 to Fig. 14 [1] [2] Typical values are measured at Tamb = 25 °C and nominal VCC. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals. 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 6 / 17 74CBTLV3126 Nexperia 4-bit bus switch 9.3. ON resistance test circuit and graphs 001aai109 11 RON (Ω) 9 7 VSW V (1) 5 VCC (3) nOE VIH nA (4) 3 nB GND VI ISW RON = VSW / ISW. Test circuit for measuring ON resistance (one switch) 001aai110 11 0 0.5 1.0 1.5 2.0 VI (V) 2.5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. 001aal251 Fig. 8. (2) RON (Ω) Fig. 9. ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 15 mA 001aai111 11 RON (Ω) 9 9 7 7 (1) (1) (2) 5 (2) 5 (3) (3) (4) 3 0 (4) 0.5 1.0 1.5 2.0 VI (V) 2.5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Product data sheet 0 0.5 1.0 1.5 2.0 VI (V) 2.5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 10. ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 24 mA 74CBTLV3126 3 Fig. 11. ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 64 mA All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 7 / 17 74CBTLV3126 Nexperia 4-bit bus switch 001aai105 8 001aai106 8 RON (Ω) RON (Ω) 6 6 (1) (1) (2) (2) (3) 4 (3) 4 (4) 2 0 (4) 1 2 3 VI (V) 2 4 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. 0 1 2 3 VI (V) 4 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 12. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 15 mA Fig. 13. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 24 mA 001aai107 7.5 RON (Ω) 6.5 5.5 (1) (2) 4.5 (3) 3.5 2.5 (4) 0 1 2 3 VI (V) 4 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 14. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 64 mA 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 8 / 17 74CBTLV3126 Nexperia 4-bit bus switch 10. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit see Fig. 18 Symbol Parameter tpd propagation delay ten enable time Conditions Tamb = -40 °C to +85 °C Min Typ [1] Max Min Max VCC = 2.3 V to 2.7 V - - 0.13 - 0.20 ns VCC = 3.0 V to 3.6 V - - 0.20 - 0.31 ns 1.0 2.5 4.5 1.0 6.0 ns 1.0 2.2 4.2 1.0 6.0 ns VCC = 2.3 V to 2.7 V 1.0 2.6 4.7 1.0 6.5 ns VCC = 3.0 V to 3.6 V 1.0 3.4 4.8 1.0 6.5 ns nA to nB or nB to nA; see Fig. 16 [2][3] nOE to nA or nB; see Fig. 17 [4] VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tdis [1] [2] [3] [4] [5] disable time Tamb = Unit -40 °C to +125 °C nOE to nA or nB; see Fig. 17 [5] All typical values are measured at Tamb = 25 °C and at nominal VCC. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). tpd is the same as tPLH and tPHL. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ. 10.1. Additional dynamic characteristics Table 9. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Symbol Parameter f(-3dB) -3 dB frequency response Conditions Tamb = 25 °C VI = GND or VCC; tr = tf ≤ 2.5 ns; VCC = 3.3 V; RL = 50 Ω; see Fig. 15 VCC Typ Max - 406 - MHz RL nB fi Min 0.5 VCC nOE VIH Unit nA GND dB aaa-025605 nOE connected to VCC; fi is biased at 0.5VCC. Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB. Fig. 15. Test circuit for measuring the frequency response when channel is in ON-state 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 9 / 17 74CBTLV3126 Nexperia 4-bit bus switch 10.2. Waveforms and test circuit VI VM input VM 0V tPHL tPLH VOH VM output VM VOL 001aai367 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 16. The data input (nA or nB) to output (nB or nA) propagation delays VI nOE input VM GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCC VM VX VOL tPHZ output HIGH-to-OFF OFF-to-HIGH VOH tPZH VY VM GND switch enabled switch disabled switch enabled 001aal252 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 17. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VI VM VX VY 2.3 V to 2.7 V 0.5VCC VCC 0.5VCC VOL + 0.15 V VOH - 0.15 V 3.0 V to 3.6 V 0.5VCC VCC 0.5VCC VOL + 0.3 V VOH - 0.3 V 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 10 / 17 74CBTLV3126 Nexperia 4-bit bus switch VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VEXT VCC G VI RL VO DUT RT CL RL 001aae331 Test data is given in Table 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 18. Test circuit for measuring switching times Table 11. Test data Supply voltage Load VEXT VCC CL RL tr = tf tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 2.3 V to 2.7 V 30 pF 500 Ω ≤ 2.0 ns open GND 2VCC 3.0 V to 3.6 V 50 pF 500 Ω ≤ 2.0 ns open GND 2VCC 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 11 / 17 74CBTLV3126 Nexperia 4-bit bus switch 11. Package outline SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm D E A SOT519-1 X c y HE v M A Z 9 16 A2 A (A 3 ) A1 θ Lp L 8 1 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp v w y Z (1) θ mm 1.73 0.25 0.10 1.55 1.40 0.25 0.31 0.20 0.25 0.18 5.0 4.8 4.0 3.8 0.635 6.2 5.8 1 0.89 0.41 0.2 0.18 0.09 0.18 0.05 8o 0o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-05-04 03-02-18 SOT519-1 Fig. 19. Package outline SOT519-1 (SSOP16) 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 12 / 17 74CBTLV3126 Nexperia 4-bit bus switch TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm D SOT402-1 E A X c y HE v M A Z 8 14 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 7 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig. 20. Package outline SOT402-1 (TSSOP14) 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 13 / 17 74CBTLV3126 Nexperia 4-bit bus switch DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm B D SOT762-1 A A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e v w b 2 6 C A B C y y1 C L 1 7 14 8 Eh e k 13 9 Dh X k 0 2 Dimensions (mm are the original dimensions) Unit max nom min mm A(1) 1 A1 b 0.05 0.30 0.02 0.25 0.00 0.18 4 mm scale c D(1) Dh E(1) Eh e e1 0.2 3.1 3.0 2.9 1.65 1.50 1.35 2.6 2.5 2.4 1.15 1.00 0.85 0.5 2 k L v 0.2 0.5 0.4 0.3 0.1 w y 0.05 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT762-1 References IEC JEDEC JEITA sot762-1_po European projection Issue date 15-04-10 15-05-05 MO-241 Fig. 21. Package outline SOT762-1 (DHVQFN14) 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 14 / 17 74CBTLV3126 Nexperia 4-bit bus switch 12. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 13. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74CBTLV3126 v.5 20181009 Product data sheet - Modifications: • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. 74CBTLV3126 v.4 20161108 Modifications: • 74CBTLV3126 v.3 20111215 Modifications: • 74CBTLV3126 v.2 20110104 74CBTLV3126 v.1 20100105 74CBTLV3126 Product data sheet 74CBTLV3126 v.4 Product data sheet - 74CBTLV3126 v.3 - 74CBTLV3126 v.2 Product data sheet - 74CBTLV3126 v.1 Product data sheet - - Section 10.1 added. Product data sheet Legal pages updated. All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 15 / 17 74CBTLV3126 Nexperia 4-bit bus switch 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74CBTLV3126 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. 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Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 16 / 17 74CBTLV3126 Nexperia 4-bit bus switch Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 3 6. Functional description................................................. 4 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................4 9. Static characteristics....................................................5 9.1. Test circuits..................................................................6 9.2. ON resistance..............................................................6 9.3. ON resistance test circuit and graphs..........................7 10. Dynamic characteristics............................................ 9 10.1. Additional dynamic characteristics.............................9 10.2. Waveforms and test circuit...................................... 10 11. Package outline........................................................ 12 12. Abbreviations............................................................ 15 13. Revision history........................................................15 14. Legal information......................................................16 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 9 October 2018 74CBTLV3126 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 17 / 17 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74CBTLV3126BQ,115 74CBTLV3126DS,118 74CBTLV3126PW,118