74HC166D,653

74HC166; 74HCT166 8-bit parallel-in/serial out shift register Rev. 4 — 28 December 2015 Product data sheet 1. General description The 74HC166; 74HCT166 is an 8-bit serial or parallel-in/serial-out shift register. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and a serial output (Q7). When the parallel enable input (PE) is LOW, the data from D0 to D7 is loaded into the shift register on the next LOW-to-HIGH transition of the clock input (CP). When PE is HIGH, data enters the register serially at DS with each LOW-to-HIGH transition of CP. When the clock enable input (CE) is LOW data is shifted on the LOW-to-HIGH transitions of CP. A HIGH on CE disables the CP input. Inputs include clamp diodes which enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits     Synchronous parallel-to-serial applications Synchronous serial input for easy expansion Complies with JEDEC standard no. 7A Input levels:  For 74HC166: CMOS level  For 74HCT166: TTL level  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package 74HC166D Temperature range Name Description Version 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT166D 74HC166DB 74HCT166DB 74HC166PW 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 4. Functional diagram   3( '6 65*      '  '  '  '  '  '  '  '    4 • & 0 5 ' ' '      05  &3 &(      DDD DDD Fig 1. Logic symbol Fig 2.   '       '  '  ' '  IEC logic symbol   ' ' ' 3( '6 05 &3 &( %,73$5$//(/6(5,$/,1 6(5,$/2876+,)75(*,67(5 4  DDD Fig 3. Functional diagram 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 2 of 20 xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx ' ' ' ' ' ' Nexperia 74HC_HCT166 Product data sheet ' ' 3( '6 Rev. 4 — 28 December 2015 &( 6 6 6 6 6 6 6 6 )) &3  )) &3  )) &3  )) &3  )) &3  )) &3  )) &3  &3 5 5' 5 5' 5 5' 5 5' 5 5' 5 5' 5 5' 5 5' ))  05 4 Fig 4. Logic diagram 3 of 20 74HC166; 74HCT166 DDD 8-bit parallel-in/serial out shift register All information provided in this document is subject to legal disclaimers. &3 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 5. Pinning information 5.1 Pinning +& +&7 '6   9&& '   3( '   ' '   4 '   ' &(   ' &3   ' *1'   05 DDD Fig 5. Pin configuration SO16 and (T)SSOP16 5.2 Pin description Table 2. Pin description Symbol Pin Description DS 1 serial data input D0 to D7 2, 3, 4, 5, 10, 11, 12, 14 parallel data inputs CE 6 clock enable input (active LOW) CP 7 clock input (LOW-to-HIGH edge-triggered) GND 8 ground (0 V) MR 9 asynchronous master reset (active LOW) Q7 13 serial output from the last stage PE 15 parallel enable input (active LOW) VCC 16 positive supply voltage 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 4 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 6. Functional description Function table[1] Table 3. Operating modes Inputs parallel load serial shift hold “do nothing” [1] Qn registers Output PE CE CP DS D0 to D7 Q0 Q1 to Q6 Q7 I I  X I L L to L L I I  X h H H to H H h I  l X L q0 to q5 q6 h I  h X H q0 to q5 q6 X H X X X q0 q1 to q6 q7 H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition; q = state of the referenced output one set-up time prior to the LOW-to-HIGH clock transition; X = don’t care;  = LOW-to-HIGH clock transition. &3 PRGH FRQWURO LQSXWV &( 05 '6 VKLIW ORDG ' + / ' ' + / ' SDUDOOHO LQSXWV ' + / ' RXWSXW ' + ' + 4 + VHULDOVKLIW + / + / / + + VHULDOVKLIW LQKLELW FOHDU Fig 6. ORDG DDD Typical clear, shift, load, inhibit, and shift sequences 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 5 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V) Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V - 20 mA - 20 mA - 25 mA 50 mA IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current 0.5 V < VO < VCC + 0.5 V ICC supply current - IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C SO16 package [2] - 500 mW (T)SSOP16 package [3] - 500 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 8 mW/K above 70 C. [3] Ptot derates linearly with 5.5 mW/K above 60 C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter VCC supply voltage Conditions 74HC166 74HCT166 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 - +125 40 - +125 C t/V input transition rise and fall rate - - 625 - - - VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 74HC_HCT166 Product data sheet VCC = 2.0 V All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © ns/V Nexperia B.V. 2017. All rights reserved 6 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V 74HC166 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V VI = VIH or VIL IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V VI = VIH or VIL IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A CI input capacitance - 3.5 - - - - - pF 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 7 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74HCT166 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 5.2 mA; VCC = 4.5 V - 0.16 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 4.5 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 4.5 V - - 8.0 - 80 - 160 A ICC additional supply current per input pin; VI = VCC  2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V Dn and DS inputs - 35 126 - 157.5 - 171.5 A CP and CE inputs - 80 288 - 360 - 392 A MR input - 40 144 - 180 - 196 A PE input - 60 216 - 270 - 294 A - 3.5 - - - - - pF CI input capacitance 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 8 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 10. Dynamic characteristics Table 7. Dynamic characteristics GND (ground = 0 V); tr = tf = 6 ns: CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 50 150 - 190 - 225 ns VCC = 4.5 V - 18 30 - 38 - 45 ns 74HC166 tpd propagation delay CP to Q7; see Figure 7 [1] VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns VCC = 6.0 V - 14 26 - 33 - 38 ns VCC = 2.0 V - 47 160 - 200 - 240 ns VCC = 4.5 V - 17 32 - 40 - 48 ns VCC = 5.0 V; CL = 15 pF - 14 - - - - - ns - 14 27 - 34 - 41 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns VCC = 2.0 V 80 17 - 100 - 120 - ns VCC = 4.5 V 16 6 - 20 - 24 - ns VCC = 6.0 V 14 5 - 17 - 20 - ns VCC = 2.0 V 100 25 - 125 - 150 - ns VCC = 4.5 V 20 9 - 25 - 30 - ns VCC = 6.0 V 17 7 - 21 - 26 - ns VCC = 2.0 V 0 19 - 0 - 0 - ns VCC = 4.5 V 0 7 - 0 - 0 - ns VCC = 6.0 V 0 6 - 0 - 0 - ns VCC = 2.0 V 80 14 - 100 - 120 - ns VCC = 4.5 V 16 5 - 20 - 24 - ns VCC = 6.0 V 14 4 - 17 - 20 - ns VCC = 2.0 V 100 33 - 125 - 150 - ns VCC = 4.5 V 20 12 - 25 - 30 - ns VCC = 6.0 V 17 10 - 21 - 26 - ns MR to Q7; see Figure 8 VCC = 6.0 V tt tW transition time pulse width [2] output; see Figure 7 CP input HIGH or LOW; see Figure 7 MR input LOW; see Figure 8 trec tsu recovery time MR to CP; see Figure 8 set-up time Dn, CE to CP; see Figure 9 PE to CP; see Figure 9 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 9 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register Table 7. Dynamic characteristics …continued GND (ground = 0 V); tr = tf = 6 ns: CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter th hold time 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 2 8 - 2 - 2 - ns VCC = 4.5 V 2 3 - 2 - 2 - ns VCC = 6.0 V 2 2 - 2 - 2 - ns VCC = 2.0 V 0 28 - 0 - 0 - ns VCC = 4.5 V 0 10 - 0 - 0 - ns VCC = 6.0 V 0 8 - 0 - 0 - ns Dn, CE to CP; see Figure 9 PE to CP; see Figure 9 fmax maximum frequency CP input; see Figure 7 VCC = 2.0 V 6 19 - 4.8 - 4 - MHz VCC = 4.5 V 30 57 - 24 - 20 - MHz - 63 - - - - - MHz 35 68 - 28 - 24 - MHz - 41 - - - - - pF VCC = 4.5 V - 23 40 - 50 - 60 ns VCC = 5.0 V; CL = 15 pF - 20 - - - - - ns VCC = 4.5 V - 22 40 - 50 - 60 ns VCC = 5.0 V; CL = 15 pF - 19 - - - - - ns - 7 15 - 19 - 22 ns 20 9 - 25 - 30 - ns 25 11 - 31 - 38 - ns 0 7 - 0 - 0 - ns 16 8 - 20 - 24 - ns 30 15 - 38 - 45 - ns 0 3 - 0 - 0 - ns 0 13 - 0 - 0 - ns VCC = 5.0 V; CL = 15 pF VCC = 6.0 V CPD power dissipation capacitance per package; VI = GND to VCC [3] CP to Q7; see Figure 7 [1] 74HCT166 tpd propagation delay MR to Q7; see Figure 8 tt tW [2] transition time output; see Figure 7 pulse width CP input HIGH or LOW; see Figure 7 VCC = 4.5 V VCC = 4.5 V MR input LOW; see Figure 8 VCC = 4.5 V trec recovery time MR to CP; see Figure 8 VCC = 4.5 V tsu set-up time Dn, CE to CP; see Figure 9 VCC = 4.5 V PE to CP; see Figure 9 VCC = 4.5 V th hold time Dn, CE to CP; see Figure 9 VCC = 4.5 V PE to CP; see Figure 9 VCC = 4.5 V 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 10 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register Table 7. Dynamic characteristics …continued GND (ground = 0 V); tr = tf = 6 ns: CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter fmax maximum frequency 25 C Conditions power dissipation capacitance [1] Min Typ Max Min Max Min Max 25 45 - 20 - 17 - MHz - 50 - - - - - MHz - 41 - - - - - pF CP input; see Figure 7 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF CPD 40 C to +85 C 40 C to +125 C Unit [3] per package; VI = GND to VCC tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz;  (CL  VCC2  fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in V. 11. Waveforms IPD[ 9, &3LQSXW 90 *1' W: W3+/ 92+ W3/+   90 4RXWSXW  92/ W7+/  W7/+ DDD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Clock (CP) to output (Q7) propagation delays, pulse width, output transition times and maximum frequency 74HC_HCT166 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 11 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 9, 90 05LQSXW *1' W: WUHF 9, 90 &3LQSXW *1' W3+/ 92+ 90 4RXWSXW 92/ DDD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 8. Master reset (MR) pulse width, MR to output (Q7) propagation delay and MR to clock (CP) recovery time. VHHQRWH 9, &(LQSXW 90 *1' WVX WVX WK 9, WVX WK WK 90 3(LQSXW *1' WVX WVX WK 9, WK VWDEOH 90 'QLQSXW *1' WVX WK 9, VWDEOH 90 '6LQSXW *1' WVX WK 9, &3LQSXW W: 90 *1' FRQGLWLRQ05 +,*+ DDD The shaded areas indicate when the input is permitted to change for predictable output performance Measurement points are given in Table 8. (1) CE may change only from HIGH-to-LOW while CP is LOW Fig 9. Set-up and hold times 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 12 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register Table 8. Measurement points Type Input Output VI VM 74HC166 VCC 0.5VCC 0.5VCC 74HCT166 3V 1.3 V 1.3 V 9, W:  QHJDWLYH SXOVH 90 90  9 WI WU WU WI 9,  SRVLWLYH SXOVH 9 VM 90 90  W: 9&& 9&& * 9, 92 5/ 6 RSHQ '87 &/ 57 DDG Test data is given in Table 10. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch Fig 10. Test circuit for measuring switching times Table 9. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH 74HC166 VCC 6 ns 15 pF, 50 pF 1 k open 74HCT166 3V 6 ns 15 pF, 50 pF 1 k open 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 13 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 12. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S  /  H Z 0 ES   GHWDLO; PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP                                                 LQFKHV         ș R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7(   Fig 11. Package outline SOT109-1 (SO16) 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 14 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S /   GHWDLO; Z 0 ES H   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 12. Package outline SOT338-1 (SSOP16) 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 15 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ SLQLQGH[ $  $ $ ș /S /   H GHWDLO; Z 0 ES   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 13. Package outline SOT403-1 (TSSOP16) 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 16 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT166 v.4 20151228 Product data sheet - 74HC_HCT166 v.3 Modifications: 74HC_HCT166 v.3 Modifications: 74HC_HCT166_CNV v.2 74HC_HCT166 Product data sheet • Type numbers 74HC166N and 74HCT166N (SOT38-4) removed. 20130911 Product data sheet - 74HC_HCT166_CNV v.2 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Family data added, see Section 9 “Static characteristics” December 1990 Product specification - All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 - © Nexperia B.V. 2017. All rights reserved 17 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT166 Product data sheet Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 18 of 20 74HC166; 74HCT166 Nexperia 8-bit parallel-in/serial out shift register Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74HC_HCT166 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 28 December 2015 © Nexperia B.V. 2017. All rights reserved 19 of 20 Nexperia 74HC166; 74HCT166 8-bit parallel-in/serial out shift register 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information. . . . . . . . . . . . . . . . . . . . . 19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 28 December 2015 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Nexperia: 74HC166D,652 74HC166DB,112 74HC166DB,118 74HC166D,653 74HC166PW,112 74HC166PW,118 74HCT166D,652 74HCT166DB,112 74HCT166DB,118 74HCT166D,653 74HC166D/AUJ