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MYC-CZU3EG-4E4D-1200-C

MYC-CZU3EG-4E4D-1200-C

  • 厂商:

    MYIR(米尔科技)

  • 封装:

    -

  • 描述:

    主芯片 MPSOC 核心板

  • 数据手册
  • 价格&库存
MYC-CZU3EG-4E4D-1200-C 数据手册
MYD-CZU3EG Development Board ➢ ➢ ➢ ➢ ➢ ➢ ➢ ➢ MYC-CZU3EG CPU Module as Controller Board Xilinx Zynq UltraScale+ ZU3EG MPSoC based on 1.2 GHz Quad Arm Cortex-A53 and 600MHz Dual Cortex-R5 Cores 4GB DDR4 SDRAM (64bit, 2400MHz) 4GB eMMC Flash, 128MB QSPI Flash USB 3.0, Gigabit Ethernet, CAN, TF, DisplayPort (DP), PCIe interface, SATA interface, JTAG... 2 x PMoD, 1 x FMC, 4 x SFP+ (only for EV MPSoCs), ARDUINO User Interface, HDMI, LCD Optional 7-inch LCD Modules and USB Camera Module Ready-to-Run Linux 4.9.0 Figure 1-1 MYD-CZU3EG development board The MYD-CZU3EG development board consists of the MYC-CZU3EG CPU Module and a specially designed base board to provide a complete and versatile platform for evaluating and prototyping based on Xilinx Zynq UltraScale+ MPSoC devices. The MYC-CZU3EG CPU Module is an Arm SOM with integrated XCZU3EG-1SFVC784E MPSoC, 4GB DDR4, 4GB eMMC, and 128MB QSPI Flash, Ethernet PHY, USB PHY and Intel Power Module. It is mounted on the MYD-CZU3EG base board through two 0.5mm pitch 160-pin Razor Beam High-Speed Sockets. The MYD-CZU3EG Zynq UltraScale+ ZU3EG MPSoC development board has extended a rich peripheral set and interfaces on the base board through connectors and headers including USB 3.0, Gigabit Ethernet, CAN, TF, DisplayPort (DP), PCIe interface, SATA interface, JTAG, HDMI, LCD interface, ARDUINO User Interface, PMoD, FMC, and four SFP+ interfaces (for EV MPSoCs only). The MYD-CZU3EG is capable of running Linux OS and comes with necessary cable accessories as well as detailed documentations and software package. Typical applications are the Internet, cloud computing, Data center, Machine Vision, Military facilities, Flight navigation and other embedded applications. 1 / 10 Figure 1-2 MYD-CZU3EG Development Board Figure 1-3 MYC-CZU3EG CPU Module 2 / 10 Hardware Specification Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing. Built on a common real-time processor and programmable logic equipped platform, three distinct variants include dual application processor (CG) devices, quad application processor and GPU (EG) devices, and video codec (EV) devices. Figure 1-4 Zynq UltraScale+ MPSoCs The Zynq UltraScale+ family provides footprint compatibility to enable users to migrate designs from one device to another. Any two packages with the same footprint identifier code (last letter and number sequence) are footprint compatible. MYIR is using the XCZU3EG-1SFVC784E MPSoC for MYD-CZU3EG by default, the C784 package covers the widest footprint compatibilities that enable users to select devices among CG, EG and EV. Figure 1-5 Zynq® UltraScale+™ MPSoC Device Migration Table 3 / 10 MYIR may also supply the MYD-CZU3EG development boards with XCZU2CG, XCZU3CG, XCZU4EV or XCZU5EV MPSoC as options. The main features for the MPSoC devices are summarized as below. Device XCZU2CG XCZU3CG XCZU3EG XCZU4EV XCZU5EV Logic cells (k) 103 154 154 192 256 CLB Flip-Flops (K) 94 141 141 176 234 CLB LUTs (K) 47 71 71 88 117 Block RAM (Mb) 5.3 7.6 7.6 4.5 5.1 UltraRAM (Mb) - - - 13.5 18.0 DSP Slices 240 360 360 728 1,248 GTX transceivers PS-GTR4x (6Gb/s) PS-GTR4x PS-GTR4x PS-GTR4x (6Gb/s), PS-GTR4x (6Gb/s), (6Gb/s) (6Gb/s) GTH4x (16.3Gb/s) GTH4x (16.3Gb/s) Processor Units Application Processor Unit Dual-core ARM® Cortex™-A53 MPCore™ up to 1.3GHz Memory w/ECC Quad-core ARM® Cortex™-A53 MPCore™ up to 1.5GHz L1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256KB Real-Time Processor Unit Dual-core ARM Cortex-R5 MPCore™ up to 600MHz Memory w/ECC L1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per core Graphics Processing Unit - - Video Codec - - Mali™-400 MP2 up to 667MHz - Memory L2 Cache H.264 / H.265 64KB External Memory, Connectivity, Integrated Block Functionality Dynamic Memory Interface x32/x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECC Static Memory Interfaces NAND, 2x Quad-SPI High-Speed Connectivity PCIe® Gen2 x4, 2x USB3.0, SATA 3.1, DisplayPort, 4x Tri-mode Gigabit Ethernet General Connectivity 2 x USB 2.0, 2 x SD/SDIO, 2 x UART, 2 x CAN 2.0B, 2 x I2C, 2 x SPI, 4 x 32b GPIO Power Management Full / Low / PL / Battery Power Domains Security AMS - System Monitor RSA, AES, and SHA 10-bit, 1MSPS – Temperature and Voltage Monitor Table 1-1 MPSoC device selection guide 4 / 10 Mechanical Parameters ✓ Dimensions: 60.00mm x 52.00mm (CPU Module), 195.33mm x 123.95mm (base board) ✓ PCB Layers: 12-layer design (CPU Module), 6-layer design (base board) ✓ Power supply: 3.3V (CPU Module), 12V (base board) ✓ Working temp.: 0~70 Celsius (commercial grade) The MYD-CZU3EG Controller Board (MYC-CZU3EG CPU Module) Figure 1-6 MYC-CZU3EG CPU Module Top-view Figure 1-7 MYC-CZU3EG CPU Module Bottom-view MPSoC ✓ Xilinx Zynq UltraScale+ XCZU3EG-1SFVC784E (ZU3EG, 784 Pin Package) MPSoC - 1.2 GHz 64 bit Quad-core ARM® Cortex™-A53 - 600MHz Dual-core ARM® Cortex™-R5 processor - 667MHz ARM Mali™-400MP2 Graphics Processor - 16nm FinFET+ FPGA fabric Memory ✓ 4GB DDR4 SDRAM (64bit, 2400MHz) ✓ 4GB eMMC Flash ✓ 128MB QSPI Flash Peripherals and Signals Routed to Pins ✓ ✓ ✓ ✓ ✓ ✓ MYC-CZU3EG Pinouts Description Gigabit Ethernet PHY USB PHY Intel Power Module Clock Generator Watchdog Four LEDs - One yellow LED for ERROR_STATUS indicator (indicate a secure lockdown state) - One yellow LED for ERROR_OUT indicator (Asserted for accidental power loss, hardware error) - One green LED for PS_Done indicator (indicate the pl configuration is done) - One green LED for PS_INIT indicator (indicate the ps is initialized after a power-on reset) 5 / 10 ✓ Two 0.5mm pitch 160-pin Razor Beam High-Speed headers bring out - 4 PS GTR transceivers along with 2 GTR reference clock inputs - PS JTAG interface, USB 2.0 interface, Gigabit Ethernet interface and etc. - 4 PL GTH transceivers along with 1 GTH reference clock inputs (only for Zynq UltraScale+ EV Devices) - 156 user PL I/O pins The MYD-CZU3EG Development Board Base Board (MYB-CZU3EG) Figure 1-8 MYD-CZU3EG Development Board Base Board PS Unit ✓ One USB 3.0 (Type-C interface) ✓ One USB to UART port ✓ One TF card slot ✓ One CAN interface ✓ One 10/100/1000Mbps Ethernet interface ✓ One PCIe interface ✓ One SATA interface ✓ One 2.54mm pitch 14-pin JTAG interface (PS, PL reused) ✓ Buttons (one user button, one system reset button and one ps-programming button) ✓ One DisplayPort (DP) ✓ Battery backed RTC PL Unit ✓ One Xilinx standard LPFMC interface ✓ One HDMI interface (signals reused with LCD/TSP interface) ✓ Four SFP+ transceiver interfaces (up to 10Gpbs, only for Zynq UltraScale+ EV Devices) ✓ Two-channel Pmod ✓ ARDUINO user interface ✓ LCD/TSP interface (24-bit RGB, supports resistive and capacitive touch screen panels) 6 / 10 ✓ Three LEDs - One blue LED for power indicator - One red LED for FPGA programming indicator - One green LED for user defined Function Block Diagram Figure 1-9 Function Block Diagram of MYD-CZU3EG 7 / 10 Dimension Chart Figure 1-10 Dimension Chart of MYC-CZU3EG (Top-view) Figure 1-11 Dimension Chart of MYD-CZU3EG 8 / 10 Software Features The MYD-CZU3EG Development Board is preloaded with Linux 4.9.0. MYIR provides software package in product disk along with the goods delivery. The software package features as below: Item Features Description Cross compiler gcc 5.2.1 gcc version 5.2.1 (Linaro GCC5.2) Boot program BOOT.BIN First boot program including FSBL, u-boot Linux Kernel Linux 4.9.0 Drivers File System Example Source code provided Customized kernel for MYD-CZU3EG Development Source code provided Board USB Host USB2.0/USB3.0 Host driver Source code provided Ethernet Gigabit Ethernet driver Source code provided MMC/SD/TF MMC/SD/TF card driver Source code provided CAN CAN driver Source code provided LCD Controller LCD driver Source code provided DP Controller DP Display driver Source code provided HDMI HDMI (SII902X chip) driver Source code provided Button Button driver Source code provided UART UART driver Source code provided I2C I2C driver Source code provided LED LED driver Source code provided GPIO GPIO driver Source code provided QSPI QSPI Flash MT25QU512ABB driver Source code provided Resistive Touch TSC2007 resistive touch screen driver Source code provided Capacitive Touch FT5X0X capacitive touch screen driver Source code provided SATA SATA HD driver Source code provided Watch dog Watch dog driver Source code provided Ramdisk Ramdisk system image File System Rootfs.tar Buildroot, including QT Source code provided Including button, LED, CAN, RS232, Socket examples Table 1-2 Software Features of MYD-CZU3EG 9 / 10 Remark Order Information Item Packing List ➢ MYD-CZU3EG Development Board (Part No.: MYD-CZU3EG-4E4D-1200-C) ➢ ➢ ➢ ➢ ➢ ➢ One MYD-CZU3EG Development Board (including the base board and CPU Module with installed active heatsink) One HDMI cable One 12V/5A Power adapter One 1.2m Micro USB2.0 cable One USB A 3.0 to Type-C cable Adapter One 16GB TF card One Product disk (including user manual, datasheet, base board schematic in PDF format and software packages) MYC-CZU3EG CPU Module (Part No.: MYC-CZU3EG-4E4D-1200-C) ➢ ➢ MYC-CZU3EG CPU Module One Product disk MY-LCD70TP LCD Module (Part No.: MY-TFT070RV2) 7-inch LCD Module with resistive touch screen MY-LCD70TP-C LCD Module (Part No.: MY-TFT070CV2) 7-inch LCD Module with capacitive touch screen MY-CAM002U Camera Module (Part No.: MY-CAM002U) USB Camera Module MYIR Tech Limited Room 04, 6th Floor, Building No.2, Fada Road, Yunli Smart Park, Bantian, Longgang District, Shenzhen, Guangdong, China 518129 E-mail: sales@myirtech.com Phone: +86-755-22984836 Fax: +86-755-25532724 Website: http://www.myirtech.com 10 / 10 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: MYIR Tech: MYD-CZU3EG-4E4D-1200-C
MYC-CZU3EG-4E4D-1200-C 价格&库存

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