PHB66NQ03LT,118

PHB/PHD66NQ03LT N-channel TrenchMOS™ logic level FET Rev. 06 — 2 August 2004 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode field effect transistor in a plastic package using TrenchMOS™ technology. 1.2 Features ■ Logic level threshold ■ Low on-state resistance. 1.3 Applications ■ DC-to-DC converters ■ General purpose switching. 1.4 Quick reference data ■ VDS ≤ 25 V ■ RDSon ≤ 10.5 mΩ ■ ID ≤ 66 A ■ Qgd = 3.6 nC (typ). 2. Pinning information Table 1: Discrete pinning Pin Description 1 gate (g) 2 drain (d) 3 source (s) mb mounting base; connected to drain (d) Simplified outline Symbol d mb mb [1] g mbb076 2 1 2 1 SOT404 [1] 3 (D2-PAK) 3 Top view SOT428 (D-PAK) It is not possible to make a connection to pin 2 of the SOT404 and SOT428 packages. s PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 3. Ordering information Table 2: Ordering information Type number Package Name Description Version PHB66NQ03LT D2-PAK Plastic single-ended surface mounted package (Philips version of 3 leads (one lead cropped) D2-PAK); SOT404 PHD66NQ03LT D-PAK Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped) SOT428 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage (DC) 25 °C ≤ Tj ≤ 175 °C - 25 V VDGR drain-gate voltage (DC) 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 25 V VGS gate-source voltage (DC) - ±20 V ID drain current (DC) - 57 A Tmb = 25 °C; VGS = 5 V; Figure 2 and 3 Tmb = 100 °C; VGS = 5 V; Figure 2 - 40 A Tmb = 25 °C; VGS = 10 V - 66 A Tmb = 100 °C; VGS = 10 V - 45 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 - 228 A Tmb = 25 °C; Figure 1 Ptot total power dissipation - 93 W Tstg storage temperature −55 +175 °C Tj junction temperature −55 +175 °C Source-drain diode IS source (diode forward) current (DC) Tmb = 25 °C - 57 A ISM peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs - 228 A - 90 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy unclamped inductive load; ID = 43 A; tp = 0.15 ms; VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; starting at Tj = 25 °C 9397 750 13429 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 2 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 03aa16 120 03aa24 120 Ider Pder (%) (%) 80 80 40 40 0 0 0 50 100 150 Tmb (°C) 200 P tot P der = ----------------------- × 100% P ° 0 50 100 150 200 Tmb (°C) ID I der = ------------------- × 100% I ° tot ( 25 C ) D ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Normalized continuous drain current as a function of mounting base temperature. 03ag19 103 ID (A) tp = 10 µ s Limit RDSon = VDS / ID 102 100 µ s DC 10 1 ms 10 ms 100 ms 1 1 10 VDS (V) 102 Tmb = 25 °C; IDM is single pulse; VGS = 5 V Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 13429 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 3 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 5. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Figure 4 - - 1.6 K/W SOT404 mounted on a printed-circuit board; minimum footprint; vertical in still air - 50 - K/W SOT428 mounted on a printed-circuit board; minimum footprint; vertical in still air - 75 - K/W mounted on a printed-circuit board; SOT404 minimum footprint; vertical in still air - 50 - K/W Rth(j-mb) thermal resistance from junction to mounting base Rth(j-a) thermal resistance from junction to ambient 5.1 Transient thermal impedance 03ag18 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 10-1 δ= P 0.05 tp T 0.02 single pulse t tp T 10-2 10-5 10-4 10-3 10-2 10-1 1 tp (s) 10 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. 9397 750 13429 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 4 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 6. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Tj = 25 °C 25 - - V Tj = −55 °C 22 - - V Static characteristics V(BR)DSS VGS(th) IDSS drain-source breakdown voltage gate-source threshold voltage drain-source leakage current ID = 250 µA; VGS = 0 V ID = 1 mA; VDS = VGS; Figure 9 and 10 Tj = 25 °C 1 1.5 2 V Tj = 175 °C 0.5 - - V Tj = −55 °C - - 2.2 V Tj = 25 °C - - 10 µA Tj = 175 °C - - 500 µA - 10 100 nA Tj = 25 °C - 9.1 10.5 mΩ Tj = 175 °C - 16.4 18.9 mΩ VGS = 5 V; ID = 25 A; Figure 6 and 8 - 11.2 13.6 mΩ ID = 50 A; VDS = 15 V; VGS = 5 V; Figure 11 - 12 - nC - 4.5 - nC - 3.6 - nC - 860 - pF - 330 - pF - 145 - pF - 15 25 ns - 90 135 ns VDS = 25 V; VGS = 0 V IGSS gate-source leakage current VGS = ±15 V; VDS = 0 V RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Figure 6 and 8 Dynamic characteristics Qg(tot) total gate charge Qgs gate-source charge Qgd gate-drain (Miller) charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) turn-off delay time - 25 40 ns tf fall time - 25 40 ns - 0.95 1.2 V VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 13 VDS = 15 V; RL = 0.6 Ω; VGS = 5 V; RG = 5.6 Ω Source-drain diode VSD source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12 trr reverse recovery time Qr recovered charge IS = 10 A; dIS/dt = −100 A/µs; VGS = 0 V; VR = 25 V 9397 750 13429 Product data sheet - 32 - ns - 20 - nC © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 5 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 03ag20 80 Tj = 25 °C ID (A) 10 V 6 V 5 V 03ag21 25 RDSon (mΩ) 4.5 V Tj = 25 °C VGS = 4.5 V 20 60 4V 15 5V 40 6V 10 10 V 3.5 V 20 5 VGS = 3 V 0 0 0 0.5 1 1.5 VDS (V) 2 0 Tj = 25 °C 20 40 60 ID (A) 80 Tj = 25 °C Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function of drain current; typical values. 03ag22 80 03af18 2 VDS > ID x RDSon ID (A) a 60 1.5 40 1 20 0.5 Tj = 25 °C 175 °C 0 0 1 2 3 4 VGS (V) 5 Tj = 25 °C and 175 °C; VDS > ID x RDSon 0 -60 60 120 Tj (°C) 180 R DSon a = ---------------------------R DSon ( 25 °C ) Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. 9397 750 13429 Product data sheet 0 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 6 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 03aa33 2.5 VGS(th) (V) 2 1.5 03aa36 10-1 ID (A) max 10-2 typ 10-3 min 10-5 0.5 0 -60 max 10-4 min 1 typ 10-6 0 60 120 Tj (°C) 0 180 1 2 VGS (V) 3 Tj = 25 °C; VDS = 5 V ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 03ag25 10 Tj = 25 °C ID = 50 A VDD = 15 V VGS (V) 8 6 4 2 0 0 10 20 QG (nC) 30 ID = 50 A; VDS = 15 V Fig 11. Gate-source voltage as a function of gate charge; typical values. 9397 750 13429 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 7 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 03ag23 80 03ag24 104 VGS = 0 V IS (A) C (pF) 60 103 40 Ciss Coss 20 175 °C Tj = 25 °C Crss 0 0 0.3 0.6 0.9 VSD (V) 1.2 Tj = 25 °C and 175 °C; VGS = 0 V 102 10-1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. 9397 750 13429 Product data sheet 1 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 8 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 7. Package outline Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped) SOT404 A A1 E mounting base D1 D HD 2 Lp 1 3 c b e e Q 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b c D max. D1 E e Lp HD Q mm 4.50 4.10 1.40 1.27 0.85 0.60 0.64 0.46 11 1.60 1.20 10.30 9.70 2.54 2.90 2.10 15.80 14.80 2.60 2.20 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 99-06-25 01-02-12 SOT404 Fig 14. SOT404 (D2-PAK) package outline. 9397 750 13429 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 9 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped) SOT428 seating plane y A E A2 A A1 b2 E1 mounting base D1 D HE L2 2 L1 L 1 3 b1 w M A b c e e1 0 10 20 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1(1) A2 b b1 b2 c D D1 min. E mm 2.38 2.22 0.65 0.45 0.93 0.73 0.89 0.71 1.1 0.9 5.46 5.26 0.4 0.2 6.22 5.98 4.0 6.73 6.47 E1 e e1 4.81 2.285 4.57 4.45 HE L L1 min. L2 w y max. 10.4 9.6 2.95 2.55 0.5 0.9 0.5 0.2 0.2 Note 1. Measured from heatsink back to lead. OUTLINE VERSION SOT428 REFERENCES IEC JEDEC JEITA TO-252 SC-63 EUROPEAN PROJECTION ISSUE DATE 99-09-13 01-12-11 Fig 15. SOT428 (D-PAK) package outline. 9397 750 13429 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 10 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 8. Revision history Table 6: Revision history Document ID Release date PHB_PHD66NQ03LT_6 20040802 Product data sheet Modifications: • • Data sheet Change status notice - Document number Supersedes 9397 750 13429 PHP_PHB_PHD66NQ03LT_5 Removal of PHP66NQ03LT (now in separate data sheet) Data sheet updated to latest standard. PHP_PHB_PHD66NQ03LT_5 20040415 Product data sheet - 9397 750 13107 PHP_PHB_PHD66NQ03LT_4 PHP_PHB_PHD66NQ03LT_4 20020909 Product data sheet - 9397 750 10158 PHP_PHB_PHD66NQ03LT_3 PHP_PHB_PHD66NQ03LT_3 20020312 Product data sheet - 9397 750 09284 PHP_PHB_PHD66NQ03LT_2 PHP_PHB_PHD66NQ03LT_2 20011210 Product data sheet - 9397 750 09119 PHP_PHB_PHD66NQ03LT_1 PHP_PHB_PHD66NQ03LT_1 20011012 Product data sheet - 9397 750 08725 - 9397 750 13429 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 11 of 13 PHB/PHD66NQ03LT Philips Semiconductors N-channel TrenchMOS™ logic level FET 9. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 10. Definitions customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 12. Trademarks TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V. 11. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 13. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 13429 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 06 — 2 August 2004 12 of 13 Philips Semiconductors PHB/PHD66NQ03LT N-channel TrenchMOS™ logic level FET 14. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 5.1 6 7 8 9 10 11 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information . . . . . . . . . . . . . . . . . . . . 12 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 2 August 2004 Document order number: 9397 750 13429 Published in The Netherlands