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STC12LE2052AD series MCU
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STC MCU Limited
www.STCMCU.com
Update date: 2011-7-15
STC MCU Limited.
website:www.STCMCU.com
CONTENTS
Chapter 1. Introduction.................................................................7
1.1 Features.................................................................................................. 7
1.2 Block diagram........................................................................................ 8
1.3 Pin Configurations . ............................................................................... 9
1.4 STC12C2052AD series Selection Table.............................................. 10
1.5 STC12C2052AD series Minimum Application System........................11
1.6 STC12C2052AD series MCU Typical Application Circuit for ISP..... 12
1.7 Pin Descriptions................................................................................... 14
1.8 Package Dimension Drawings.............................................................. 16
1.9 STC12C2052AD series MCU naming rules........................................ 18
1.10 Global Unique Identification Number (ID)........................................ 19
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Chapter 2. Clock, Power Management and Reset....................22
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2.1 Clock.................................................................................................... 22
2.1.1
2.1.2
2.1.3
2.1.4
On-Chip R/C Clock and External Crystal/Clcok are Optional in STC-ISP.exe 22
Divider for System Clock ................................................................................... 23
How to Know Internal RC Oscillator frequency(Internal clock frequency) ...... 24
Programmable Clock Output............................................................................... 27
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2.1.4.1 Timer 0 Programmable Clock-out on P1.0........................................................................ 28
2.1.4.2 Timer 1 Programmable Clock-out on P1.1........................................................................ 29
2.2 Power Management Modes.................................................................. 30
2.2.1 Slow Down Mode................................................................................................ 31
2.2.2 Idle Mode............................................................................................................. 32
2.2.3 Stop / Power Down (PD) Mode and Demo Program (C and ASM).................... 33
2.3 RESET Sources.................................................................................... 39
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
RESET Pin........................................................................................................... 39
Software RESET.................................................................................................. 39
Power-On Reset (POR)........................................................................................ 40
MAX810 power-on-Reset delay.......................................................................... 40
Internal Low Voltage Detection Reset................................................................. 41
Watch-Dog-Timer................................................................................................ 44
Warm Boot and Cold Boot Reset......................................................................... 48
Chapter 3. Memory Organization..............................................49
3.1 Program Memory................................................................................. 49
3.2 Data Memory(SRAM).......................................................................... 50
3.3 Special Function Registers................................................................... 53
3.3.1 Special Function Registers Address Map............................................................ 53
3.3.2 Special Function Registers Bits Description....................................................... 54
Chapter 4. Configurable I/O Ports of STC12C2052AD series 58
4.1 I/O Ports Configurations...................................................................... 58
4.2 I/O ports Modes.................................................................................... 60
4.2.1
4.2.2
4.2.3
4.2.4
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Quasi-bidirectional I/O........................................................................................ 60
Push-pull Output.................................................................................................. 61
Input-only (High-Impedance) Mode................................................................... 61
Open-drain Output............................................................................................... 61
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4.3 I/O port application notes..................................................................... 62
4.4 Typical transistor control circuit........................................................... 62
4.5 Typical diode control circuit................................................................. 62
4.6 3V/5V hybrid system............................................................................ 63
4.7 How to make I/O port low after MCU reset......................................... 64
4.8 I/O status while PWM outputing.......................................................... 64
4.9 I/O drive LED application circuit......................................................... 65
4.10 I/O immediately drive LCD application circuit................................. 66
4.11 Using A/D Conversion to scan key application circuit....................... 67
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Chapter 5. Instruction System....................................................68
5.1 Addressing Modes................................................................................ 68
5.2 Instruction Set Summary...................................................................... 69
5.3 Instruction Definitions.......................................................................... 74
Chapter 6. Interrupt System..................................................... 111
6.1
6.2
6.3
6.4
6.5
6.6
Interrupt Structure...............................................................................113
Interrupt Register.................................................................................115
Interrupt Priorities.............................................................................. 125
How Interrupts Are Handled.............................................................. 126
External Interrupts............................................................................. 127
Response Time.................................................................................. 131
6.7 Demo Programs about Interrupts (C and ASM)................................. 132
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.6
External Interrupt 0 (INT0 ) Demo Programs (C and ASM)............................ 132
External Interrupt 1 (INT1 ) Demo Programs (C and ASM)............................ 136
Programs of P3.4/T0 Interrupt(falling edge) used to wake up PD mode.......... 140
Programs of P3.5/T1 Interrupt(falling edge) used to wake up PD mode.......... 142
Program of P3.0/RxD Interrupt(falling edge) used to wake up PD mode......... 144
Program of PCA Interrupt used to wake up Power Down mode....................... 147
Chapter 7. Timer/Counter 0/1..................................................151
7.1 Special Function Registers about Timer/Counter............................... 151
7.2 Timer/Counter 0 Mode of Operation (Compatible with traditional 8051 MCU).........155
7.2.1
7.2.2
7.2.3
7.2.4
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Mode 0 (13-bit Timer/Counter)......................................................................................155
Mode 1 (16-bit Timer/Counter) and Demo Programs (C and ASM).............................. 156
Mode 2 (8-bit Auto-Reload Mode) and Demo Programs (C and ASM)......................... 160
Mode 3 (Two 8-bit Timers/Couters)............................................................................... 163
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7.3 Timer/Counter 1 Mode of Operation.................................................. 164
7.3.1 Mode 0 (13-bit Timer/Counter)......................................................................................164
7.3.2 Mode 1 (16-bit Timer/Counter) and Demo Programs (C and ASM).............................. 165
7.3.3 Mode 2 (8-bit Auto-Reload Mode) and Demo Programs (C and ASM)......................... 169
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7.4 Programmable Clock Output and Demo Programs (C and ASM)..... 172
7.4.1 Timer 0 Programmable Clock-out on P1.0 and Demo Program(C and ASM).. 174
7.4.2 Timer 1 Programmable Clock-out on P1.1 and Demo Program(C and ASM).. 177
7.5 Application note for Timer in practice............................................... 180
Chapter 8. UART with Enhanced Function............................181
8.1 Special Function Registers about UART............................................ 181
8.2 UART Operation Modes ................................................................... 185
8.2.1
8.2.2
8.2.3
8.2.4
8.3
8.4
8.5
8.6
8.7
Mode 0: 8-Bit Shift Register............................................................................. 185
Mode 1: 8-Bit UART with Variable Baud Rate................................................. 187
Mode 2: 9-Bit UART with Fixed Baud Rate..................................................... 189
Mode 3: 9-Bit UART with Variable Baud Rate................................................. 191
Frame Error Detection........................................................................ 193
Multiprocessor Communications....................................................... 193
Automatic Address Recognition......................................................... 194
Buad Rates.......................................................................................... 196
Demo Programs about UART (C and ASM)...................................... 197
Chapter 9. Analog to Digital Converter...................................203
9.1
9.2
9.3
9.4
9.5
9.6
9.7
A/D Converter Structure..................................................................... 203
Registers for ADC.............................................................................. 205
Application Circuit of A/D Converter ............................................... 208
ADC Application Circuit for Key Scan.............................................. 209
A/D reference voltage source............................................................. 210
Program using interrupts to demostrate A/D Conversion ..................211
Program using polling to demostrate A/D Conversion ..................... 217
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Chapter 10. Programmable Counter Array(PCA).................223
10.1 SFRs related with PCA..................................................................... 223
10.2 PCA/PWM Structure........................................................................ 228
10.3 PCA Modules Operation Mode....................................................... 230
10.3.1
10.3.2
10.3.3
10.3.4
10.4
10.5
10.6
10.7
10.8
10.9
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PCA Capture Mode.......................................................................................... 230
16-bit Software Timer Mode........................................................................... 231
High Speed Output Mode................................................................................ 232
Pulse Width Modulator Mode (PWM mode).................................................. 233
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Programs for PCA module extended external interrupt .................. 234
Demo Programs for PCA module acted as 16-bit Timer . ............... 238
Programs for PCA module as 16-bit High Speed Output................. 242
Demo Programs for PCA module as PWM Output . ....................... 246
Demo Program for PCA clock base on Timer 1 overflow rate....... 250
Using PWM achieve D/A Conversion function reference circuit.... 254
Chapter 11. Serial Peripheral Interface (SPI).........................255
11.1 Special Function Registers related with SPI..................................... 255
11.2 SPI Structure..................................................................................... 258
11.3 SPI Data Communication................................................................. 259
11.3.1 SPI Configuration............................................................................................ 259
11.3.2 SPI Data Communication Modes.................................................................... 260
11.3.3 SPI Data Modes............................................................................................... 262
11.4 SPI Function Demo Programs (Single Master — Single Slave)...... 264
11.4.1 SPI Function Demo Programs using Interrupts (C and ASM)......................... 264
11.4.2 SPI Function Demo Programs using Polling (C and ASM)............................. 270
11.5 SPI Function Demo Programs (Each other as the Master-Slave)..... 276
11.5.1 SPI Function Demo Programs using Interrupts (C and ASM)......................... 276
11.5.2 SPI Function Demo Programs using Polling................................................... 282
Chapter 12. IAP / EEPROM.....................................................288
12.1
12.2
12.3
12.4
IAP / EEPROM Special Function Registers.................................... 289
STC12C2052AD series Internal EEPROM Allocation Table.......... 292
IAP/EEPROM Assembly Language Program Introduction............. 293
EEPROM Demo Program (C and ASM).......................................... 296
13.1
13.2
13.3
13.4
13.5
In-System-Programming (ISP) principle.......................................... 304
STC12C2052AD series Typical Application Circuit for ISP........... 305
PC side application usage................................................................. 307
Compiler / Assembler Programmer and Emulator........................... 309
Self-Defined ISP download Demo.................................................. 309
Chapter 13. STC12 series Development/Programming Tool 304
Appendix A: Assembly Language Programming....................313
Appendix B: 8051 C Programming..........................................335
Appendix C: STC12C2052AD series Electrical Characteristics
...............................................................................345
Appendix D: Program for indirect addressing inner 256B RAM
...............................................................................347
Appendix E: Using Serial port expand I/O interface.............348
Appendix F: Use STC MCU common I/O driving LCD Display
...............................................................................350
Appendix G: LED driven by an I/O port and Key Scan.........357
Appendix H: How to reduce the Length of Code through Keil C
...............................................................................358
Appendix I: Notes of STC12C2052AD series Application.....359
Appendix J: Notes of STC12 series Replaced Traditional 8051..
...............................................................................360
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Chapter 1. Introduction
STC12C2052AD is a single-chip microcontroller based on a high performance 1T architecture 8051 CPU, which
is produced by STC MCU Limited. With the enhanced kernel, STC12C2052AD executes instructions in 1~6
clock cycles (about 8~12 times the rate of a standard 8051 device), and has a fully compatible instruction set with
industrial-standard 8051 series microcontroller. In-System-Programming (ISP) and In-Application-Programming
(IAP) support the users to upgrade the program and data in system. ISP allows the user to download new code
without removing the microcontroller from the actual end product; IAP means that the device can write nonvalatile data in Flash memory while the application program is running. The STC12C2052AD retains all features
of the standard 80C51. In addition, the STC12C2052AD has a 9-sources, 4-priority-level interrupt structure, 8-bit
ADC (100 thousands times per second), on-chip crystal oscillator, MAX810 special reset circuit, 2-channel PCA
and PWM, SPI, a one-time enabled Watchdog Timer and so on.
1.1 Features
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Enhanced 8051 Central Processing Unit ,1T per machine cycle, faster 8~12 times than the rate of a standard
8051.
Operating voltage range: 5.5V ~ 3.5V or 2.2V ~ 3.6V (STC12LE2052AD).
Operating frequency range: 0- 35MHz, is equivalent to standard 8051:0~420MHz
On-chip 1K/2K/3K/4K/5K... FLASH program memory with flexible ISP/IAP capability
On-chip 256 byte RAM
Power control: idle mode(can be waked up by any interrupt) and power-down mode(can be waked up by
external interrupts).
Code protection for flash memory access
Excellent noise immunity, very low power consumption
Four 16-bit timer/counter, be compatible with Timer0/Timer1 of standard 8051, 2-channel PCA can be
available as two timers.
9 vector-address, 4 level priority interrupt capability
One enhanced UART with hardware address-recognition and frame-error detection function
One 15 bits Watch-Dog-Timer with 8-bit pre-scaler (one-time-enabled)
SPI Master/Slave communication interface
Two channel Programmable Counter Array (PCA)
8-bit, 8-channel high-speed Analog-to-Digital Converter (ADC), up to 100 thousands times per second
Simple internal RC oscillator and external crystal clock
Three power management modes: idle mode, slow down mode and power-down mode
Power down mode can be woken-up by P3.2/INT0, P3.3/INT1, P3.4/T0, P3.5/T1, P3.0/RxD, P3.7/PCA0, and
P3.5/PCA1
Operation Temperature: -40 ~ + 85℃ (industrial) / 0 ~ 75℃ (Commercial)
15 common programmable I/O ports are available
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• Programmable clock output Function. T0 output the clock on P1.0, T1 output the clock on P1.1.
• Five package type : SOP-20, DIP-20, LSSOP-20.
STC MCU Limited.
website:www.STCMCU.com
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1.2 Block diagram
The CPU kernel of STC12C2052AD is fully compatible to the standard 8051 microcontroller, maintains all
instruction mnemonics and binary compatibility. With some great architecture enhancements, STC12C2052AD
executes the fastest instructions per clock cycle. Improvement of individual programs depends on the actual
instructions used.
RAM
256B
B Register
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Stack
Pointer
ACC
TMP2
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TMP1
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ALU
C
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LVD/LVR
Control
Unit
RESET
Timer 0/1
Enhanced
UART
WDT
PSW
ISP/IAP
Address
Generator
Program
Counter
PCA
(2-channel)
Port 3
Latch
Port1 Latch
FLASH
SPI
ADC
XTAL1
XTAL2
Port 1 Driver
8
P1.0 ~ P1.7
P1.0 ~ P1.7
Port 3
Driver
P3
STC12C2052AD Block Diagram
STC MCU Limited.
website:www.STCMCU.com
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1.3 Pin Configurations
All packages meet the European Union RoHS standards. LQFP-32 also conform to the Green standard.
Packages such as SOP-20 are strongly recommended though the traditional DIP packages are steady supplied.
20
VCC
RST
1
20
VCC
2
19
P1.7/SCLK/ADC7
RxD/P3.0
2
19
P1.7/SCLK
TxD/P3.1
3
18
P1.6/MISO/ADC6
TxD/P3.1
3
18
P1.6/MISO
XTAL2
4
17
P1.5/MOSI/ADC5
XTAL2
4
17
P1.5/MOSI
XTAL1
5
16
P1.4/SS/ADC4
XTAL1
5
16
P1.4/SS
INT0/P3.2
6
15
P1.3/ADC3
15
P1.3
INT1/P3.3
7
14
P1.2/ADC2
14
P1.2
ECI/T0/P3.4
8
13
13
P1.1/CLKOUT1
PWM1/PCA1/T1/P3.5
9
10
Gnd
INT0/P3.2
6
INT1/P3.3
7
P1.1/ADC1/CLKOUT1
ECI/T0/P3.4
8
12
P1.0/ADC0/CLKOUT0
PWM/PCA1/T1/P3.5
9
12
P1.0/CLKOUT0
11
P3.7/PCA0/PWM0
10
11
P3.7/PCA0/PWM0
15 I/O ports
STC12C2052AD series (with A/D Converter),20-Pin
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Super small package : TSSOP-20, 6.4mm×6.4mm
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STC MCU Limited.
SOP-20 / DIP-20
TSSOP-20
1
SOP-20 / DIP-20
TSSOP-20
RST
RxD/P3.0
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Gnd
STC12C2052 series (without A/D Converter),20-Pin
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1.4 STC12C2052AD series Selection Table
Type
1T 8051
MCU
16-bit
U
Operation
PCA/
W
Flash SRAM Timer PCA Programmable A EEP 8-bit A/D D Built-in SPI
Voltage (Byte)
(Byte) T0&T1 Timer Clock Output R ROM
8-ch
Reset
(V)
PWM
T
T
D/A
Package of 20-Pin
(15 I/O ports)
STC12C2052AD series Selection Table
STC12C1052
5.5-3.5
1K
256
Y
2
Y
Y
Y
2-ch
Y
Y
Y
SOP/LSSOP/DIP
STC12C1052AD
5.5-3.5
1K
256
Y
2
Y
Y
Y
2-ch
8-bit Y
Y
Y
SOP/LSSOP/DIP
STC12C2052
5.5-3.5
2K
256
Y
2
Y
Y
Y
2-ch
Y
Y
Y
SOP/LSSOP/DIP
STC12C2052AD
5.5-3.5
2K
256
Y
2
Y
Y
Y
2-ch
8-bit Y
Y
Y
SOP/LSSOP/DIP
STC12C3052
5.5-3.5
3K
256
Y
2
Y
Y IAP
2-ch
Y
Y
Y
SOP/LSSOP/DIP
STC12C3052AD
5.5-3.5
3K
256
Y
2
Y
Y
Y
2-ch
8-bit Y
Y
Y
SOP/LSSOP/DIP
STC12C4052
5.5-3.5
4K
256
Y
2
Y
Y
Y
2-ch
Y
Y
Y
SOP/LSSOP/DIP
STC12C4052AD
5.5-3.5
4K
256
Y
2
Y
Y
Y
2-ch
8-bit Y
Y
Y
SOP/LSSOP/DIP
STC12C5052
5.5-3.5
5K
256
Y
2
Y
Y
2-ch
Y
Y
STC12C5052AD
5.5-3.5
6K
256
Y
2
Y
Y
8-bit Y
Y
Y Application program
can be modified in
Y application program
area (AP area)
STC12LE1052
3.6-2.2
1K
256
Y
STC12LE1052AD
3.6-2.2
1K
256
Y
STC12LE2052
3.6-2.2
2K
256
Y
STC12LE2052AD
3.6-2.2
2K
256
Y
STC12LE3052
3.6-2.2
3K
256
STC12LE3052AD
3.6-2.2
3K
STC12LE4052
3.6-2.2
STC12LE4052AD
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2-ch
STC12LE2052AD series Selection Table
2
Y
Y
Y
2-ch
Y
Y
Y
SOP/LSSOP/DIP
2
Y
Y
Y
2-ch
8-bit Y
Y
Y
SOP/LSSOP/DIP
2
Y
Y
Y
2-ch
Y
Y
Y
SOP/LSSOP/DIP
2
Y
Y
Y
2-ch
8-bit Y
Y
Y
SOP/LSSOP/DIP
Y
2
Y
Y
Y
2-ch
Y
Y
Y
SOP/LSSOP/DIP
256
Y
2
Y
Y
Y
2-ch
8-bit Y
Y
Y
SOP/LSSOP/DIP
4K
256
Y
2
Y
Y
Y
2-ch
Y
Y
Y
SOP/LSSOP/DIP
3.6-2.2
4K
256
Y
2
Y
Y
Y
2-ch
8-bit Y
Y
Y
SOP/LSSOP/DIP
STC12LE5052
3.6-2.2
5K
256
Y
2
Y
Y
Y
2-ch
Y
Y
STC12LE5052AD
3.6-2.2
5K
256
Y
2
Y
Y
Y
2-ch
8-bit Y
Y
Y Application program
can be modified in
Y application program
area (AP area)
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1.5 STC12C2052AD series Minimum Application System
When the frequency of crystal oscillator is lower than 12MHz,
it is suggested not to use C1 and R1 replaced by 1K
resistor connect to ground.
But R/C reset circuit is also suggest to reserve.
10μF +
C1
1 RST
10K
C2 1s
;work LED flash
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website:www.STCMCU.com
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7.2.3 Mode 2 (8-bit Auto-Reload Mode) and Demo Programs (C and ASM)
Mode 2 configures the timer register as an 8-bit counter(TL0) with automatic reload. Overflow from TL0 not
only set TF0, but also reload TL0 with the content of TH0, which is preset by software. The reload leaves TH0
unchanged.
AUXR.7/T0x12=0
÷12
Interrupt
TF0
SYSclk
÷1
AUXR.7/T0x12=1
C/T=1
T0 Pin
TR0
Toggle
C/T=0
control
GATE
TL0
(8 Bits)
CLKOUT0
P1.0
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TH0
(8 Bits)
INT0
T0CLKO
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Timer/Counter 0 Mode 2: 8-Bit Auto-Reload
STC12C2052AD is able to generate a programmable clock output on P1.0. When T0CLKO/
WAKE_CLKO.0 bit in WAKE_CLKO SFR is set, T0 timer overflow pulse will toggle P1.0 latch to
generate a 50% duty clock. The frequency of clock-out = T0 overflow rate/2.
If C/T (TMOD.2) = 0, Timer/Counter 0 is set for Timer operation (input from internal system clock), the
Frequency of clock-out is as following :
(SYSclk) / (256 – TH0) / 2,
when AUXR.7 / T0x12=1
or (SYSclk / 12) / (256 – TH0) / 2 ,
when AUXR.7 / T0x12=0
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If C/T (TMOD.2) = 1, Timer/Counter 0 is set for Conter operation (input from external P3.4/T0 pin), the
Frequency of clock-out is as following :
T0_Pin_CLK / (256-TH0) / 2
160
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;T0 Interrupt (falling edge) Demo programs, where T0 operated in Mode 2 (8-bit auto-relaod mode)
; The Timer Interrupt can not wake up MCU from Power-Down mode in the following programs
1. C program
/*----------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -------------------------------------*/
/* --- STC 1T Series MCU T0 (Falling edge) Demo ---------------------*/
/* --- Mobile: (86)13922809991 --------------------------------------------*/
/* --- Fax: 86-755-82905966 ------------------------------------------------*/
/* --- Tel: 86-755-82948412 -------------------------------------------------*/
/* --- Web: www.STCMCU.com -------------------------------------------*/
/* If you want to use the program or the program referenced in the --*/
/* article, please specify in which data and procedures from STC ---*/
/*---------------------------------------------------------------------------------*/
#include "reg51.h"
sfr
AUXR = 0x8e;
//T0 interrupt service routine
void t0int( ) interrupt 1
{
}
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void main()
{
AUXR = 0x80;
TMOD = 0x06;
TL0 = TH0 = 0xff;
TR0 = 1;
ET0 = 1;
EA = 1;
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//Auxiliary register
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//T0 interrupt (location at 000BH)
//timer0 work in 1T mode
//set timer0 as counter mode2 (8-bit auto-reload)
//fill with 0xff to count one time
//timer0 start run
//enable T0 interrupt
//open global interrupt switch
while (1);
}
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2. Assembly program
/*-------------------------------------------------------------------------------*/
/* --- STC MCU International Limited ----------------------------------*/
/* --- STC 1T Series MCU T0(Falling edge) Demo -------------------*/
/* --- Mobile: (86)13922809991 ------------------------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*------------------------------------------------------------------------------*/
AUXR DATA 08EH
;----------------------------------------;interrupt vector table
ORG 0000H
LJMP MAIN
ORG 000BH
LJMP T0INT
U
C
M
;----------------------------------------
MAIN:
ORG
C
T
S
0100H
MOV SP,
MOV AUXR,
MOV TMOD,
MOV A,
MOV TL0,
MOV TH0,
SETB TR0
SETB ET0
SETB EA
SJMP $
#7FH
#80H
#06H
#0FFH
A
A
.
d
e
t
i
m
;Auxiliary register
Li
;T0 interrupt (location at 000BH)
;initial SP
;timer0 work in 1T mode
;set timer0 as counter mode2 (8-bit auto-reload)
;fill with 0xff to count one time
;timer0 start run
;enable T0 interrupt
;open global interrupt switch
;----------------------------------------;T0 interrupt service routine
T0INT:
RETI
;----------------------------------------
162
END
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7.2.4 Mode 3 (Two 8-bit Timers/Couters)
Timer 1 in Mode 3 simply holds its count, the effect is the same as setting TR1 = 0. Timer 0 in Mode 3 established
TL0 and TH0 as two separate 8-bit counters. TL0 use the Timer 0 control bits: C/T,GATE,TR0, INT0 and TF0.
TH0 is locked into a timer function (counting machine cycles) and takes over the use of TR1 from Tmer 1. Thus,
TH0 now controls the “Timer 1” interrupt.
Mode 3 is provided for applications requiring an extra 8-bit timer or counter. When Timer 0 is in Mode 3, Timer 1
can be turned on and off by switching it out of and into its own Mode 3, or can still be used by the serial port as a
baud rate generator, or in fact, in any application not requiring an interrupt.
AUXR.7/T0x12=0
÷12
.
d
e
mit
SYSclk
÷1
AUXR.7/T0x12=1
C/T=0
C/T=1
T0 Pin
control
TR0
GATE
INT0
÷12
SYSclk
C
T
S
STC MCU Limited.
÷1
U
C
M
AUXR.7/T0x12=0
AUXR.7/T0x12=0
control
TL0
(8 bit)
Li
TH0
(8 Bits)
Interrupt
TF0
TF1
Interrupt
TR1
Timer/Counter 0 Mode 3: Two 8-Bit Timers/Counters
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7.3 Timer/Counter 1 Mode of Operation
Timer/Counter 1 can be configured for three modes by setting M1(TMOD.5) and M0(TMOD.4) in sepcial
function register TMOD.
7.3.1 Mode 0 (13-bit Timer/Counter)
In this mode, the timer register is configured as a 13-bit register. As the count rolls over from all 1s to all 0s, it
sets the timer interrupt flag TF1. The counted input is enabled to the timer when TR1 = 1 and either GATE=0 or
INT1= 1.(Setting GATE = 1 allows the Timer to be controlled by external input INT1, to facilitate pulse width
measurements.) TR0 is a control bit in the Special Function Register TCON. GATE is in TMOD.
The 13-Bit register consists of all 8 bits of TH1 and the lower 5 bits of TL1. The upper 3 bits of TL1 are
indeterminate and should be ignored. Setting the run flag (TR1) does not clear the registers.
.
d
e
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i
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Li
AUXR.6/T1x12=0
÷12
SYSclk
÷1
AUXR.6/T1x12=1
T1 Pin
C
T
S
GATE
INT1
M
CU
TR1
C/T=0
C/T=1
control
TL1
TH1
(5 Bits) (8 bits)
TF1
Interrupt
Timer/Counter 1 Mode 0: 13-Bit Timer/Counter
164
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7.3.2 Mode 1 (16-bit Timer/Counter) and Demo Programs (C and ASM)
In this mode, the timer register is configured as a 16-bit register. As the count rolls over from all 1s to all 0s, it
sets the timer interrupt flag TF1. The counted input is enabled to the timer when TR1 = 1 and either GATE=0 or
INT1 = 1.(Setting GATE = 1 allows the Timer to be controlled by external input INT1, to facilitate pulse width
measurements.) TRl is a control bit in the Special Function Register TCON. GATE is in TMOD.
The 16-Bit register consists of all 8 bits of THl and the lower 8 bits of TL1. Setting the run flag (TR1) does not
clear the registers.
Mode 1 is the same as Mode 0, except that the timer register is being run with all 16 bits.
AUXR.6/T1x12=0
÷12
.
d
e
mit
SYSclk
÷1
AUXR.6/T1x12=1
C/T=1
T1 Pin
TR1
GATE
INT1
C/T=0
U
C
M
TL1 TH1
(8 Bits) (8 bits)
Li
control
TF1
Interrupt
Timer/Counter 1 Mode 1 : 16-Bit Timer/Counter
C
T
S
There are another two simple programs that demostrates Timer 1 as 16-bit Timer/Counter, one written in C
language while other in Assembly language.
1. C Program
/*-------------------------------------------------------------------------------*/
/* --- STC MCU International Limited ----------------------------------*/
/* --- STC 1T Series 16-bit Timer Demo --------------------------------*/
/* --- Mobile: (86)13922809991 ------------------------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*-------------------------------------------------------------------------------*/
#include "reg51.h"
typedef unsigned char BYTE;
typedef unsigned int WORD;
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//----------------------------------------------/* define constants */
#define FOSC 18432000L
#define MODE1T
//Timer clock mode, comment this line is 12T mode, uncomment is 1T mode
#ifdef MODE1T
#define T1MS (65536-FOSC/1000)
#else
#define T1MS (65536-FOSC/12/1000)
#endif
/* define SFR */
sfr
AUXR
= 0x8e;
sbit TEST_LED = P0^0;
/* define variables */
WORD count;
//1ms timer calculation method in 1T mode
//1ms timer calculation method in 12T mode
//Auxiliary register
//work LED, flash once per second
.
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Li
//1000 times counter
//-----------------------------------------------
U
C
M
/* Timer0 interrupt routine */
void tm1_isr() interrupt 3 using 1
{
TL1 = T1MS;
//reload timer1 low byte
TH1 = T1MS >> 8;
//reload timer1 high byte
if (count-- == 0)
//1ms * 1000 -> 1s
{
count = 1000;
//reset counter
TEST_LED = ! TEST_LED;
//work LED flash
}
}
C
T
S
//----------------------------------------------/* main program */
void main()
{
#ifdef MODE1T
AUXR = 0x40;
#endif
TMOD = 0x10;
TL1 = T1MS;
TH1 = T1MS >> 8;
TR1 = 1;
ET1 = 1;
EA = 1;
count = 0;
}
166
while (1);
//timer1 work in 1T mode
//set timer1 as mode1 (16-bit)
//initial timer1 low byte
//initial timer1 high byte
//timer1 start running
//enable timer1 interrupt
//open global interrupt switch
//initial counter
//loop
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2. Assembly Program
;/*---------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited ------------------------------------*/
;/* --- STC 1T Series 16-bit Timer Demo ----------------------------------*/
;/* --- Mobile: (86)13922809991 -------------------------------------------*/
;/* --- Fax: 86-755-82905966 -----------------------------------------------*/
;/* --- Tel: 86-755-82948412 -----------------------------------------------*/
;/* --- Web: www.STCMCU.com ------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*------------------------------------------------------------------------------*/
;/* define constants */
#define MODE1T
#ifdef MODE1T
T1MS EQU
#else
T1MS EQU
#endif
;Timer clock mode, comment this line is 12T mode, uncomment is 1T mode
.
d
e
mit
0B800H
;1ms timer calculation method in 1T mode is (65536-18432000/1000)
0FA00H
;1ms timer calculation method in 12T mode is (65536-18432000/12/1000)
;/* define SFR */
AUXR
DATA
TEST_LED BIT
8EH
P1.0
C
T
S
;/* define variables */
COUNT
DATA
20H
M
CU
Li
;Auxiliary register
;work LED, flash once per second
;1000 times counter (2 bytes)
;----------------------------------------------
ORG
LJMP
ORG
LJMP
0000H
MAIN
001BH
TM1_ISR
;----------------------------------------------;/* main program */
MAIN:
#ifdef MODE1T
MOV AUXR, #40H
#endif
MOV TMOD, #10H
MOV TL1,
#LOW T1MS
MOV TH1,
#HIGH T1MS
SETB TR1
SETB ET1
SETB EA
CLR A
MOV COUNT, A
MOV COUNT+1,A
SJMP $
STC MCU Limited.
;timer1 work in 1T mode
;set timer1 as mode1 (16-bit)
;initial timer1 low byte
;initial timer1 high byte
;timer1 start running
;enable timer1 interrupt
;open global interrupt switch
;initial counter
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;----------------------------------------------;/* Timer1 interrupt routine */
TM1_ISR:
PUSH ACC
PUSH PSW
MOV TL1,
#LOW T1MS
MOV TH1,
#HIGH T1MS
MOV A,
COUNT
ORL A,
COUNT+1
JNZ SKIP
MOV COUNT, #LOW 1000
MOV COUNT+1,#HIGH 1000
CPL TEST_LED
SKIP:
CLR C
MOV A,
COUNT
SUBB A,
#1
MOV COUNT, A
MOV A,
COUNT+1
SUBB A,
#0
MOV COUNT+1,A
POP PSW
POP ACC
RETI
C
T
S
U
C
M
;reload timer1 low byte
;reload timer1 high byte
;check whether count(2byte) is equal to 0
;1ms * 1000 -> 1s
.
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m
;work LED flash
Li
;count--
;----------------------------------------------
168
END
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7.3.3 Mode 2 (8-bit Auto-Reload Mode) and Demo Programs (C and ASM)
Mode 2 configures the timer register as an 8-bit counter(TL1) with automatic reload. Overflow from TL1 not
only set TFx, but also reload TL1 with the content of TH1, which is preset by software. The reload leaves TH1
unchanged.
AUXR.6/T1x12=0
÷12
TF1
SYSclk
÷1
AUXR.6/T1x12=1
T1 Pin
C/T=0
C/T=1
Interrupt
Toggle
control
TL1
(8 Bits)
CLKOUT1
P1.1
TR1
GATE
TH1
(8 Bits)
INT1
T1CLKO
.
d
e
mit
Timer/Counter 1 Mode 2: 8-Bit Auto-Reload
Li
STC12C2052AD is able to generate a programmable clock output on P1.1. When T1CLKO/WAKE_CLKO.1 bit
in WAKE_CLKO SFR is set, T1 timer overflow pulse will toggle P1.1 latch to generate a 50% duty clock. The
frequency of clock-out = T1 overflow rate/2.
U
C
M
If C/T (TMOD.6) = 0, Timer/Counter 1 is set for Timer operation (input from internal system clock), the
Frequency of clock-out is as following :
(SYSclk) / (256 – TH1) / 2,
when AUXR.6 / T0x12=1
or (SYSclk / 12) / (256 – TH1) / 2 ,
when AUXR.6 / T0x12=0
C
T
S
If C/T (TMOD.6) = 1, Timer/Counter 1 is set for Conter operation (input from external P3.5/T1 pin), the
Frequency of clock-out is as following :
T1_Pin_CLK / (256-TH1) / 2
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;T1 Interrupt (falling edge) Demo programs, where T1 operated in Mode 2 (8-bit auto-relaod mode)
; The Timer Interrupt can not wake up MCU from Power-Down mode in the following programs
1. C program
/*-------------------------------------------------------------------------------*/
/* --- STC MCU International Limited ----------------------------------*/
/* --- STC 1T Series MCU T1(Falling edge) Demo -------------------*/
/* --- Mobile: (86)13922809991 ------------------------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*------------------------------------------------------------------------------*/
#include "reg51.h"
sfr AUXR = 0x8e;
U
C
M
//T1 interrupt service routine
void t1int( ) interrupt 3
{
}
C
T
S
void main()
{
AUXR = 0x40;
TMOD = 0x60;
TL1 = TH1 = 0xff;
TR1 = 1;
ET1 = 1;
EA = 1;
.
d
e
t
i
m
Li
//Auxiliary register
//T1 interrupt (location at 001BH)
//timer1 work in 1T mode
//set timer1 as counter mode2 (8-bit auto-reload)
//fill with 0xff to count one time
//timer1 start run
//enable T1 interrupt
//open global interrupt switch
while (1);
}
170
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Tel:86-755-82948412
Fax:86-755-82905966
2. Assembly program
/*-------------------------------------------------------------------------------*/
/* --- STC MCU International Limited ----------------------------------*/
/* --- STC 1T Series MCU T1(Falling edge) Demo -------------------*/
/* --- Mobile: (86)13922809991 ------------------------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*------------------------------------------------------------------------------*/
AUXR DATA 08EH
;Auxiliary register
;----------------------------------------;interrupt vector table
ORG 0000H
LJMP MAIN
ORG 001BH
LJMP T1INT
;----------------------------------------
MAIN:
ORG
C
T
S
0100H
MOV SP,
MOV AUXR,
MOV TMOD,
MOV A,
MOV TL1,
MOV TH1,
SETB TR1
SETB ET1
SETB EA
SJMP $
#7FH
#40H
#60H
#0FFH
A
A
U
C
M
.
d
e
mit
Li
;T1 interrupt (location at 001BH)
;initial SP
;timer1 work in 1T mode
;set timer1 as counter mode2 (8-bit auto-reload)
;fill with 0xff to count one time
;timer1 start run
;enable T1 interrupt
;open global interrupt switch
;----------------------------------------;T1 interrupt service routine
T1INT:
RETI
;----------------------------------------
END
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7.4 Programmable Clock Output and Demo Programs (C and ASM)
STC12C2052AD series MCU have two channel programmable clock outputs, they are Timer 0 programmable
clock output CLKOUT0(P1.0) and Timer 1 programmable clock output CLKOUT1(P1.1).
There are some SFRs about programmable clock output as shown below.
Symbol
Description
Address
AUXR
Auxiliary register
CLK_Output
Power down
WAKE_CLKO
Wake-up control
register
8EH
MSB
Bit Address and Symbol
T0x12 T1x12 UART_M0x6 EADCI
PCAWAKEUP RXD_PIN_IE T1_PIN_IE T0_PIN_IE
Value after
Power-on or
Reset
0000 00xxB
LSB
ESPI
ELVDI
-
-
-
-
T1CLKO T0CLKO
8FH
0000 xx00B
.
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The satement (used in C language) of Special function registers AUXR/WAKE_CLKO:
sfr
AUXR
= 0x8E;
//The address statement of Special function register AUXR
sfr
WAKE_CLKO = 0x8F;
//The address statement of SFR WAKE_CLKO
Li
The satement (used in Assembly language) of Special function registers AUXR/WAKE_CLKO:
AUXR
EQU 0x8E
;The address statement of Special function register AUXR
WAKE_CLKO EQU 0x8F
;The address statement of SFR WAKE_CLKO
U
C
M
1. AUXR: Auxiliary register (Non bit-addressable)
SFR name
AUXR
C
T
S
Address
8EH
bit
B7
B6
B5
B4
name T0x12 T1x12 UART_M0x6 EADCI
B3
ESPI
B2
ELVDI
B1
-
B0
-
T0x12 : Timer 0 clock source bit.
0 : The clock source of Timer 0 is SYSclk/12. It will compatible to the traditional 80C51 MCU
1 : The clock source of Timer 0 is SYSclk/1. It will drive the T0 faster than a traditional 80C51 MCU
T1x12 : Timer 1 clock source bit.
0 : The clock source of Timer 1 is SYSclk/12. It will compatible to the traditional 80C51 MCU
1 : The clock source of Timer 1 is SYSclk/1. It will drive the T0 faster than a traditional 80C51 MCU
UART_M0x6 : Baud rate select bit of UART1 while it is working under Mode-0
0 : The baud-rate of UART in mode 0 is SYSclk/12.
1 : The baud-rate of UART in mode 0 is SYSclk/2.
UART_M0x6 : Baud rate select bit of UART1 while it is working under Mode-0
0 : The baud-rate of UART in mode 0 is SYSclk/12.
1 : The baud-rate of UART in mode 0 is SYSclk/2.
EADCI : Enable/Disable interrupt from A/D converter
0 : (default) Inhibit the ADC functional block to generate interrupt to the MCU
1 : Enable the ADC functional block to generate interrupt to the MCU
ESPI : Enable/Disable interrupt from Serial Peripheral Interface (SPI)
0 : (default)Inhibit the SPI functional block to generate interrupt to the MCU
1 : Enable the SPI functional block to generate interrupt to the MCU
ELVDI : Enable/Disable interrupt from low-voltage sensor
0 : (default)Inhibit the low-voltage sensor functional block to generate interrupt to the MCU
1 : Enable the low-voltage sensor functional block to generate interrupt to the MCU
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2. WAKE_CLKO: CLK_Output Power down Wake-up control register (Non bit-Addressable)
SFR name
Address
WAKE_CLKO
8FH
bit
B7
B6
B5
B4
name PCAWAKEUP RXD_PIN_IE T1_PIN_IE T0_PIN_IE
B3
B2
-
-
B1
B0
T1CLKO T0CLKO
PCAWAKEUP: When set and the associated-PCA interrupt control registers is configured correctly, the CEXn pin
of PCA function is enabled to wake up MCU from power-down state.
RXD_PIN_IE: When set and the associated-UART interrupt control registers is configured correctly, the RXD
pin (P3.0) is enabled to wake up MCU from power-down state.
T1_PIN_IE :
When set and the associated-Timer1 interrupt control registers is configured correctly, the T1 pin
(P3.5) is enabled to wake up MCU from power-down state.
T0_PIN_IE :
When set and the associated-Timer0 interrupt control registers is configured correctly, the T1 pin
(P3.4) is enabled to wake up MCU from power-down state.
.
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LVD_WAKE: When set and the associated-LVD interrupt control registers is configured correctly, the CMPIN
pin is enabled to wake up MCU from power-down state.
Li
T1CKLO :
When set, P3.5 is enabled to be the clock output of Timer 1. The clock rate is Timer 1overflow rate
divided by 2.
T0CKLO :
When set, P3.4 is enabled to be the clock output of Timer 0. The clock rate is Timer 0overflow rate
divided by 2.
C
T
S
STC MCU Limited.
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M
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7.4.1 Timer 0 Programmable Clock-out on P1.0 and Demo Program(C and ASM)
AUXR.7/T0x12=0
÷12
Interrupt
TF0
SYSclk
÷1
AUXR.7/T0x12=1
C/T=1
T0 Pin
TR0
Toggle
C/T=0
control
GATE
TL0
(8 Bits)
CLKOUT0
P1.0
T0CLKO
TH0
(8 Bits)
INT0
.
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Timer/Counter 0 Mode 2: 8-Bit Auto-Reload
STC12C2052AD is able to generate a programmable clock output on P1.0. When T0CLKO/
WAKE_CLKO.0 bit in WAKE_CLKO SFR is set, T0 timer overflow pulse will toggle P1.0 latch to
generate a 50% duty clock. The frequency of clock-out = T0 overflow rate/2.
If C/T (TMOD.2) = 0, Timer/Counter 0 is set for Timer operation (input from internal system clock), the
Frequency of clock-out is as following :
(SYSclk) / (256 – TH0) / 2,
when AUXR.7 / T0x12=1
or (SYSclk / 12) / (256 – TH0) / 2 ,
when AUXR.7 / T0x12=0
C
T
S
U
C
M
Li
If C/T (TMOD.2) = 1, Timer/Counter 0 is set for Conter operation (input from external P3.4/T0 pin), the
Frequency of clock-out is as following :
T0_Pin_CLK / (256-TH0) / 2
The following programs demostrate Program Clock Output on P1.0 pin when Timer 0 operates as 8-bit autoreload Timer/Counter.
1. C Program:
/*--------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -----------------------------------*/
/* --- STC 1T Series Programmable Clock Output Demo -------------*/
/* --- Mobile: (86)13922809991 -------------- ----------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*-------------------------------------------------------------------------------*/
#include "reg51.h"
//----------------------------------------------/* define constants */
#define FOSC 18432000L
//#define MODE 1T
//Timer clock mode, comment this line is 12T mode, uncomment is 1T mode
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#ifdef MODE 1T
#define F38_4KHz
#else
#define F38_4KHz
#endif
/* define SFR */
sfr
AUXR
sfr
WAKE_CLKO
sbit
T0CLKO
Mobile:(86)13922809991
(256-FOSC/2/38400)
(256-FOSC/2/12/38400)
= 0x8e;
= 0x8f;
= P1^0;
C
T
S
while (1);
//38.4KHz frequency calculation method of 1T mode
//38.4KHz frequency calculation method of 12T mode
.
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Li
//timer0 work in 1T mode
U
C
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Fax:86-755-82905966
//Auxiliary register
//wakeup and clock output control register
//timer0 clock output pin
//----------------------------------------------/* main program */
void main()
{
#ifdef MODE1T
AUXR = 0x80;
#endif
TMOD = 0x02;
TL0
= F38_4KHz;
TH0
= F38_4KHz;
TR0
= 1;
WAKE_CLKO = 0x01;
}
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//set timer0 as mode2 (8-bit auto-reload)
//initial timer0
//initial timer0
//timer0 start running
//enable timer0 clock output
//loop
2. Assembly Program:
;/*--------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited -----------------------------------*/
;/* --- STC 1T Series Programmable Clock Output Demo -------------*/
;/* --- Mobile: (86)13922809991 -------------- ----------------------------*/
;/* --- Fax: 86-755-82905966 -----------------------------------------------*/
;/* --- Tel: 86-755-82948412 -----------------------------------------------*/
;/* --- Web: www.STCMCU.com ------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*-------------------------------------------------------------------------------*/
;/* define constants */
#define MODE 1T
STC MCU Limited.
;Timer clock mode, comment this line is 12T mode, uncomment is 1T mode
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#ifdef MODE 1T
F38_4KHz EQU 010H
#else
F38_4KHz EQU 0ECH
#endif
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;38.4KHz frequency calculation method of 1T mode is (256-18432000/2/38400)
;38.4KHz frequency calculation method of 12T mode (256-18432000/2/12/38400)
;/* define SFR */
AUXR
DATA 08EH
WAKE_CLKO DATA 08FH
T0CLKO
BIT P1.0
;Auxiliary register
;wakeup and clock output control register
;timer0 clock output pin
;----------------------------------------------
ORG 0000H
LJMP MAIN
;----------------------------------------------;/* main program */
MAIN:
#ifdef MODE1T
MOV AUXR, #80H
#endif
MOV TMOD, #02H
MOV TL0,
#F38_4KHz
MOV TH0,
#F38_4KHz
SETB TR0
MOV WAKE_CLKO, #01H
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;timer0 work in 1T mode
;set timer0 as mode2 (8-bit auto-reload)
;initial timer0
;initial timer0
;enable timer0 clock output
SJMP $
;----------------------------------------------
176
END
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7.4.2 Timer 1 Programmable Clock-out on P1.1 and Demo Program(C and ASM)
AUXR.6/T1x12=0
÷12
TF1
SYSclk
÷1
AUXR.6/T1x12=1
T1 Pin
C/T=0
C/T=1
Interrupt
Toggle
control
TL1
(8 Bits)
CLKOUT1
P1.1
TR1
GATE
T1CLKO
TH1
(8 Bits)
INT1
Timer/Counter 1 Mode 2: 8-Bit Auto-Reload
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STC12C2052AD is able to generate a programmable clock output on P1.1. When T1CLKO/WAKE_CLKO.1 bit
in WAKE_CLKO SFR is set, T1 timer overflow pulse will toggle P1.1 latch to generate a 50% duty clock. The
frequency of clock-out = T1 overflow rate/2.
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If C/T (TMOD.6) = 0, Timer/Counter 1 is set for Timer operation (input from internal system clock), the
Frequency of clock-out is as following :
(SYSclk) / (256 – TH1) / 2,
when AUXR.6 / T0x12=1
or (SYSclk / 12) / (256 – TH1) / 2 ,
when AUXR.6 / T0x12=0
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If C/T (TMOD.6) = 1, Timer/Counter 1 is set for Conter operation (input from external P3.5/T1 pin), the
Frequency of clock-out is as following :
T1_Pin_CLK / (256-TH1) / 2
The following programs demostrate Program Clock Output on Timer 1 pin when Timer 1 operates as 8-bit autoreload Timer/Counter.
1. C Program:
/*-------------------------------------------------------------------------------*/
/* --- STC MCU International Limited ----------------------------------*/
/* --- STC 1T Series Programmable Clock Output Demo ------------*/
/* --- Mobile: (86)13922809991 -------------- ---------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*-------------------------------------------------------------------------------*/
#include "reg51.h"
//----------------------------------------------STC MCU Limited.
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/* define constants */
#define FOSC 18432000L
//#define MODE 1T
#ifdef MODE 1T
#define F38_4KHz
#else
#define F38_4KHz
#endif
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//Timer clock mode, comment this line is 12T mode, uncomment is 1T mode
(256-FOSC/2/38400)
(256-FOSC/2/12/38400)
//38.4KHz frequency calculation method of 1T mode
//38.4KHz frequency calculation method of 12T mode
/* define SFR */
sfr AUXR
= 0x8e;
//Auxiliary register
sfr WAKE_CLKO = 0x8f;
//wakeup and clock output control register
sbit T1CLKO = P1^1;
//timer1 clock output pin
//----------------------------------------------/* main program */
void main()
{
#ifdef MODE1T
AUXR =
#endif
TMOD =
TL1
=
TH1
=
TR1
=
WAKE_CLKO =
while (1);
}
0x40;
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0x20;
F38_4KHz;
F38_4KHz;
1;
0x02;
STC MCU Limited.
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//timer1 work in 1T mode
//set timer1 as mode2 (8-bit auto-reload)
//initial timer1
//initial timer1
//timer1 start running
//enable timer1 clock output
//loop
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2. Assembly Program:
;/*---------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited ------------------------------------*/
;/* --- STC 1T Series Programmable Clock Output Demo --------------*/
;/* --- Mobile: (86)13922809991 -------------------------------------------*/
;/* --- Fax: 86-755-82905966 -----------------------------------------------*/
;/* --- Tel: 86-755-82948412 ------------------------------------------------*/
;/* --- Web: www.STCMCU.com ------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*-------------------------------------------------------------------------------*/
;/* define constants */
#define MODE 1T
#ifdef MODE 1T
F38_4KHz EQU 010H
#else
F38_4KHz EQU 0ECH
#endif
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;Timer clock mode, comment this line is 12T mode, uncomment is 1T mode
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;38.4KHz frequency calculation method of 1T mode is (256-18432000/2/38400)
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;38.4KHz frequency calculation method of 12T mode (256-18432000/2/12/38400)
;/* define SFR */
AUXR
DATA 08EH
WAKE_CLKO DATA 08FH
T1CLKO
BIT P1.1
C
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;Auxiliary register
;wakeup and clock output control register
;timer1 clock output pin
;----------------------------------------------
ORG 0000H
LJMP MAIN
;----------------------------------------------;/* main program */
MAIN:
#ifdef MODE1T
MOV AUXR, #40H
#endif
MOV TMOD, #20H
MOV TL1,
#F38_4KHz
MOV TH1,
#F38_4KHz
SETB TR1
MOV WAKE_CLKO, #02H
;timer1 work in 1T mode
;set timer1 as mode2 (8-bit auto-reload)
;initial timer1
;initial timer1
;enable timer1 clock output
SJMP $
;----------------------------------------------
END
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7.5 Application note for Timer in practice
(1) Real-time Timer
Timer/Counter start running, When the Timer/Counter is overflow, the interrupt request generated, this
action handle by the hardware automatically, however, the process which from propose interrupt request to
respond interrupt request requires a certain amount of time, and that the delay interrupt request on-site with
the environment varies, it normally takes three machine cycles of delay, which will bring real-time processing
bias. In most occasions, this error can be ignored, but for some real-time processing applications, which
require compensation.
Such as the interrupt response delay, for timer mode 0 and mode 1, there are two meanings: the first,
because of the interrupt response time delay of real-time processing error; the second, if you require multiple
consecutive timing, due to interruption response delay, resulting in the interrupt service program once again
sets the count value is delayed by several count cycle.
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If you choose to use Timer/Counter mode 1 to set the system clock, these reasons will produce real-time
error for this situation, you should use dynamic compensation approach to reducing error in the system clock,
compensation method can refer to the following example program.
…
CLR
EA
;disable interrupt
MOV A,
TLx
;read TLx
ADD A,
#LOW
;LOW is low byte of compensation value
MOV TLx,
A
;update TLx
MOV A,
THx
;read THx
ADDC A,
#HIGH
;HIGH is high byte of compensation value
MOV THx,
A
;update THx
SETB EA
;enable interrupt
…
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(2) Dynamic read counts
When dynamic read running timer count value, if you do not pay attention to could be wrong, this is because it
is not possible at the same time read the value of the TLx and THx. For example the first reading TLx then THx,
because the timer is running, after reading TLx, TLx carry on the THx produced, resulting in error; Similarly,
after the first reading of THx then TLx, also have the same problems.
A kind of way avoid reading wrong is first reading THx then TLx and read THx once more, if the THx twice
to read the same value, then the read value is correct, otherwise repeat the above process. Realization method
reference to the following example code.
…
RDTM: MOV A,
THx
;save THx to ACC
MOV R0,
TLx
;save TLx to R0
CJNE A,
THx,
RDTM
;read THx again and compare with the previous value
MOV R1,
A
;save THx to R1
…
180
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Chapter 8. UART with Enhanced Function
The serial port is full duplex,meaning it can transmit and receive simultaneously. It is also receive-buffered,
meaning it can commence reception of a second byte before a previously received byte has been read from the
reeeive register. (However,if the first byte still hasn’t been read by the time reception of the second byte is
complete, one of the bytes will be lost). The serial port receive and transmit share the same SFR – SBUF, but
actually there is two SBUF in the chip, one is for transmit and the other is for receive.
The serial port(UART) can be operated in 4 different modes: Mode 0 provides synchronous communication
while Modes 1, 2, and 3 provide asynchronous communication. The asynchronous communication operates
as a full-duplex Universal Asynchronous Receiver and Transmitter (UART), which can transmit and receive
simultaneously and at different baud rates.
Serial communiction involves the transimission of bits of data through only one communication line. The data are
transimitted bit by bit in either synchronous or asynchronous format. Synchronous serial communication transmits
ont whole block of characters in syschronization with a reference clock while asynchronous serial communication
randomly transmits one character at any time, independent of any clock.
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8.1 Special Function Registers about UART
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Symbol
Description
AUXR
Auxiliary register
8EH
T0x12 T1x12 UART_M0x6 EADCI ESPI ELVDI
SCON
Serial Control
98H
SM0/FE
SBUF
C
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S
Address
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Bit Address and Symbol
MSB
SM1
SM2
REN
TB8
RB8
POF
GF1
Value after
Power-on or
LSB
Reset
- 0000 00xxB
TI
RI
PD
IDL
0000 0000B
Serial Buffer
99H
Power Control
87H
SMOD SMOD0 LVDF
IE
Interrupt Enable
A8H
EA EPCA_LVD EADC_SPI ES ET1 EX1 ET0 EX0 0000 0000B
IP
Interrupt Priority Low
B8H
-
IPH
Interrupt Priority High
B7H
- PPCA_LVDH PADC_LVDH PSH PT1H PX1H PT0H PX0H
SADEN
Slave Address Mask
B9H
SADDR
Slave Address
A9H
PCON
CLK_Output Power down
WAKE_CLKO
Wake-up control register
STC MCU Limited.
8FH
xxxx xxxxB
PPCA_LVD
PADC_LVD PS PT1
GF0
0011 0000B
PX1 PT0 PX0 x000 0000B
x000 0000B
0000 0000B
0000 0000B
PCAWAKEUP RxD_PIN_IE T1_PIN_IE T0_PIN_IE
-
-
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T1CLKO T0CLKO
0000 xx00B
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1. Serial Port 1 (UART1) Control Register: SCON and PCON
Serial port 1 of STC12C2052AD series has two control registers: Serial port control register (SCON) and
PCON which used to select Baud-Rate
SCON: Serial port Control Register (Bit-Addressable)
SFR name
Address
bit
B7
B6
B5
B4
B3
B2
B1
B0
SCON
98H
name
SM0/FE
SM1
SM2
REN
TB8
RB8
TI
RI
FE: Framing Error bit. The SMOD0 bit must be set to enable access to the FE bit
0: The FE bit is not cleared by valid frames but should be cleared by software.
1: This bit set by the receiver when an invalid stop bit id detected.
SM0,SM1 : Serial Port Mode Bit 0/1.
SM0
SM1
Description
0
0
8-bit shift register
0
1
8-bit UART
1
0
9-bit UART
1
1
9-bit UART
Baud rate
SYSclk/12
variable
SYSclk/64 or SYSclk/32(SMOD=1)
variable
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SM2 : Enable the automatic address recognition feature in mode 2 and 3. If SM2=1, RI will not be
set unless the received 9th data bit is 1, indicating an address, and the received byte is a
Given or Broadcast address. In mode1, if SM2=1 then RI will not be set unless a valid stop
Bit was received, and the received byte is a Given or Broadcast address. In mode 0, SM2 should be 0.
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REN : When set enables serial reception.
TB8 : The 9th data bit which will be transmitted in mode 2 and 3.
RB8 : In mode 2 and 3, the received 9th data bit will go into this bit.
TI : Transmit interrupt flag. Set by hardware when a byte of data has been transmitted by UART0 (after the 8th
bit in 8-bit UART Mode, or at the beginning of the STOP bit in 9-bit UART Mode). When the UART0 interrupt is enabled, setting this bit causes the CPU to vector to the UART0 interrupt service routine. This bit
must be cleared manually by software.
RI : Receive interrupt flag. Set to ‘1’ by hardware when a byte of data has been received by UART0 (set at the
STOP bit sam-pling time). When the UART0 interrupt is enabled, setting this bit to ‘1’ causes the CPU to
vector to the UART0 interrupt service routine. This bit must be cleared manually by software.
SMOD/PCON.7 in PCON register can be used to set whether the baud rates of mode 1, mode2 and mode 3
are doubled or not.
PCON: Power Control register (Non bit-addressable)
SFR name
PCON
Address
87H
bit
name
B7
SMOD
B6
SMOD0
B5
LVDF
B4
POF
B3
GF1
B2
GF0
B1
PD
B0
IDL
SMOD: double Baud rate control bit.
0 : Disable double Baud rate of the UART.
1 : Enable double Baud rate of the UART in mode 1,2,or 3.
SMOD0: Frame Error select.
0 : SCON.7 is SM0 function.
1 : SCON.7 is FE function. Note that FE will be set after a frame error regardless of the state of SMOD0.
182
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2. SBUF: Serial port 1 Data Buffer register (Non bit-addressable)
SFR name
SBUF
Address
99H
bit
name
B7
B6
B5
B4
B3
B2
B1
B0
It is used as the buffer register in transmission and reception.The serial port buffer register (SBUF) is really two
buffers. Writing to SBUF loads data to be transmitted, and reading SBUF accesses received data. These are two
separate and distinct registers, the transimit write-only register, and the receive read-only register.
3. AUXR: Auxiliary register (Non bit-addressable)
SFR name
AUXR
Address
8EH
bit
B7
B6
B5
B4
name T0x12 T1x12 UART_M0x6 EADCI
B3
ESPI
B2
ELVDI
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B1
-
B0
-
T0x12 : Timer 0 clock source bit.
0 : The clock source of Timer 0 is SYSclk/12. It will compatible to the traditional 80C51 MCU
1 : The clock source of Timer 0 is SYSclk/1. It will drive the T0 faster than a traditional 80C51 MCU
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T1x12 : Timer 1 clock source bit.
0 : The clock source of Timer 1 is SYSclk/12. It will compatible to the traditional 80C51 MCU
1 : The clock source of Timer 1 is SYSclk/1. It will drive the T0 faster than a traditional 80C51 MCU
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UART_M0x6 : Baud rate select bit of UART1 while it is working under Mode-0
0 : The baud-rate of UART in mode 0 is SYSclk/12.
1 : The baud-rate of UART in mode 0 is SYSclk/2.
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EADCI : Enable/Disable interrupt from A/D converter
0 : (default) Inhibit the ADC functional block to generate interrupt to the MCU
1 : Enable the ADC functional block to generate interrupt to the MCU
ESPI : Enable/Disable interrupt from Serial Peripheral Interface (SPI)
0 : (default)Inhibit the SPI functional block to generate interrupt to the MCU
1 : Enable the SPI functional block to generate interrupt to the MCU
ELVDI : Enable/Disable interrupt from low-voltage sensor
0 : (default)Inhibit the low-voltage sensor functional block to generate interrupt to the MCU
1 : Enable the low-voltage sensor functional block to generate interrupt to the MCU
4. Slave Address Control registers SADEN and SADDR
SADEN: Slave Address Mask register
SADDR: Slave Address register
SADDR register is combined with SADEN register to form Given/Broadcast Address for automatic address
recognition. In fact, SADEN function as the "mask" register for SADDR register. The following is the example
for it.
SADDR = 1100 0000
SADEN = 1111 1101
Given
= 1100 00x0
The Given slave address will be checked except bit 1 is
treated as "don't care".
The Broadcast Address for each slave is created by taking the logical OR of SADDR and SADEN. Zero in this
result is considered as "don't care" and a Broad cast Address of all " don't care". This disables the automatic
address detection feature.
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5. Power down wake-up register: WAKE_CLKO (Non bit-Addressable)
SFR name
WAKE_CLKO
Address
bit
8FH name
B7
B6
B5
B4
PCAWAKEUP RXD_PIN_IE T1_PIN_IE T0_PIN_IE
B3
B2
-
-
B1
B0
T1CKLO T0CKLO
PCAWAKEUP: When set and the associated-PCA interrupt control registers is configured correctly, the CEXn pin
of PCA function is enabled to wake up MCU from power-down state.
RXD_PIN_IE: When set and the associated-UART interrupt control registers is configured correctly, the RXD
pin (P3.0) is enabled to wake up MCU from power-down state.
T1_PIN_IE :
When set and the associated-Timer1 interrupt control registers is configured correctly, the T1 pin
(P3.5) is enabled to wake up MCU from power-down state.
T0_PIN_IE :
When set and the associated-Timer0 interrupt control registers is configured correctly, the T1 pin
(P3.4) is enabled to wake up MCU from power-down state.
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T1CKLO :
When set, P3.5 is enabled to be the clock output of Timer 1. The clock rate is Timer 1overflow rate
divided by 2.
T0CKLO :
When set, P3.4 is enabled to be the clock output of Timer 0. The clock rate is Timer 0overflow rate
divided by 2.
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6. Registers related with UART1 interrupt : IE, IP and IPH
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IE: Interrupt Enable Rsgister (Bit-addressable)
SFR name Address
IE
A8H
bit
B7
name
EA
B6
B5
EPCA_LVD EADC_SPI
B4
B3
B2
B1
B0
ES
ET1
EX1
ET0
EX0
EA : disables all interrupts.
If EA = 0,no interrupt will be acknowledged.
If EA = 1, each interrupt source is individually enabled or disabled by setting or clearing its enable bit.
ES : Serial port 1(UART1) interrupt enable bit.
If ES = 0, Serial port (UART) interrupt will be diabled.
If ES = 1, Serial port (UART) interrupt is enabled.0
IPH: Interrupt Priority High Register (Non bit-addressable)
SFR name Address
IPH
B7H
bit
B7
name
-
B6
B5
B4
B3
B2
B1
B0
PPCA_LVDH PADC_SPIH PSH PT1H PX1H PT0H PX0H
IP: Interrupt Priority Register (Bit-addressable)
SFR name Address
IP
PSH, PS:
184
B8H
bit
B7
name
-
B6
B5
PPCA_LVD PADC_SPI
B4
B3
B2
B1
B0
PS
PT1
PX1
PT0
PX0
Serial Port (UART) interrupt priority control bits.
if PSH=0 and PS=0, UART interrupt is assigned lowest priority (priority 0).
if PSH=0 and PS=1, UART interrupt is assigned lower priority (priority 1).
if PSH=1 and PS=0, UART interrupt is assigned higher priority (priority 2).
if PSH=1 and PS=1, UART interrupt is assigned highest priority (priority 3).
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8.2 UART Operation Modes
The serial port (UART) can be operated in 4 different modes which are configured by setting SM0 and SM1 in
SFR SCON. Mode 1, Mode 2 and Mode 3 are asynchronous communication. In Mode 0, UART is used as a
simple shift register.
8.2.1 Mode 0: 8-Bit Shift Register
Mode 0, selected by writing 0s into bits SM1 and SM0 of SCON, puts the serial port into 8-bit shift register mode.
Serial data enters and exits through RXD. TXD outputs the shift clock. Eight data bits are transmitted/received
with the least-significant (LSB) first. The baud rate is fixed at 1/12 the System clock cycle in the default state. If
AUXR.5(UART_M0x6) is set, the baud rate is 1/2 System clock cycle.
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Transmission is initiated by any instruction that uses SBUF as a destination register. The “write to SBUF” signal
also loads a “1” into the 9th position of the transmit shift register and tells the TX Control block to commence a
transmission. The internal timing is such that one full system clock cycle will elapse between "write to SBUF,"
and activation of SEND.
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SEND transfers the output of the shift register to the alternate output function line of P3.0, and also transfers Shift
Clock to the alternate output function line of P3.1. At the falling edge of the Shift Clock, the contents of the shift
register are shifted one position to the right.
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As data bits shift out to the right, “0” come in from the left. When the MSB of the data byte is at the output
position of the shift register, then the “1” that was initially loaded into the 9th position is just to the left of the
MSB, and all positions to the left of that contains zeroes. This condition flags the TX Control block to do one last
shift and then deactivate SEND and set TI. Both of these actions occur after "write to SBUF".
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Reception is initiated by the condition REN=1 and RI=0. After that, the RX Control unit writes the bits 11111110
to the receive shift register, and in the next clock phase activates RECEIVE. RECEIVE enables SHIFT CLOCK
to the alternate output function line of P3.1.At RECEIVE is active, the contents of the receive shift register are
shifted to the left one position. The value that comes in from the right is the value that was sampled at the P3.0
pin the rising edge of Shift clock.
As data bits come in from the right, “1”s shift out to the left. When the “0” that was initially loaded into the rightmost position arrives at the left-most position in the shift register, it flags the RX Control block to do one last shift
and load SBUF. Then RECEIVE is cleared and RI is set.
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INTERNAL BUS
WRITE
TO
SBUF
DS Q
CL
RXD/P3.0
OUTPUT FUNCTION
SBUF
SHIFT
ZERO DETECTOR
SYSclk/12
0
SYSclk/2
1
START
TX CONTROL
SERIAL
PORT
INTERRUPT
AUXR.5(UART_M0x6)
REN
RI
TX CLOCK
TI
RX CLOCK
RI
SHIFT
SEND
RX CONTROL SHIFT
START
1 1 1 1 1 1 1 0
INPUT SHIFT REG.
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LOAD
SBUF
TXD/P3.1
OUTPUT FUNCTION
SHIFT
CLOCK
RECEIVE
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SHIFT
RXD/P3.0
INPUT FUNCTION
SBUF
C
T
S
READ
SBUF
INTERNAL BUS
WRITE TO SBUF
SEND
SHIFT
RXD(DATA OUT)
TRANSMIT
D0
D1
D2
D3
D4
D5
D6
D7
TXD(SHIFT CLOCK)
TI
WRITE TO SCON(CLEAR RI)
RI
RECEIVE
RECEIVE
SHIFT
D0
RXD(DATA IN)
D1
D2
D3
D4
D5
D6
D7
TXD(SHIFT CLOCK)
Serial Port Mode 0
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8.2.2 Mode 1: 8-Bit UART with Variable Baud Rate
10 bits are transmitted through TXD or received through RXD. The frame data includes a start bit(0), 8 data bits
and a stop bit(1). One receive, the stop bit goes into RB8 in SFR – SCON. The baud rate is determined by the
Timer 1 or BRT overflow rate.
Baud rate in mode 1 = (2SMOD /32 ) x Timer 1 overflow rate
When T1x12=0, Timer 1 overflow rate = SYSclk/12/(256-TH1);
When T1x12=1, Timer 1 overflow rate = SYSclk / (256-TH1);
Transmission is initiated by any instruction that uses SBUF as a destination register. The “write to SBUF”
signal also loads a “1” into the 9th bit position of the transmit shift register and flags the TX Control unit that a
transmission is requested. Transmission actually happens at the next rollover of divided-by-16 counter. Thus the
bit times are synchronized to the divided-by-16 counter, not to the “write to SBUF” signal.
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The transmission begins with activation of SEND , which puts the start bit at TXD. One bit time later, DATA is
activated, which enables the output bit of the transmit shift register to TXD. The first shift pulse occurs one bit
time after that.
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As data bits shift out to the right, zeroes are clocked in from the left. When the MSB of the data byte is at the
output position of the shift register, then the 1 that was initially loaded into the 9th position is just to the left of the
MSB, and all positions to the left of that contain zeroes. This condition flags the TX Control unit to do one last
shift and then deactivate SEND and set TI. This occurs at the 10th divide-by-16 rollover after “write to SBUF.”
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Reception is initiated by a 1-to-0 transition detected at RXD. For this purpose, RXD is sampled at a rate of 16
times the established baud rate. When a transition is detected, the divided-by-16 counter is immediately reset,
and 1FFH is written into the input shift register. Resetting the divided-by-16 counter aligns its roll-overs with the
boundaries of the incoming bit times.
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The 16 states of the counter divide each bit time into 16ths. At the 7th, 8th and 9th counter states of each bit time,
the bit detector samples the value of RXD. The value accepted is the value that was seen in at least 2 of the 3
samples. This is done to reject noise. In order to reject false bits, if the value accepted during the first bit time is
not a 0, the receive circuits are reset and the unit continues looking for another 1-to-0 transition. This is to provide
rejection of false start bits. If the start bit is valid, it is shifted into the input shift register, and reception of the rest
of the frame proceeds.
As data bits come in from the right, “1”s shift out to the left. When the start bit arrives at the left most position
in the shift register,(which is a 9-bit register in Mode 1), it flags the RX Control block to do one last shift, load
SBUF and RB8, and set RI. The signal to load SBUF and RB8 and to set RI is generated if, and only if, the
following conditions are met at the time the final shift pulse is generated.
1) RI=0 and
2) Either SM2=0, or the received stop bit = 1
If either of these two conditions is not met, the received frame is irretrievably lost. If both conditions are met, the
stop bit goes into RB8, the 8 data bits go into SBUF, and RI is activated. At this time, whether or not the above
conditions are met, the unit continues looking for a 1-to-0 transition in RXD.
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INTERNAL BUS
TB8
Timer 1
Overflow
WRITE
TO
SBUF
÷2
DS Q
CL
TXD
ZERO DETECTOR
SMOD
=1
SMOD
=0
SBUF
SHIFT
START
÷16
TX CLOCK
SERIAL
PORT
INTERRUPT
SAMPLE
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RI
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LOAD
SBUF
RX CONTROL SHIFT
1FFH
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BIT
DETECTOR
C
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S
SEND
TI
RX CLOCK
START
1-TO-0
TRANSITION
DETECTOR
RXD
DATA
TX CONTROL
INPUT SHIFT REG.
(9 BITS)
SHIFT
LOAD
SBUF
SBUF
READ
SBUF
INTERNAL BUS
TX
CLOCK
WRITE TO SBUF
SEND
TRANSMIT
DATA
SHIFT
D0
TXD
START BIT
TI
D1
D2
D3
D4
D5
D6
D7
START BIT
D0
D1
D2
D3
D4
D5
STOP BIT
RX CLOCK
RXD
RECEIVE BIT DETECTOR SAMPLE TIMES
SHIFT
D6
D7
STOP BIT
RI
Serial Port Mode 1
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8.2.3 Mode 2: 9-Bit UART with Fixed Baud Rate
11 bits are transmitted through TXD or received through RXD. The frame data includes a start bit(0), 8 data
bits, a programmable 9th data bit and a stop bit(1). On transmit, the 9th data bit comes from TB8 in SCON. On
receive, the 9th data bit goes into RB8 in SCON. The baud rate is programmable to either 1/32 or 1/64 the System
clock cycle.
Baud rate in mode 2 =
(2SMOD/64) x SYSclk
Transmission is initiated by any instruction that uses SBUF as a destination register. The “write to SBUF”
signal also loads TB8 into the 9th bit position of the transmit shift register and flags the TX Control unit that a
transmission is requested. Transmission actually happens at the next rollover of divided-by-16 counter. Thus the
bit times are synchronized to the divided-by-16 counter, not to the “write to SBUF” signal.
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The transmission begins when /SEND is activated, which puts the start bit at TXD. One bit time later, DATA is
activated, which enables the output bit of the transmit shift register to TXD. The first shift pulse occurs one bit
time after that. The first shift clocks a “1”(the stop bit) into the 9th bit position on the shift register. Thereafter,
only “0”s are clocked in. As data bits shift out to the right, “0”s are clocked in from the left. When TB8 of the data
byte is at the output position of the shift register, then the stop bit is just to the left of TB8, and all positions to the
left of that contains “0”s. This condition flags the TX Control unit to do one last shift, then deactivate /SEND and
set TI. This occurs at the 11th divided-by-16 rollover after “write to SBUF”.
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Reception is initiated by a 1-to-0 transition detected at RXD. For this purpose, RXD is sampled at a rate of
16 times whatever baud rate has been estabished. When a transition is detected, the divided-by-16 counter is
immediately reset, and 1FFH is written into the input shift register.
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At the 7th, 8th and 9th counter states of each bit time, the bit detector samples the value of RXD. The value accepted
is the value that was seen in at least 2 of the 3 samples. This is done to reject noise. In order to reject false bits, if
the value accepted during the first bit time is not a 0, the receive circuits are reset and the unit continues looking
for another 1-to-0 transition. If the start bit is valid, it is shifted into the input shift register, and reception of the
rest of the frame proceeds.
As data bits come in from the right, “1”s shift out to the left. When the start bit arrives at the leftmost position
in the shift register,(which is a 9-bit register in Mode-2 and 3), it flags the RX Control block to do one last shift,
load SBUF and RB8, and set RI. The signal to load SBUF and RB8 and to set RI is generated if, and only if, the
following conditions are met at the time the final shift pulse is generated.:
1) RI=0 and
2) Either SM2=0, or the received 9th data bit = 1
If either of these two conditions is not met, the received frame is irretrievably lost. If both conditions are met,
the stop bit goes into RB8, the first 8 data bits go into SBUF, and RI is activated. At this time, whether or not the
above conditions are met, the unit continues looking for a 1-to-0 transition at the RXD input.
Note that the value of received stop bit is irrelevant to SBUF, RB8 or RI.
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INTERNAL BUS
TB8
WRITE
TO
SBUF
DS Q
CL
SBUF
TXD
ZERO DETECTOR
SYSclk/2
STOP BIT
START GEN.
MODE 2
÷16
÷2
TX CONTROL
TX CLOCK
TI
SERIAL
PORT
INTERRUPT
SMOD=1
SMOD=0
1-TO-0
TRANSITION
DETECTOR
START
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RX
RI
CLOCK
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SEND
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LOAD
SBUF
RX CONTROL SHIFT
1FFH
BIT
DETECTOR
RXD
DATA
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÷16
SAMPLE
(SMOD IS PCON.7)
SHIFT
INPUT SHIFT REG.
(9 BITS)
SHIFT
LOAD
SBUF
SBUF
READ
SBUF
INTERNAL BUS
TX
CLOCK
WRITE TO SBUF
SEND
TRANSMIT
DATA
SHIFT
D0
TXD
START BIT
TI
D1
D2
D3
D4
D5
D6
D7
TB8
STOP BIT
START BIT
D0
D1
D2
D3
D4
D5
D6
D7
STOP BIT GEN
RX CLOCK
RECEIVE
RXD
RB8
STOP BIT
BIT DETECTOR SAMPLE TIMES
SHIFT
RI
Serial Port Mode 2
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8.2.4 Mode 3: 9-Bit UART with Variable Baud Rate
Mode 3 is the same as mode 2 except the baud rate is variable.
Baud rate in mode 3 =
(2SMOD /32 ) x Timer 1 overflow rate
When T1x12=0, Timer 1 overflow rate = SYSclk/12/(256-TH1);
When T1x12=1, Timer 1 overflow rate = SYSclk / (256-TH1);
In all four modes, transmission is initiated by any instruction that use SBUF as a destination register. Reception
is initiated in mode 0 by the condition RI = 0 and REN = 1. Reception is initiated in the other modes by the
incoming start bit with 1-to-0 transition if REN=1.
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INTERNAL BUS
TB8
TIMER 1
OVERFLOW
WRITE
TO
SBUF
DS Q
CL
÷2
SBUF
TXD
ZERO DETECTOR
SMOD
=0
SMOD
=1
SHIFT
START
TX CONTROL
÷16
TX CLOCK
SERIAL
PORT
INTERRUPT
SEND
TI
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÷16
SAMPLE
1-TO-0
TRANSITION
DETECTOR
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RI
RX CLOCK
START
LOAD
SBUF
RX CONTROL SHIFT
1FFH
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BIT
DETECTOR
RXD
C
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DATA
INPUT SHIFT REG.
(9 BITS)
SHIFT
LOAD
SBUF
SBUF
READ
SBUF
INTERNAL BUS
TX
CLOCK
WRITE TO SBUF
SEND
TRANSMIT
DATA
SHIFT
D0
TXD
START BIT
TI
D1
D2
D3
D4
D5
D6
D7
TB8
STOP BIT
D1
D2
D3
D4
D5
D6
D7
STOP BIT GEN
RECEIVE
RX CLOCK
÷16 RESET
RXD
START BIT
D0
RB8
STOP BIT
BIT DETECTOR SAMPLE TIMES
SHIFT
RI
Serial Port Mode 3
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8.3 Frame Error Detection
When used for frame error detect, the UART looks for missing stop bits in the communication. A missing bit will
set the FE bit in the SCON register. The FE bit shares the SCON.7 bit with SM0 and the function of SCON.7 is
determined by PCON.6(SMOD0). If SMOD0 is set then SCON.7 functions as FE. SCON.7 functions as SM0
when SMOD0 is cleared.When used as FE,SCON.7 can only be cleared by software.Refer to the following figure.
9-bit data
START BIT
D0
D1
D2
D3
D4
D5
D6
D7
D8
STOP BIT
SET FE bit if STOP=0
SM0 to UART mode control
PCON.SMOD0
SCON SM0/FE
SM1
SM2
REN
TB8
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TI
RI
UART Frame Error Detection
8.4 Multiprocessor Communications
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Modes 2 and 3 have a special provision for multiproceasor communications. In these modes 9 data bits are
received.The 9th one goes into RB8. Then comes a stop bit. The port can be programmed such that when the stop
bit is received,the serial port interrupt will be activated only if RB8 = 1. This feature is enabled by setting bit
SM2 in SCON. A way to use this feature in multiprocessor systems is as follows.
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When the master processor wants to transmit a block of data to one of several slaves, it first sends out an address
byte which identifies the target slave.An address byte differs from a data byte in that the 9th bit is 1 in an address
byte and 0 in a data byte.With SM2 = 1, no slave will be interrupted by a data byte. An address byte, however,will
interrupt all slaves, so that each slave can examine the received byte and see if it is being addressed.The addressed
slave will clear its SM2 bit and prepare to receive the data bytes that will be coming. The slaves that weren’t being addressed leave their SM2s set and go on about their business, ignoring the coming data bytes.
SM2 has no effect in Mode 0,and in Mode 1 can be used to check the validity of the stop bit. In a Mode 1 reception, if SM2 = 1, the receive interrupt will not be activated unless a vatid stop bit is received.
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8.5 Automatic Address Recognition
Automatic Address Recognition is a future which allows the UART to recognize certain addresses in the serial
bit stream by using hardware to make the comparisons. This feature saves a great deal of software overhead by
eliminating the need for the software to examine every serial address which passes by the serial port. This feature
is enabled by setting the SM2 bit in SCON. In the 9-bit UART modes, Mode 2 and Mode 3, the Receive interrupt
flag(RI) will be automatically set when the received byte contains either the “Given” address or the “Broadcast”
address. The 9-bit mode requires that the 9th information bit is a “1” to indicate that the received information is an
address and not data.
The 8-bit mode is called Mode 1. In this mode the RI flag will be set if SM2 is enabled and the information
received has a valid stop bit following the 8 address bits and the information is either a Given or Broadcast
address.
Mode 0 is the Shift Register mode and SM2 is ignored.
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Using the Automatic Address Recognition feature allows a master to selectively communicate with one or more
slaves by invoking the given slave address or addresses. All of the slaves may be contacted by using the broadcast
address. Two special function registers are used to define the slave’s address, SADDR, and the address mask,
SADEN. SADEN is used to define which bits in the SADDR are to be used and which bits are “don’t care”. The
SADEN mask can be logically ANDed with the SADDR to create the “Given” address which the master will
use for addressing each of the slaves. Use of the Given address allows multiple slaves to be recognized which
excluding others. The following examples will help to show the versatility of this scheme :
Slave 0
SADDR = 1100 0000
SADEN = 1111 1101
GIVEN = 1100 00x0
Slave 1
SADDR = 1100 0000
SADEN = 1111 1110
GIVEN = 1100 000x
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In the previous example SADDR is the same and the SADEN data is used to differentiate between the two slaves.
Slave 0 requires a “0” in bit 0 and it ignores bit 1. Slave 1 requires a “0” in bit 1 and bit 0 is ignored. A unique
address for slave 0 would be 11000010 since slave 1 requires a “0” in bit 1. A unique address for slave 1 would
be 11000001 since a “1” in bit 0 will exclude slave 0. Both slaves can be selected at the same time by an address
which has bit 0=0 (for slave 0) and bit 1 =0 (for salve 1). Thus, both could be addressed with 11000000.
In a more complex system the following could be used to select slaves 1 and 2 while excluding slave 0:
Slave 0
SADDR = 1100 0000
SADEN = 1111 1001
GIVEN = 1100 0xx0
Slave 1
SADDR = 1110 0000
SADEN = 1111 1010
GIVEN = 1110 0x0x
Slave 2
SADDR = 1110 0000
SADEN = 1111 1100
GIVEN = 1110 00xx
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In the above example the differentiation among the 3 slaves is in the lower 3 address bits.Slave 0 requires that
bit0 = 0 and it can be uniquely addressed by 11100110. Slave 1 requires that bit 1=0 and it can be uniquely
addressed by 11100101. Slave 2 requires that bit 2=0 and its unique address is 11100011. To select Salve 0 and 1
and exclude Slave 2, use address 11100100, since it is necessary to make bit2=1 to exclude Slave 2.
The Broadcast Address for each slave is created by taking the logic OR of SADDR and SADEN. Zeros in this
result are trended as don’t cares. In most cares, interpreting the don’t cares as ones, the broadcast address will be
FF hexadecimal.
Upon reset SADDR and SADEN are loaded with “0”s. This produces a given address of all “don’t cares as well
as a Broadcast address of all “don’t cares”. This effectively disables the Automatic Addressing mode and allows
the microcontroller to use standard 80C51-type UART drivers which do not make use of this feature.
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Example: write an program that continually transmits characters from a transmit buffer. If incoming characters
are detected on the serial port, store them in the receive buffer starting at internal RAM location 50H. Assume that
the STC12C2052AD series MCU serial port has already been initialized in mode 1.
Solution:
Li
ORG
0030H
MOV R0,
#30H
;pointer for tx buffer
MOV R1,
#50H
;pointer for rx buffer
LOOP: JB
RI,
RECEIVE
;character received?
;yes: process it
JB
TI,
TX
;previous character transmitted ?
;yes: process it
SJMP LOOP
;no: continue checking
TX:
MOV A,
@R0
;get character from tx buffer
MOV C,
P
;put parity bit in C
CPL
C
;change to odd parity
MOV ACC.7, C
;add to character code
CLR
TI
;clear transmit flag
MOV SBUF, A
;send character
CLR
ACC.7
;strip off parity bit
INC
R0
;point to next character in buffer
CJNE R0,
#50H, LOOP
;end of buffer?
;no: continue
MOV R0,
#30H
;yes: recycle
SJMP LOOP
;continue checking
RX:
CLR
RI
;clear receive flag
MOV A,
SBUF
;read character into A
MOV C,
P
;for odd parity in A, P should be set
CPL
C
;complementing correctly indicates "error"
CLR
ACC.7
;strip off parity
MOV @R1, A
;store received character in buffer
INC
R1
;point to next location in buffer
SJMP LOOP
;continue checking
END
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8.6 Buad Rates
The baud rate in Mode 0 is fixed:
Mode 0 Baud Rate =
or =
SYSclk
12
SYSclk
2
when AUXR.5/UART_M0x6 =0
when AUXR.5/UART_M0x6 =1
The baud rate in Mode 2 depends on the value of bit SMOD in Special Function Register PCON. If SMOD =0
(which is the value on reset), the baud rate 1/64 the System clock cycle. If SMOD = 1, the baud rate is 1/32 the
System clock cycle .
2SMOD
(SYSclk)
��������
Mode 2 Baud Rate =
64
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In the STC12C2052AD, the baud rates in Modes 1 and 3 are determined by Timer 1 overflow rate.
The baud rate in Mode 1 and 3 are fixed:
Mode 1,3 Baud rate = (2SMOD /32 ) x timer 1 overflow rate
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Timer 1 overflow rate = (SYSclk/12)/(256 - TH1);
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When Timer 1 is used as the baud rate generator, the Timer 1 interrupt should be disabled in this application.
The Timer itself can be configured for either “timer” or “cormter” operation, and in any of its 3 running modes.
In the most typcial applications, it is configured for “timer” operation, in the auto-reload mode (high nibble of
TMOD = 0010B).
One can achieve very low baud rate with Timer 1 by leaving the Timer 1 interrupt enabled, and configuring the
Timer to run as a 16-bit timer (high nibble of TMOD = 0001B), and using the Timer 1 interrupt to do a l6-bit
software reload.
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The following figure lists various commonly used baud rates and how they can be obtained from Timer 1.
Baud Rate
fOSC
SMOD
Mode 0 MAX:1MHZ
Mode 2 MAX:375K
Mode 1,3:62.5K
19.2K
9.6K
4.8K
2.4K
1.2K
137.5
110
110
12MHZ
12MHZ
12MHZ
11.059MHZ
11.059MHZ
11.059MHZ
11.059MHZ
11.059MHZ
11.986MHZ
6MHZ
12MHZ
X
1
1
1
0
0
0
0
0
0
0
Timer 1
Reload
C/T Mode
Value
X
X
X
X
X
X
0
2
FFH
0
2
FDH
0
2
FDH
0
2
FAH
0
2
F4H
0
2
E8H
0
2
1DH
0
2
72H
0
1 FEEBH
Timer 1 Generated Commonly Used Baud Rates
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8.7 Demo Programs about UART (C and ASM)
1. C program:
/*-------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -----------------------------------*/
/* --- STC12C5Axx Series MCU UART (8-bit/9-bit)Demo ----------*/
/* --- Mobile: (86)13922809991 ------------------------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*-------------------------------------------------------------------------------*/
#include "reg51.h"
#include "intrins.h"
typedef unsigned char
typedef unsigned int
BYTE;
WORD;
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#define FOSC 18432000L
#define BAUD 9600
//System frequency
//UART baudrate
/*Define UART parity mode*/
#define NONE_PARITY 0
#define ODD_PARITY 1
#define EVEN_PARITY 2
#define MARK_PARITY 3
#define SPACE_PARITY 4
//None parity
//Odd parity
//Even parity
//Mark parity
//Space parity
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#define PARITYBIT
sbit
bit
bit9 = P2^2;
busy;
EVEN_PARITY
//Testing even parity
//P2.2 show UART data bit9
void SendData(BYTE dat);
void SendString(char *s);
void main()
{
#if (PARITYBIT == NONE_PARITY)
SCON = 0x50;
//8-bit variable UART
#elif (PARITYBIT == ODD_PARITY) || (PARITYBIT == EVEN_PARITY) || (PARITYBIT == MARK_PARITY)
SCON = 0xda;
//9-bit variable UART, parity bit initial to 1
#elif (PARITYBIT == SPACE_PARITY)
SCON = 0xd2;
//9-bit variable UART, parity bit initial to 0
#endif
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TMOD
TH1
TR1
ES
EA
SendString("STC12C2052AD\r\nUart Test !\r\n");
while(1);
= 0x20;
= TL1 = -(FOSC/12/32/BAUD);
= 1;
= 1;
= 1;
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//Set Timer1 as 8-bit auto reload mode
//Set auto-reload vaule
//Timer1 start run
//Enable UART interrupt
//Open master interrupt switch
}
/*---------------------------UART interrupt service routine
----------------------------*/
void Uart_Isr() interrupt 4 using 1
{
if (RI)
{
RI = 0;
P0 = SBUF;
bit9 = RB8;
}
if (TI)
{
TI = 0;
busy = 0;
}
}
/*---------------------------Send a byte data to UART
Input: dat (data to be sent)
Output:None
----------------------------*/
void SendData(BYTE dat)
{
while (busy);
ACC = dat;
if (P)
{
#if (PARITYBIT == ODD_PARITY)
TB8 = 0;
#elif (PARITYBIT == EVEN_PARITY)
TB8 = 1;
#endif
}
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//Clear receive interrupt flag
//P0 show UART data
//P2.2 show parity bit
//Clear transmit interrupt flag
//Clear transmit busy flag
//Wait for the completion of the previous data is sent
//Calculate the even parity bit P (PSW.0)
//Set the parity bit according to P
//Set parity bit to 0
//Set parity bit to 1
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else
{
#if (PARITYBIT == ODD_PARITY)
TB8 = 1;
#elif (PARITYBIT == EVEN_PARITY)
TB8 = 0;
#endif
}
busy = 1;
SBUF = ACC;
}
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/*---------------------------Send a string to UART
Input: s (address of string)
Output:None
----------------------------*/
void SendString(char *s)
{
while (*s)
{
SendData(*s++);
}
}
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//Set parity bit to 1
//Set parity bit to 0
//Send data to UART buffer
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//Check the end of the string
//Send current char and increment string ptr
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2. Assembly program:
/*-------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -----------------------------------*/
/* --- STC12C5Axx Series MCU UART (8-bit/9-bit)Demo ----------*/
/* --- Mobile: (86)13922809991 ------------------------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*-------------------------------------------------------------------------------*/
;/*Define UART parity mode*/
#define NONE_PARITY 0
#define ODD_PARITY 1
#define EVEN_PARITY 2
#define MARK_PARITY 3
#define SPACE_PARITY 4
M
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#define PARITYBIT
EVEN_PARITY
;----------------------------------------BUSY BIT
20H.0
;----------------------------------------
ORG 0000H
LJMP MAIN
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//None parity
//Odd parity
//Even parity
//Mark parity
//Space parity
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//Testing even parity
;transmit busy flag
ORG 0023H
LJMP UART_ISR
;----------------------------------------
ORG 0100H
MAIN:
CLR BUSY
CLR EA
MOV SP,
#3FH
#if (PARITYBIT == NONE_PARITY)
MOV SCON, #50H
;8-bit variable UART
#elif (PARITYBIT == ODD_PARITY) || (PARITYBIT == EVEN_PARITY) || (PARITYBIT == MARK_PARITY)
MOV SCON, #0DAH
;9-bit variable UART, parity bit initial to 1
#elif (PARITYBIT == SPACE_PARITY)
MOV SCON, #0D2H
;9-bit variable UART, parity bit initial to 0
#endif
;-------------------------------
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MOV TMOD, #20H
MOV A,
#0FBH
MOV TH1,
A
MOV TL1,
A
SETB TR1
SETB ES
SETB EA
;------------------------------
MOV DPTR, #TESTSTR
LCALL SENDSTRING
;------------------------------
SJMP $
;----------------------------------------TESTSTR:
;Test string
DB
"STC12C2052AD Uart Test !",
;/*---------------------------;UART2 interrupt service routine
;----------------------------*/
UART_ISR:
PUSH ACC
PUSH PSW
JNB RI,
CHECKTI
CLR RI
MOV P0,
SBUF
MOV C,
RB8
MOV P2.2,
C
CHECKTI:
JNB TI,
ISR_EXIT
CLR TI
CLR BUSY
ISR_EXIT:
POP PSW
POP ACC
RETI
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;/*---------------------------;Send a byte data to UART
;Input: ACC (data to be sent)
;Output:None
;----------------------------*/
SENDDATA:
JB
BUSY, $
MOV ACC, A
JNB P,
EVEN1INACC
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;Set Timer1 as 8-bit auto reload mode
;256-18432000/12/32/9600
;Set auto-reload vaule
;Timer1 start run
;Enable UART interrupt
;Open master interrupt switch
;Load string address to DPTR
;Send string
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;Check RI bit
;Clear RI bit
;P0 show UART data
;P2.2 show parity bit
;Check S2TI bit
;Clear S2TI bit
;Clear transmit busy flag
;Wait for the completion of the previous data is sent
;Calculate the even parity bit P (PSW.0)
;Set the parity bit according to P
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ODD1INACC:
#if (PARITYBIT == ODD_PARITY)
CLR TB8
#elif (PARITYBIT == EVEN_PARITY)
SETB TB8
#endif
SJMP PARITYBITOK
EVEN1INACC:
#if (PARITYBIT == ODD_PARITY)
SETB TB8
#elif (PARITYBIT == EVEN_PARITY)
CLR TB8
#endif
PARITYBITOK:
SETB BUSY
MOV SBUF, A
RET
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;/*---------------------------;Send a string to UART
;Input: DPTR (address of string)
;Output:None
;----------------------------*/
SENDSTRING:
CLR A
MOVC A,
@A+DPTR
JZ
STRINGEND
INC DPTR
LCALL SENDDATA
SJMP SENDSTRING
STRINGEND:
RET
;----------------------------------------
END
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;Set parity bit to 0
;Set parity bit to 1
;Set parity bit to 1
;Set parity bit to 0
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;Parity bit set completed
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;Send data to UART buffer
;Get current char
;Check the end of the string
;increment string ptr
;Send current char
;Check next
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Chapter 9. Analog to Digital Converter
9.1 A/D Converter Structure
STC12C2052AD series MCU with A/D conversion function have 8-channel and 8-bit high-speed A/D converter
whose speed is up to 100KHz (100 thousand times per second). the 8-channel ADC, which are on P1 port
(P1.0-P1.7) , can be used as temperature detection, battery voltage detection, key scan, spectrum detection, etc.
After power on reset, P1 ports are in weak pull-up mode. Users can set any one of 8 channels as A/D conversion
through software. And those I/O ports not as ADC function can continue to be used as I/O ports.
STC12C2052AD series MCU ADC (A/D converter) structure is shown below.
ADC_CONTR Register
ADC_POWER SPEED1
Analog input Signal channel
Select switch CHS2/CHS1/CHS0
ADC7/P1.7
ADC6/P1.6
ADC5/P1.5
ADC4/P1.4
ADC3/P1.3
ADC2/P1.2
ADC1/P1.1
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SPEED0
ADC_FLAG
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ADC_START CHS2 CHS1 CHS0
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ADC result Register : ADC_ DATA
Successive
Approximation
Register
+
-
Comparator
ADC0/P1.0
8-bit DAC
ADC_DATA[7:0]
ADC_B9 ADC_B8 ADC_B7 ADC_B6 ADC_B5 ADC_B4 ADC_B3 ADC_B2
The ADC on STC12C2052AD is an 8-bit resolution, successive-approximation approach, medium-speed A/D
converter. VREFP/VREFM is the positive/negative reference voltage input for internal voltage-scaling DAC use, the
typical sink current on it is 600uA ~ 1mA. For STC12C2052AD, these two references are internally tied to VCC
and GND separately.
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Conversion is invoked since ADC_STRAT(ADC_CONTR.3) bit is set. Before invoking conversion,
ADC_POWER/ADC_CONTR.7 bit should be set first in order to turn on the power of analog front-end in
ADC circuitry. Prior to ADC conversion, the desired I/O ports for analog inputs should be configured as inputonly or open-drain mode first. The converter takes around a fourth cycles to sample analog input data and other
three fourths cycles in successive-approximation steps. Total conversion time is controlled by two register bits
– SPEED1 and SPEED0. Eight analog channels are available on P1 and only one of them is connected to to the
comparator depending on the selection bits {CHS2,CHS1,CHS0}. When conversion is completed, the result
will be saved onto ADC_DATA register. After the result are completed and saved, ADC_FLAG is also set.
ADC_FLAG should be cleared in software. The ADC interrupt service routine vectors to 2Bh . When the chip
enters idle mode or power-down mode, the power of ADC is gated off by hardware.
Calculating the result according to the following formula:
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8-bit A/D Conversion Result:(ADC_DATA[7:0]) = 256 x
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Vin
Vcc
In the above formula, Vin stand for analog input channel voltage, Vcc stand for actual operation voltage
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9.2 Registers for ADC
Mnemonic
Description
Address
P1M0
P1M1
P1 Configuration 0
P1 Configuration 1
91H
92H
ADC_CONTR ADC Control Register
C5H
ADC_DATA ADC Result Register
IE
Interrupt Enable
Interrupt Priority
IP
Low
Interrupt Priority
IPH
High
AUXR
Auxiliary register
C6H
A8H
MSB
bit address and Symbol
LSB
Reset value
0000 0000B
0000 0000B
ADC_POWER SPEED1 SPEED0 ADC_FLAG ADC_START CHS2 CHS1 CHS0
EA EPCA_LVD EADC_SPI
ES
ET1
EX1
ET0 EX0
0000 0000B
0000 0000B
0000 0000B
B8H
- PPCA_LVD PADC_SPI PS PT1 PX1 PT0 PX0 x000 0000B
B7H
-
A2H
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PPCA_LVDH PADC_SPIH PSH PT1H PX1H PT0H PX0H
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T0x12 T1x12 UART_M0x12 EADCI ESPI ELVDI
1. P1 Analog Function Configure register: P1M0 and P1M1
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-
x000 0000B
0000 00xxB
Those P1 ports which need to be used as A/D converter should be first set in open-drain or high-impedance
(input-only) mode through registers P1M0 and P1M1.
P1 Configure (P1��������
address:90H�)
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P1M0[7 : 0] P1M1 [7 : 0]
0
0
0
1
1
0
1
1
I/O ports Mode
quasi_bidirectional(standard 8051 I/O port output) ,
Sink Current up to 20mA , pull-up Current is 230μA ,
Because of manufactured error, the actual pull-up current is 250uA ~ 150uA
push-pull output(strong pull-up output,current can be up to 20mA, resistors
need to be added to restrict current
input-only (high-impedance ).
If any P1 port need to be used as ADC, its mode is optional between inputonly (high-impedance ) and open-drain mode.
Open Drain,internal pull-up resistors should be disabled and external
pull-up resistors need to join.
If any P1 port need to be used as ADC, its mode is optional between inputonly (high-impedance ) and open-drain mode.
Example: MOV P1M0, #10100000B
MOV P1M1, #11000000B
;P1.7 in Open Drain mode, P1.6 in strong push-pull output, P1.5 in high-impedance input, P1.4/P1.3/P1.2/
P1.1/P1.0 in quasi_bidirectional�������������
/weak pull-up
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2. ADC control register: ADC_CONTR (Non bit-addressable)
SFR name
Address
ADC_CONTR
C5H
bit
B7
B6
B5
B4
B3
B2
B1
B0
name ADC_POWER SPEED1 SPEED0 ADC_FLAG ADC_START CHS2 CHS1 CHS0
When operating to ADC_CONTR register, "MOV" should be used, while "AND" and "OR" don not be
recommended to use
ADC_POWER : When clear shut down the power of ADC block. When set turn on the power of ADC block.
SPEED1, SPEED0 : Conversion speed selection.
SPEED1 SPEED0 Times needed by an A/D Coversion
0
0
1080 clock cycles are needed for a conversion.
0
1
810 clock cycles are needed for a conversion.
1
0
540 clock cycles are needed for a conversion.
1
1
270 clock cycles are needed for a conversion. When the CPU operation
frequency is 27MHz, the speed of ADC is about 100KHz.
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The clock source used by ADC block of STC12C2052AD series MCU is On-chip R/C clock which is not divided
by Clock divider register CLK_DIV.
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ADC_FLAG : ADC interrupt flag.It will be set by the device after the device has finished a conversion, and
should be cleared by the user's software.
ADC_STRAT : ADC start bit, which enable ADC conversion.It will automatically cleared by the device after the
device has finished the conversion.
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CHS2 ~ CHS0 : Used to select one analog input source from 8 channels.
CHS2 CHS1 CHS0
Source
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
P1.0 (default) as the A/D channel input
P1.1 as the A/D channel input
P1.2 as the A/D channel input
P1.3 as the A/D channel input
P1.4 as the A/D channel input
P1.5 as the A/D channel input
P1.6 as the A/D channel input
P1.7 as the A/D channel input
Note : The corresponding bits in P1ASF should be configured correctly before starting A/D conversion. The
sepecific P1ASF bits should be set corresponding with the desired channels.
Because it will by delayed 4 CPU clocks after the instruction which set ADC_CONTR register has been executed,
Four "NOP" instructions should be added after setting ADC_CONTR register. See the following code:
MOV ADC_CONTR, #DATA
NOP
NOP
NOP
NOP
MOV A,
ADC_CONTR
;Only delayed 4 clocks, can the ADC_CONTR be read correctly.
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3. ADC result register: ADC_DATA
ADC_DATA is used to save the ADC result, their format as shown below:
Mnemonic
Add
ADC_DATA C6h
Name
B7
B6
B5
B4
B3
B2
B1
B0
ADC result
register high
Calculating the result according to the following formula:
8-bit A/D Conversion Result:(ADC_DATA[7:0]) = 256 x
Vin
Vcc
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Li
4. Registers related with UART1 interrupt : IE, AUXR, IP and IPH
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IE: Interrupt Enable Rsgister (Bit-addressable)
SFR name Address
IE
A8H
bit
B7
name
EA
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EA : disables all interrupts.
M
B6
B5
EPCA_LVD EADC_SPI
B4
B3
B2
B1
B0
ES
ET1
EX1
ET0
EX0
If EA = 0,no interrupt will be acknowledged.
If EA = 1, each interrupt source is individually enabled or disabled by setting or clearing its enable bit.
EADC_SPI : Interrupt controller of Serial Peripheral Interface (SPI) and A/D Converter (ADC).
If EADC_SPI = 0, Disable the interrupt of Serial Peripheral Interface (SPI) and A/D Converter (ADC).
If EADC_SPI = 1, Enable the interrupt of Serial Peripheral Interface (SPI) and A/D Converter (ADC).
AUXR: Auxiliary register (Non bit-addressable)
SFR name
AUXR
Address
8EH
bit
B7
B6
B5
B4
name T0x12 T1x12 UART_M0x6 EADCI
B3
ESPI
B2
ELVDI
B1
-
B0
-
EADCI : Enable/Disable interrupt from A/D converter
0 : (default) Inhibit the ADC functional block to generate interrupt to the MCU
1 : Enable the ADC functional block to generate interrupt to the MCU
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IPH: Interrupt Priority High Register (Non bit-addressable)
SFR name Address
IPH
B7H
bit
B7
name
-
B6
B5
PPCA_LVDH PADC_SPIH
B4
B3
B2
B1
B0
PSH
PT1H
PX1H
PT0H
PX0H
IP: Interrupt Priority Register (Bit-addressable)
SFR name Address
IP
B8H
bit
B7
name
-
B6
B5
PPCA_LVD PADC_SPI
B4
B3
B2
B1
B0
PS
PT1
PX1
PT0
PX0
PADC_SPIH, PADC_SPI : Serial Peripheral Interface (SPI) and A/D Converter (ADC) interrupt priority control bits.
if PADC_SPIH=0 and PADC_SPI=0, Serial Peripheral Interface (SPI) and A/D Converter (ADC)
interrupt are assigned lowest priority(priority 0).
if PADC_SPIH=0 and PADC_SPI=1, Serial Peripheral Interface (SPI) and A/D Converter (ADC)
interrupt are assigned lowest priority(priority 1).
if PADC_SPIH=1 and PADC_SPI=0, Serial Peripheral Interface (SPI) and A/D Converter (ADC)
interrupt are assigned lowest priority(priority 2).
if PADC_SPIH=1 and PADC_SPI=1, Serial Peripheral Interface (SPI) and A/D Converter (ADC)
interrupt are assigned lowest priority(priority 3).
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9.3 Application Circuit of A/D Converter
1
28
Vcc
P2.3
2
27
P2.1
RST
3
26
P2.0/PCA2/PWM2
RxD/P3.0
4
25
P1.7/ADC7
24
P1.6/ADC6
23
P1.5/ADC5
22
P1.4/ADC4
21
P1.3/ADC3
20
P1.2/ADC2
19
P1.1/ADC1/CLKOUT1
TxD/P3.1
5
XTAL2
6
XTAL1
7
INT0/P3.2
8
INT1/P3.3
9
ECI/T0/P3.4
10
PWM1/PCA1/T1/P3.5
11
PWM3/PCA3/P2.4
SOP-28/SKDIP-28
P2.2
more than 47pF 1K
18
P1.0/ADC0/CLKOUT0
12
17
P3.7/PCA0/PWM0
P2.5
13
16
P2.7
Gnd
14
15
P2.6
Signal source
ADC function in P1 port, P1.0 - P1.7 in all 8 channels
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9.4 ADC Application Circuit for Key Scan
P2.2
1
28
Vcc
P2.3
2
27
P2.1
Vcc
3
26
P2.0/PCA2/PWM2
4
25
P1.7/ADC7
TxD/P3.1
5
24
P1.6/ADC6
XTAL2
6
23
P1.5/ADC5
XTAL1
7
22
P1.4/ADC4
INT0/P3.2
8
21
P1.3/ADC3
INT1/P3.3
9
20
P1.2/ADC2
19
P1.1/ADC1/CLKOUT1
18
P1.0/ADC0/CLKOUT0
SOP-28/SKDIP-28
RST
RxD/P3.0
10K
more than 47pF 1K
0V
10K
1/2 Vcc
10K
2/3 Vcc
10K
ECI/T0/P3.4
10
PWM1/PCA1/T1/P3.5
11
PWM3/PCA3/P2.4
12
17
P3.7/PCA0/PWM0
P2.5
13
16
P2.7
Gnd
14
15
P2.6
3/4 Vcc
10K
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4/5 Vcc
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ADC function in P1 port, P1.0 - P1.7 in all 8 channels
CU
+5V
M
1
28
Vcc
P2.3
2
27
P2.1
RST
3
26
P2.0/PCA2/PWM2
RxD/P3.0
4
25
P1.7/ADC7
TxD/P3.1
5
24
P1.6/ADC6
XTAL2
6
23
P1.5/ADC5
22
P1.4/ADC4
21
P1.3/ADC3
20
P1.2/ADC2
19
P1.1/ADC1/CLKOUT1
18
P1.0/ADC0/CLKOUT0
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XTAL1
7
INT0/P3.2
8
INT1/P3.3
9
SOP-28/SKDIP-28
P2.2
47pF
sw1
ECI/T0/P3.4
10
PWM1/PCA1/T1/P3.5
11
PWM3/PCA3/P2.4
12
17
P3.7/PCA0/PWM0
P2.5
13
16
P2.7
Gnd
14
15
P2.6
+5V
R0
ADCx 10KΩ
sw1
R2
520Ω
R3
1.8KΩ
R4
R5
R6
3.3KΩ 5.4KΩ 8.2KΩ
sw2
sw3
sw4
0`0.5
0
0.5`1
1`1.5
sw5
sw6
1.5`2.0 2.0`2.5
This curcuit can realize the single key scan
and assembling key scan detection function,
but the value of resistors should be adjusted
according to the actual demand.
10 keys are used to divide the voltage in the below curcuit, what the error of each
key float between -0.25V and +0.25V can effectively avoid that resistance error or
temprature difit lead to disable key detection.
R1
520Ω
47pF
R1
10KΩ
ADCx
R2
1.2KΩ
sw2
R3
1.6KΩ
sw3
R4
1.8KΩ
sw4
R5
3KΩ
sw5
R6
4KΩ
sw6
R7
6.5Ω
sw7
R8
10KΩ
sw8
R9
30KΩ
sw9
R10
100KΩ
sw10
sw11
0
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9.5 A/D reference voltage source
STC12C2052AD series ADC reference voltage is from MCU power supply voltage directly, so it can work
without an external reference voltage source. If the required precision is relatively high, then you maybe using
a stable reference voltage source, in order to calculate the operating voltage VCC, then calculate the ADC exact
value. For example, you can connect a 1.25V(or 1.00V, ect. …) to ADC channel 7, according to the conversion
result, you can get the actual VCC voltage, thus you can calculate other 7 channels ADC results. (Vcc is constant
in short time)
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9.6 Program using interrupts to demostrate A/D Conversion
There are two example procedures using interrupts to demostrate A/D conversion, one written in C langugage and
the other in assembly language.
1. C language code listing:
/*---------------------------------------------------------------------------------*/
/* --- STC MCU International Limited ------------------------------------*/
/* --- STC 1T Series MCU A/D Conversion Demo ----------------------*/
/* --- Mobile: (86)13922809991 --------------------------------------------*/
/* --- Fax: 86-755-82905966 ------------------------------------------------*/
/* --- Tel: 86-755-82948412 -------------------------------------------------*/
/* --- Web: www.STCMCU.com --------------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*---------------------------------------------------------------------------------*/
#include "reg51.h"
#include "intrins.h"
#define FOSC 18432000L
#define BAUD 9600
typedef unsigned char
typedef unsigned int
BYTE;
WORD;
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/*Declare SFR associated with the ADC */
sfr AUXR
= 0x8e;
sfr ADC_CONTR = 0xC5;
sfr ADC_DATA = 0xC6;
sfr ADC_LOW2 = 0xBE;
sfr P1M0
= 0x91;
sfr P1M1
= 0x92;
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//ADC control register
//ADC high 8-bit result register
//ADC low 2-bit result register
//P1 mode control register0
//P1 mode control register1
/*Define ADC operation const for ADC_CONTR*/
#define ADC_POWER 0x80
//ADC power control bit
#define ADC_FLAG
0x10
//ADC complete flag
#define ADC_START 0x08
//ADC start control bit
#define ADC_SPEEDLL 0x00
//1080 clocks
#define ADC_SPEEDL 0x20
//810 clocks
#define ADC_SPEEDH 0x40
//540 clocks
#define ADC_SPEEDHH 0x60
//270 clocks
void InitUart();
void SendData(BYTE dat);
void Delay(WORD n);
void InitADC();
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BYTE ch = 0;
void main()
{
InitUart();
InitADC();
AUXR |= 0x10;
IE = 0xa0;
while (1);
}
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//ADC channel NO.
//Init UART, use to show ADC result
//Init ADC sfr
//set EADCI
//Enable ADC interrupt and Open master interrupt switch
//Start A/D conversion
/*---------------------------ADC interrupt service routine
----------------------------*/
void adc_isr() interrupt 5 using 1
{
ADC_CONTR &= !ADC_FLAG;
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M
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SendData(ch);
SendData(ADC_DATA);
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//Clear ADC interrupt flag
//Show Channel NO.
//Get ADC high 8-bit result and Send to UART
//if you want show 10-bit result, uncomment next line
// SendData(ADC_LOW2);
//Show ADC low 2-bit result
if (++ch > 7) ch = 0;
//switch to next channel
ADC_CONTR = ADC_POWER | ADC_SPEEDLL | ADC_START | ch;
}
/*---------------------------Initial ADC sfr
----------------------------*/
void InitADC()
{
P1 = P1M0 = P1M1 = 0xff;
//Set all P1 as Open-Drain mode
ADC_DATA = 0;
//Clear previous result
ADC_CONTR = ADC_POWER | ADC_SPEEDLL | ADC_START | ch;
Delay(2);
//ADC power-on delay and Start A/D conversion
}
/*---------------------------Initial UART
----------------------------*/
212
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void InitUart()
{
SCON = 0x5a;
TMOD = 0x20;
TH1 = TL1 = -(FOSC/12/32/BAUD);
TR1 = 1;
}
/*---------------------------Send one byte data to PC
Input: dat (UART data)
Output:----------------------------*/
void SendData(BYTE dat)
{
while (!TI);
TI = 0;
SBUF = dat;
}
/*---------------------------Software delay function
----------------------------*/
void Delay(WORD n)
{
WORD x;
}
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//8 bit data ,no parity bit
//T1 as 8-bit auto reload
//Set Uart baudrate
//T1 start running
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//Wait for the previous data is sent
//Clear TI flag
//Send current data
Li
while (n--)
{
x = 5000;
while (x--);
}
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2. Assembly language code listing:
;/*----------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited -------------------------------------*/
;/* --- STC 1T Series MCU A/D Conversion Demo -----------------------*/
;/* --- Mobile: (86)13922809991 ---------------------------------------------*/
;/* --- Fax: 86-755-82905966 -------------------------------------------------*/
;/* --- Tel: 86-755-82948412 --------------------------------------------------*/
;/* --- Web: www.STCMCU.com ---------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*-----------------------------------------------------------------------------------*/
;/*Declare SFR associated with the ADC */
AUXR
EQU
8EH
ADC_CONTR EQU 0C5H
ADC_DATA
EQU 0C6H
ADC_LOW2 EQU 0BEH
P1M0
EQU 091H
P1M1
EQU 092H
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;ADC control register
;ADC high 8-bit result register
;ADC low 2-bit result register
;P1 mode control register0
;P1 mode control register1
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;/*Define ADC operation const for ADC_CONTR*/
ADC_POWER EQU 80H
;ADC power control bit
ADC_FLAG
EQU 10H
;ADC complete flag
ADC_START EQU 08H
;ADC start control bit
ADC_SPEEDLL EQU 00H
;1080 clocks
ADC_SPEEDL EQU
20H
;810 clocks
ADC_SPEEDH EQU 40H
;540 clocks
ADC_SPEEDHH EQU 60H
;270 clocks
C
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ADCCH
DATA 20H
;ADC channel NO.
;----------------------------------------
ORG 0000H
LJMP MAIN
ORG 002BH
LJMP ADC_ISR
;----------------------------------------
ORG 0100H
MAIN:
MOV SP,
MOV ADCCH, #0
LCALL INIT_UART
LCALL INIT_ADC
ORL AUXR, #10H
MOV IE,
#0A0H
SJMP $
214
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#3FH
;Init UART, use to show ADC result
;Init ADC sfr
;set EADCI
;Enable ADC interrupt and Open master interrupt switch
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;/*---------------------------;ADC interrupt service routine
;----------------------------*/
ADC_ISR:
PUSH ACC
PUSH PSW
ANL
MOV
LCALL
MOV
LCALL
ADC_CONTR,
#NOT ADC_FLAG
A,
ADCCH
SEND_DATA
A,
ADC_DATA
SEND_DATA
;//if you want show 10-bit result, uncomment next 2 lines
;
MOV A,
ADC_LOW2
;
LCALL SEND_DATA
INC
MOV
ANL
MOV
ORL
MOV
POP
POP
RETI
;Clear ADC interrupt flag
;Send channel NO.
;Get ADC high 8-bit result
;Send to UART
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;Get ADC low 2-bit result
;Send to UART
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ADCCH
A,
ADCCH
A,
#07H
ADCCH, A
A,
#ADC_POWER | ADC_SPEEDLL | ADC_START
ADC_CONTR,A
;ADC power-on delay and re-start A/D conversion
PSW
ACC
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;/*---------------------------;Initial ADC sfr
;----------------------------*/
INIT_ADC:
MOV A,
#0FFH
MOV P1,
A
MOV P1M0, A
MOV P1M1, A
;Set all P1 as Open-Drain mode
MOV ADC_DATA,
#0
;Clear previous result
MOV A,
ADCCH
ORL A,
#ADC_POWER | ADC_SPEEDLL | ADC_START
MOV ADC_CONTR,
A
;ADC power-on delay and Start A/D conversion
MOV A,#2
LCALL DELAY
RET
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;/*---------------------------;Initial UART
;----------------------------*/
INIT_UART:
MOV SCON,
MOV TMOD,
MOV A,
MOV TH1,
MOV TL1,
SETB TR1
RET
;/*---------------------------;Send one byte data to PC
;Input: ACC (UART data)
;Output:;----------------------------*/
SEND_DATA:
JNB TI,
CLR TI
MOV SBUF,
RET
#5AH
#20H
#-5
A
A
$
A
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;/*---------------------------;Software delay function
;----------------------------*/
DELAY:
MOV R2,
CLR A
MOV R0,
MOV R1,
DELAY1:
DJNZ R0,
DJNZ R1,
DJNZ R2,
RET
216
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;8 bit data ,no parity bit
;T1 as 8-bit auto reload
;Set Uart baudrate -(18432000/12/32/9600)
;Set T1 reload value
;T1 start running
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;Wait for the previous data is sent
;Clear TI flag
;Send current data
A
A
A
DELAY1
DELAY1
DELAY1
END
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9.7 Program using polling to demostrate A/D Conversion
There are two example procedures using inquiry to demostrate A/D conversion, one written in C langugage and
the other in assembly language.
1. C language code listing:
/*--------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -----------------------------------*/
/* --- STC 1T Series MCU A/D Conversion Demo ---------------------*/
/* --- Mobile: (86)13922809991 ------------------------------------------*/
/* --- Fax: 86-755-82905966 ----------------------------------------------*/
/* --- Tel: 86-755-82948412 -----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*------------------------------------------------------------------------------*/
#include "reg51.h"
#include "intrins.h"
#define FOSC 18432000L
#define BAUD 9600
typedef unsigned char
typedef unsigned int
BYTE;
WORD;
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/*Declare SFR associated with the ADC */
sfr
ADC_CONTR = 0xC5;
sfr
ADC_DATA
= 0xC6;
sfr
ADC_LOW2 = 0xBE;
sfr
P1M0
= 0x91;
sfr
P1M1
= 0x92;
/*Define ADC operation const for ADC_CONTR*/
#define ADC_POWER 0x80
#define ADC_FLAG
0x10
#define ADC_START
0x08
#define ADC_SPEEDLL 0x00
#define ADC_SPEEDL 0x20
#define ADC_SPEEDH 0x40
#define ADC_SPEEDHH 0x60
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//ADC control register
//ADC high 8-bit result register
//ADC low 2-bit result register
//P1 mode control register0
//P1 mode control register1
//ADC power control bit
//ADC complete flag
//ADC start control bit
//1080 clocks
//810 clocks
//540 clocks
//270 clocks
void InitUart();
void InitADC();
void SendData(BYTE dat);
BYTE GetADCResult(BYTE ch);
void Delay(WORD n);
void ShowResult(BYTE ch);
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void main()
{
InitUart();
InitADC();
while (1)
{
ShowResult(0);
ShowResult(1);
ShowResult(2);
ShowResult(3);
ShowResult(4);
ShowResult(5);
ShowResult(6);
ShowResult(7);
}
}
/*---------------------------Send ADC result to UART
----------------------------*/
void ShowResult(BYTE ch)
{
SendData(ch);
SendData(GetADCResult(ch));
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//if you want show 10-bit result, uncomment next line
//
SendData(ADC_LOW2);
}
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//Init UART, use to show ADC result
//Init ADC sfr
//Show Channel0
//Show Channel1
//Show Channel2
//Show Channel3
//Show Channel4
//Show Channel5
//Show Channel6
//Show Channel7
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//Show Channel NO.
//Show ADC high 8-bit result
//Show ADC low 2-bit result
/*---------------------------Get ADC result
----------------------------*/
BYTE GetADCResult(BYTE ch)
{
ADC_CONTR = ADC_POWER | ADC_SPEEDLL | ch | ADC_START;
_nop_();
//Must wait before inquiry
_nop_();
_nop_();
_nop_();
while (!(ADC_CONTR & ADC_FLAG));
//Wait complete flag
ADC_CONTR &= ~ADC_FLAG;
//Close ADC
return ADC_DATA;
//Return ADC result
}
218
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/*---------------------------Initial UART
----------------------------*/
void InitUart()
{
SCON = 0x5a;
TMOD = 0x20;
TH1 = TL1 = -(FOSC/12/32/BAUD);
TR1 = 1;
}
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//8 bit data ,no parity bit
//T1 as 8-bit auto reload
//Set Uart baudrate
//T1 start running
/*---------------------------Initial ADC sfr
----------------------------*/
void InitADC()
{
P1 = P1M0 = P1M1 = 0xff;
//Set all P1 as Open-Drain mode
ADC_DATA = 0;
//Clear previous result
ADC_CONTR = ADC_POWER | ADC_SPEEDLL;
Delay(2);
//ADC power-on and delay
}
/*---------------------------Send one byte data to PC
Input: dat (UART data)
Output:----------------------------*/
void SendData(BYTE dat)
{
while (!TI);
TI = 0;
SBUF = dat;
}
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//Wait for the previous data is sent
//Clear TI flag
//Send current data
/*---------------------------Software delay function
----------------------------*/
void Delay(WORD n)
{
WORD x;
while (n--)
{
x = 5000;
while (x--);
}
}
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2. Assembly language code listing:
;/*-------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited ----------------------------------*/
;/* --- STC 1T Series MCU A/D Conversion Demo --------------------*/
;/* --- Mobile: (86)13922809991 ------------------------------------------*/
;/* --- Fax: 86-755-82905966 ----------------------------------------------*/
;/* --- Tel: 86-755-82948412 -----------------------------------------------*/
;/* --- Web: www.STCMCU.com -----------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*------------------------------------------------------------------------------*/
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;/*Declare SFR associated with the ADC */
ADC_CONTR EQU 0C5H
ADC_DATA
EQU 0C6H
ADC_LOW2 EQU 0BEH
P1M0
EQU 091H
P1M1
EQU 092H
;ADC control register
;ADC high 8-bit result register
;ADC low 2-bit result register
;P1 mode control register0
;P1 mode control register1
;/*Define ADC operation const for ADC_CONTR*/
ADC_POWER EQU 80H
ADC_FLAG
EQU 10H
ADC_START
EQU 08H
ADC_SPEEDLL EQU 00H
ADC_SPEEDL EQU 20H
ADC_SPEEDH EQU 40H
ADC_SPEEDHH EQU 60H
;ADC power control bit
;ADC complete flag
;ADC start control bit
;1080 clocks
;810 clocks
;540 clocks
;270 clocks
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;----------------------------------------
ORG 0000H
LJMP MAIN
;----------------------------------------
ORG 0100H
MAIN:
LCALL INIT_UART
LCALL INIT_ADC
;------------------------------NEXT:
MOV A,
#0
LCALL SHOW_RESULT
MOV A,
#1
LCALL SHOW_RESULT
MOV A,
#2
LCALL SHOW_RESULT
220
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;Init UART, use to show ADC result
;Init ADC sfr
;Show channel0 result
;Show channel1 result
;Show channel2 result
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MOV
LCALL
MOV
LCALL
MOV
LCALL
MOV
LCALL
MOV
LCALL
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A,
#3
SHOW_RESULT
A,
#4
SHOW_RESULT
A,
#5
SHOW_RESULT
A,
#6
SHOW_RESULT
A,
#7
SHOW_RESULT
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;Show channel3 result
;Show channel4 result
;Show channel5 result
;Show channel6 result
;Show channel7 result
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SJMP NEXT
;/*---------------------------;Send ADC result to UART
;Input: ACC (ADC channel NO.)
;Output:;----------------------------*/
SHOW_RESULT:
LCALL SEND_DATA
LCALL GET_ADC_RESULT
LCALL SEND_DATA
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;//if you want show 10-bit result, uncomment next 2 lines
;
MOV A,
ADC_LOW2
;
LCALL SEND_DATA
RET
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;Show Channel NO.
;Get high 8-bit ADC result
;Show result
;Get low 2-bit ADC result
;Show result
;/*---------------------------;Read ADC conversion result
;Input: ACC (ADC channel NO.)
;Output:ACC (ADC result)
;----------------------------*/
GET_ADC_RESULT:
ORL A,
#ADC_POWER | ADC_SPEEDLL | ADC_START
MOV ADC_CONTR,
A
;Start A/D conversion
NOP
;Must wait before inquiry
NOP
NOP
NOP
WAIT:
MOV A,
ADC_CONTR
;Wait complete flag
JNB ACC.4, WAIT
;ADC_FLAG(ADC_CONTR.4)
ANL ADC_CONTR
,#NOT ADC_FLAG
;Clear ADC_FLAG
MOV A,
ADC_DATA
;Return ADC result
RET
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;/*---------------------------;Initial ADC sfr
;----------------------------*/
INIT_ADC:
MOV A,
#0FFH
MOV P1,
A
MOV P1M0, A
MOV P1M1, A
;Set all P1 as Open-Drain mode
MOV ADC_DATA,#0
;Clear previous result
MOV ADC_CONTR,
#ADC_POWER | ADC_SPEEDLL
MOV A,
#2
;ADC power-on and delay
LCALL DELAY
RET
;/*---------------------------;Initial UART
;----------------------------*/
INIT_UART:
MOV SCON, #5AH
;8 bit data ,no parity bit
MOV TMOD, #20H
;T1 as 8-bit auto reload
MOV A,
#-5
;Set Uart baudrate -(18432000/12/32/9600)
MOV TH1,
A
;Set T1 reload value
MOV TL1,
A
SETB TR1
;T1 start running
RET
U
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S
;/*---------------------------;Send one byte data to PC
;Input: ACC (UART data)
;Output:;----------------------------*/
SEND_DATA:
JNB TI,$
CLR TI
MOV SBUF,
RET
;/*---------------------------;Software delay function
;----------------------------*/
DELAY:
MOV R2,
CLR A
MOV R0,
MOV R1,
DELAY1:
DJNZ R0,
DJNZ R1,
DJNZ R2,
RET
222
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;Wait for the previous data is sent
;Clear TI flag
;Send current data
A
A
A
DELAY1
DELAY1
DELAY1
END
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Chapter 10. Programmable Counter Array(PCA)
The Programmable Counter Array is a special 16-bit Timer that has four 16-bit capture/compare modules
associated with it. Each of the modules can be programmed to operate in one of four modes: rising and/or falling
edge capture (calculator of duty length for high/low pulse), software timer, high-speed output, or pulse width
modulator. Module 0 is connected to pin P3.7, module 1 to pin P3.5, module 2 to pin P2.0, module 3 to pin P2.4
in STC12C2052AD series.
The PCA timer is a common time base for all four modules and can be programmed to run at 1/12 the system
clock, 1/2 the system clock, the Timer 0 overflow or the input on ECI pin(P3.4). The timer count source is
determined from CPS1 and CPS0 bits in the CMOD SFR.
10.1 SFRs related with PCA
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PCA/PWM SFRs table
Mnemonic
Description
Add
B7
B6
B5
CF
CR
-
-
-
CU
CCON
PCA Control Register
D8H
CMOD
PCA Mode Register
D9H CIDL
M
CCAPM0 PCA Module 0 Mode Register DAH
-
CCAPM1 PCA Module 1 Mode Register DBH
-
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Bit address and Symbol
B4
-
B3
B2
B1
-
-
CCF1
-
CPS1 CPS0
B0
Reset
Value
CCF0 00xx,xx00
ECF
0xxx,x000
ECOM0 CAPP0 CAPN0 MAT0 TOG0 PWM0 ECCF0 x000,0000
ECOM1 CAPP1 CAPN1 MAT1 TOG1 PWM1 ECCF1 x000,0000
CL
PCA Base Timer Low
E9H
0000,0000
CH
PCA Base Timer High
F9H
0000,0000
CCAP0L
PCA Module-0 Capture
Register Low
EAH
0000,0000
CCAP0H
PCA Module-0 Capture
Register High
FAH
0000,0000
CCAP1L
PCA Module-1 Capture
Register Low
EBH
0000,0000
CCAP1H
PCA Module-1 Capture
Register High
FBH
0000,0000
PCA_PWM0
PCA PWM Mode Auxiliary
F2H
Register 0
-
-
-
-
-
-
EPC0H EPC0L xxxx,xx00
PCA_PWM1
PCA PWM Mode Auxiliary
F3H
Register 1
-
-
-
-
-
-
EPC1H EPC1L xxxx,xx00
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1. PCA operation mode register: CMOD (Non bit-addressable)
bit
B7
B6
B5
B4
B3
B2
B1
B0
name
CIDL
-
-
-
-
CPS1
CPS0
ECF
SFR name Address
CMOD
D9H
CIDL : PCA Counter control bit in Idle mode.
If CIDL=0, the PCA counter will continue functioning during idle mode.
If CIDL=1, the PCA counter will be gated off during idle mode.
CPS1, CPS0 : PCA Counter Pulse source Select bits.
CPS1 CPS0 Select PCA/PWM clock source
0
0
0, System clock/12, SYSclk/12
0
1
1, System clock/2, SYSclk/2
1
0
2, Timer 0 overflow. PCA/PWM clock can up to SYSclk because Timer 0 can operate in
1T mode. Frequency-adjustable PWM output can be achieved by changing the Timer 0
overflow.
1
1
3, Exrenal clock from ECI/P3.4 pin (max speed = SYSclk/2)
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For example, If CPS1/CPS0=0/0, PCA/PWM clock source is SYSclk/12.
If users need to select SYSclk/3 as PCA clock source, Timer 0 should be set to operate in 1T mode and generate
an overflow every 3 counting pulse.
C
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ECF : PCA Counter Overflow interrupt Enable bit.
ECF=0 disables CF bit in CCON to generate an interrupt.
ECF=1 enables CF bit in CCON to generate an interrupt.
2. PCA control register : CCON (Non bit-addressable)
SFR name
Address
bit
B7
B6
B5
B4
B3
B2
B1
B0
CCON
D8H
name
CF
CR
-
-
-
-
CCF1
CCF0
CF : PCA Counter overflow flag. Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF
in CMOD is set. CF may be set by either hardware or software but can only be cleared by software.
CR : PCA Counter Run control bit. Set by software to turn the PCA counter on. Must be cleared by software to
turn the PCA counter off.
CCF1 : PCA Module 1 interrupt flag. Set by hardware when a match or capture from module 1 occurs. Must
be cleared by software. A match means the value of the PCA counter equals the value of the Capture/
Compare register in module 1. A capture means a specific edge from PCA1 happens, so the Capture/
Compare register latches the value of the PCA counter, and the CCF1 is set.
CCF0 : PCA Module 0 interrupt flag. Set by hardware when a match or capture from module 0 occurs. Must
be cleared by software. A match means the value of the PCA counter equals the value of the Capture/
Compare register in module 0. A capture means a specific edge from PCA0 happens, so the Capture/
Compare register latches the value of the PCA counter, and the CCF0 is set.
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3. PCA capture/campare register CCAPM0 and CCAPM1
Each module in the PCA has a special function register associated with it. These registers are CCAPMn, n=0 and
1. CCAPM0 for module 0, CCAPM1 for module 1. The register contains the bits that control the mode in which
each module will operate. The ECCFn bit enables the CCFn flag in the CCON SFR to generate an interrupt when
a match or compare occurs in the associated module. PWMn enables the pulse width modulation mode. The
TOGn bit when set causes the CCPn output associated with the module to toggle when there is a match between
the PCA counter and the module’s capture/compare register. The match bit(MATn) when set will cause the CCFn
bit in the CCON register to be set when there is a match between the PCA counter and the module’s capture/
compare register.
The next two bits CAPNn and CAPPn determine the edge that a capture input will be active on. The CAPNn bit
enables the negative edge, and the CAPPn bit enables the positive edge. If both bits are set, both edges will be
enabled and a capture will occur for either transition. The bit ECOMn when set enables the comparator function.
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Capture/Compare register of PCA module 0 : CCAPM0 (Non bit-addressable)
SFR name Address
CCAPM0
DAH
bit
B7
name
-
B6
B5
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B4
ECOM0 CAPP0 CAPN0
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ECOM0 : Comparator Enable bit.
ECOM0=0 disables the comparator function;
ECOM0=1 enables the comparator function.
B3
B2
MAT0
TOG0
B1
B0
PWM0 ECCF0
CAPP0 : Capture Positive control bit.
CAPP0=1 enables positive edge capture.
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CAPN0 : Capture Negative control bit.
CAPN0=1 enables negative edge capture.
MAT0 :
Match control bit.
When MAT0 = 1, a match of the PCA counter with this module’s compare/capture register causes the
CCF0 bit in CCON to be set.
TOG0 :
Toggle control bit.
When TOG0=1, a match of the PCA counter with this module’s compare/capture register causes the
CCP0 pin to toggle.
(PCA0/PWM0/P3.7)
PWM0 :
Pulse Width Modulation.
PWM0=1 enables the CCP0 pin to be used as a pulse width modulated output.
(PCA0/PWM0/P3.7)
ECCF0 : Enable CCF0 interrupt.
Enables compare/capture flag CCF0 in the CCON register to generate an interrupt.
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Capture/Compare register of PCA module 1 : CCAPM1 (Non bit-addressable)
SFR name Address
CCAPM1
DBH
bit
B7
name
-
B6
B5
B4
ECOM1 CAPP1 CAPN1
B3
B2
MAT1
TOG1
B1
B0
PWM1 ECCF1
ECOM1 : Comparator Enable bit.
ECOM1=0 disables the comparator function;
ECOM1=1 enables the comparator function.
CAPP1 : Capture Positive control bit.
CAPP1=1 enables positive edge capture.
CAPN1 : Capture Negative control bit.
CAPN1=1 enables negative edge capture.
MAT1 :
Match control bit.
When MAT1 = 1, a match of the PCA counter with this module’s compare/capture register causes the
CCF1 bit in CCON to be set.
TOG1 :
Toggle control bit.
When TOG1=1, a match of the PCA counter with this module’s compare/capture register causes the
CCP1 pin to toggle.
(PCA1/PWM1/P3.5)
PWM1 :
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Pulse Width Modulation.
PWM1=1 enables the CEX1 pin to be used as a pulse width modulated output.
(PCA1/PWM1/P3.5)
ECCF1 : Enable CCF1 interrupt.
Enables compare/capture flag CCF1 in the CCON register to generate an interrupt.
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The operation mode of PCA modules set as shown in the below table.
Setting the operation mode of PCA modules(CCAPMn register,n = 0,1)
- ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn Function of PCA modules
0
0
0
0
0
0
0
No operation
1
0
0
0
0
1
0
8-bit PWM, no interrupt
8-bit PWM output, interrupt can be generated
1
1
0
0
0
1
1
on rising edge.
8-bit PWM output, interrupt can be generated
1
0
1
0
0
1
1
on falling edge.
8-bit PWM output, interrupt can be generated
1
1
1
0
0
1
1
on both rising and falling edges.
16-bit Capture Mode, caputre triggered by the
X
1
0
0
0
0
X
rising edge on CCPn/PCAn pin
16-bit Capture Mode, capture triggered by the
X
0
1
0
0
0
X
falling edge on CCPn/PCAn pin
16-bit Capture Mode, capture triggered by the
X
1
1
0
0
0
X
transition on CCPn/PCAn pin
1
0
0
1
0
0
X
16-bit software timer
1
0
0
1
1
0
X
16-bit high-speed output
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4. PCA 16-bit Counter — low 8-bit CL and high 8-bit CH
The addresses of CL and CH respectively are E9H and F9H, and their reset value both are 00H. CL and CH are
used to save the PCA load value.
5. PCA Capture/Compare register — CCAPnL and CCAPnH
When PCA is used to capture/compare, CCAPnL and CCAPnH are used to save the 16-bit capture value in
corresponding block. When PCA is operated in PWM mode, CCAPnL and CCAPnH are used to control the duty
cycle of PWM output signal. "n=0 or 1" respectively stand for module 0 and 1. Reset value of regsiters CCAPnL
and CCAPnH are both 00H. Their addresses respectively are:
CCAP0L — EAH, CCAP0H — FAH : Capture / Compare register of module 0
CCAP1L — EBH, CCAP1H — FBH : Capture / Compare register of module 1
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6. PWM registers of PCA modules : PCA_PWM0 and PCA_PWM1
PCA_PWM0 : PWM register of PCA module 0
SFR name
Address
bit
B7
PCA_PWM0
F2H
name
-
B6
B5
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-
B4
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B3
B2
-
-
B1
B0
EPC0H EPC0L
B7 ~ B2 : Reserved
EPC0H : Associated with CCAP0H, it is used in PCA PWM mode.
EPC0L : Associated with CCAP0L, it is used in PCA PWM mode.
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PCA_PWM1 : PWM register of PCA module 1
SFR name
Address
bit
B7
B6
B5
B4
B3
B2
PCA_PWM1
F3H
name
-
-
-
-
-
-
B1
B0
EPC1H EPC1L
B7 ~ B2 : Reserved
EPC1H : Associated with CCAP1H, it is used in PCA PWM mode.
EPC1L : Associated with CCAP1L, it is used in PCA PWM mode.
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10.2 PCA/PWM Structure
There are 2 channels Programmable Counter Arrary PCA/PWM in STC12C2052AD series MCU.
16-bit PCA
Timer/Counter
Module 0
P3.7/CCP0/PCA0/PWM0
Module 1
P3.5/CCP1/PCA1/PWM1
Programmable Counter Arrary Structure
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Each PCA/PWM module can be operated in 4 modes : rising / falling capture mode, software timer, high-speed
output mode and adjustable pulse output mode.
STC12C2052AD series: module 0 connect to P3.7/PCA0/PWM0,
module 1 connect to P3.5/PCA1/PWM1.
SYSclk/1
SYSclk/2
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To PCA Module
SYSclk/6
CH CL
16-Bit counter
SYSclk/8
PCA Interrput
SYSclk/12
Timer 0 overflow
External input
ECI(P3.4)
CMOD CIDL
IDLE
CF
-
CR
-
-
-
-
-
CPS1 CPS0
-
-
ECF
CCF1
CCF0
CCON
PCA Timer/Counter
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In the CMOD SFR, there are two additional bits associated with the PCA. They are CIDL which allows the PCA
to stop during idle mode, and ECF which when set causes an interrupt and the PCA overflow flag CF(in the
CCON SFR) to be set when the PCA timer overflows.
The CCON SFR contains the run control bit for PCA and the flags for the PCA timer and each module. To run
the PCA the CR bit(CCON.6) must be set by software; oppositely clearing bit CR will shut off PCA is shut off
PCA. The CF bit(CCON.7) is set when the PCA counter overflows and an interrupt will be generated if the ECF
(CMOD.0) bit in the CMOD register is set. The CF bit can only be cleared by software. There are two bits named
CCF0 and CCF1 in SFR CCON. The CCF0 and CCF1 are the flags for module 0 and module 1 respectively. They
are set by hardware when either a match or a capture occurs. These flags also can only be cleared by software.
Each module in the PCA has a special function register associated with it, CCAPM0 for module-0 and CCAPM1
for module-1. The register contains the bits that control the mode in which each module will operate. The ECCFn
bit controls if to pass the interrupt from CCFn flag in the CCON SFR to the MCU when a match or compare
occurs in the associated module. PWMn enables the pulse width modulation mode. The TOGn bit when set causes
the pin CCPn output associated with the module to toggle when there is a match between the PCA counter and
the module’s Capture/Compare register. The match bit (MATn) when set will cause the CCFn bit in the CCON
register to be set when there is a match between the PCA counter and the module’s Capture/Compare register.
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The next two bits CAPNn and CAPPn determine the edge type that a capture input will be active on. The CAPNn
bit enables the negative edge, and the CAPPn bit enables the positive edge. If both bits are set, both edges will be
enabled and a capture will occur for either transition. The bit ECOMn when set enables the comparator function.
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10.3 PCA Modules Operation Mode
The operation mode of PCA modules set as shown in the below table.
Setting the operation mode of PCA modules(CCAPMn register,n = 0,1)
- ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn Function of PCA modules
0
0
0
0
0
0
0
No operation
1
0
0
0
0
1
0
8-bit PWM, no interrupt
8-bit PWM output, interrupt can be generated
1
1
0
0
0
1
1
on rising edge.
8-bit PWM output, interrupt can be generated
1
0
1
0
0
1
1
on falling edge.
8-bit PWM output, interrupt can be generated
1
1
1
0
0
1
1
on both rising and falling edges.
16-bit Capture Mode, caputre triggered by the
X
1
0
0
0
0
X
rising edge on CCPn/PCAn pin
16-bit Capture Mode, capture triggered by the
X
0
1
0
0
0
X
falling edge on CCPn/PCAn pin
16-bit Capture Mode, capture triggered by the
X
1
1
0
0
0
X
transition on CCPn/PCAn pin
1
0
0
1
0
0
X
16-bit software timer
1
0
0
1
1
0
X
16-bit high-speed output
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10.3.1 PCA Capture Mode
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To use one of the PCA modules in the capture mode either one or both of the CCAPM bits – CAPPn
and CAPNn, for the module must be set. The external CCPn input (CCP0/P3.7, CCP1/P3.5) for the
module is sampled for a transition. When a valid transition occurs, the PCA hardware loads the value
of the PCA counter register(CH and CL) into the module’s capture registers(CCAPnH and CCAPnL).
If the CCFn bit for the module in the CCON SFR and the ECCFn bit in the CCAPMn SFR are set then
an interrupt will be generated.
CF
CR
CCF1
CCF0 CCON (address:D8H)
PCA interrupt
Capture
CCPn
CH
CL
CCAPnH CCAPnL
ECOMn CAPPn CAPNn MATn
0
0
CCAPMn, n=0,1
TOGn PWMn ECCFn Address: DAh, DBh
0
0
PCA Capture Mode
230
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10.3.2 16-bit Software Timer Mode
The PCA modules can be used as software timers by setting both the ECOMn and MATn bits in the modules
CCAPMn register. The PCA timer will be compared to the module’s capture registers and when a match occurs an
interrupt will be generated if the CCFn and ECCFn bits for the module are both set.
write first
Write to CCAPnL
write late
Write to CCAPnH
Stop comparing
0
CF
CR
CCF1 CCF0 CCON
Renew comparing
1
CCAPnH
CCAPnL
PCA Interrupt
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(To CCFn)
Enable
if ECOMn=0, Stop comparing
if ECOMn=0, renew comparing
CH
-
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STC MCU Limited.
16-Bit comparator
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CL
Match
Li
ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn CCAPMn
0
0
1
0
0
PCA Software Timer Mode
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10.3.3 High Speed Output Mode
In this mode the CCPn output (port latch) associated with the PCA module will toggle each time a match occurs
between the PCA counter and the module’s capture registers. To activate this mode the TOGn,MATn,and ECOMn
bits in the module’s CCAPMn SFR must be set.
write first
Write to CCAPnL
write late
Write to CCAPnH
Stop comparing
0
CF
CR
CCF1 CCF0 CCON
Renew comparing
1
CCAPnH
CCAPnL
PCA Interrupt
(To CCFn)
Enable
if ECOMn=0, Stop comparing
if ECOMn=0, renew comparing
CH
-
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16-Bit comparator
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Toggle
CCPn
ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn CCAPMn
0
0
1
1
0
PCA High-Speed Output Mode
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10.3.4 Pulse Width Modulator Mode (PWM mode)
All of the PCA modules can be used as PWM outputs. The frequency of the output depends on the
source for the PCA timer. All of the modules will have the same frequency of output because they all
share the same PCA timer. The duty cycle of each module is independently variable using the module’
s capture register CCAPnL and EPCnL bit in PCAPWMn register. When the value of the PCA CL SFR
is less than the value in the module’s {EPCnL,CCAPnL} SFR, the output will be low. When it is equal
to or greater than , the output will be high. When CL overflows from FFH to 00H, {EPCnL,CCAPnL}
is reloaded with the value in {EPCnH,CCAPnH}. That allows updating the PWM without glitches.
The PWMn and ECOMn bits in the module’s CCAPMn register must be set to enable the PWM mode.
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EPCnL CCAPnL
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enable
9-BIT
COMPARATOR
output 0
(0,CL)=(EPCnL,CCPnL)
PWMn
CCPn
output 1
0
CL
CL overflow
-
ECOMn CAPPn
1
0
CAPNn MATn
0
0
TOGn
0
PWMn
1
ECCFn CCAPMn, n=0,1
0
PCA PWM mode
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10.4 Programs for PCA module extended external interrupt (C and ASM)
There are two programs for PCA module extended external interrupt demo, one wrriten in C language and the
other in assembly language.
1. C code listing:
/*-------------------------------------------------------------------------------------*/
/* --- STC MCU International Limited ----------------------------------------*/
/* --- STC 1T Series MCU PCA module Extended external interrupt ----*/
/* --- Mobile: (86)13922809991 -----------------------------------------------*/
/* --- Fax: 86-755-82905966 ---------------------------------------------------*/
/* --- Tel: 86-755-82948412 ----------------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*------------------------------------------------------------------------------------*/
#include "reg51.h"
#include "intrins.h"
typedef unsigned char BYTE;
typedef unsigned int WORD;
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/*Declare SFR associated with the PCA */
sbit
EPCAI
= IE^6;
sfr
CCON
= 0xD8;
sbit
CCF0
= CCON^0;
sbit
CCF1
= CCON^1;
sbit
CR
= CCON^6;
sbit
CF
= CCON^7;
sfr
CMOD
= 0xD9;
sfr
CL
= 0xE9;
sfr
CH
= 0xF9;
sfr
CCAPM0
= 0xDA;
sfr
CCAP0L
= 0xEA;
sfr
CCAP0H
= 0xFA;
sfr
CCAPM1
= 0xDB;
sfr
CCAP1L
= 0xEB;
sfr
CCAP1H
= 0xFB;
sfr
CCAPM2
= 0xDC;
sfr
CCAP2L
= 0xEC;
sfr
CCAP2H
= 0xFC;
sfr
CCAPM3
= 0xDD;
sfr
CCAP3L
= 0xED;
sfr
CCAP3H
= 0xFD;
sfr
PCAPWM0
= 0xF2;
sfr
PCAPWM1
= 0xF3;
sfr
PCAPWM2
= 0xF4;
sfr
PCAPWM3
= 0xF5;
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//PCA control register
//PCA module-0 interrupt flag
//PCA module-1 interrupt flag
//PCA timer run control bit
//PCA timer overflow flag
//PCA mode register
//PCA base timer LOW
//PCA base timer HIGH
//PCA module-0 mode register
//PCA module-0 capture register LOW
//PCA module-0 capture register HIGH
//PCA module-1 mode register
//PCA module-1 capture register LOW
//PCA module-1 capture register HIGH
//PCA module-2 mode register
//PCA module-2 capture register LOW
//PCA module-2 capture register HIGH
//PCA module-3 mode register
//PCA module-3 capture register LOW
//PCA module-3 capture register HIGH
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sbit
PCA_LED
Mobile:(86)13922809991
= P1^0;
void PCA_isr() interrupt 7 using 1
{
CCF0 = 0;
PCA_LED = !PCA_LED;
}
void main()
{
CCON = 0;
CL = 0;
CH = 0;
CMOD = 0x00;
CCAPM0 = 0x11;
//
CCAPM0 = 0x21;
//
CCAPM0 = 0x31;
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CR = 1;
EPCAI = 1;
EA = 1;
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//PCA test LED
//Clear interrupt flag
//toggle the test pin while CEX0(P1.3) have a falling edge
//Initial PCA control register
//PCA timer stop running
//Clear CF flag
//Clear all module interrupt flag
//Reset PCA base timer
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//Set PCA timer clock source as Fosc/12
//Disable PCA timer overflow interrupt
//PCA module-0 capture by a negative tigger on CEX0(P1.3)
//and enable PCA interrupt
//PCA module-0 capture by a rising edge on CEX0(P1.3)
//and enable PCA interrupt
//PCA module-0 capture by a transition (falling/rising edge)
//on CEX0(P1.3) and enable PCA interrupt
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//PCA timer start run
while (1);
}
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2. Assembly code listing:
;/*------------------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited ---------------------------------------------*/
;/* --- STC 1T Series MCU PCA module Extended external interrupt ----------*/
;/* --- Mobile: (86)13922809991 -----------------------------------------------------*/
;/* --- Fax: 86-755-82905966 ---------------------------------------------------------*/
;/* --- Tel: 86-755-82948412 ----------------------------------------------------------*/
;/* --- Web: www.STCMCU.com -----------------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*-------------------------------------------------------------------------------------------*/
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;/*Declare SFR associated with the PCA */
EPCAI
BIT
IE.6
CCON
CCF0
CCF1
CR
CF
CMOD
CL
CH
CCAPM0
CCAP0L
CCAP0H
CCAPM1
CCAP1L
CCAP1H
CCAPM2
CCAP2L
CCAP2H
CCAPM3
CCAP3L
CCAP3H
EQU
BIT
BIT
BIT
BIT
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
0D8H
CCON.0
CCON.1
CCON.6
CCON.7
0D9H
0E9H
0F9H
0DAH
0EAH
0FAH
0DBH
0EBH
0FBH
0DCH
0ECH
0FCH
0DDH
0EDH
0FDH
PCA_LED
BIT
P1.0
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;PCA control register
;PCA module-0 interrupt flag
;PCA module-1 interrupt flag
;PCA timer run control bit
;PCA timer overflow flag
;PCA mode register
;PCA base timer LOW
;PCA base timer HIGH
;PCA module-0 mode register
;PCA module-0 capture register LOW
;PCA module-0 capture register HIGH
;PCA module-1 mode register
;PCA module-1 capture register LOW
;PCA module-1 capture register HIGH
;PCA module-2 mode register
;PCA module-2 capture register LOW
;PCA module-2 capture register HIGH
;PCA module-3 mode register
;PCA module-3 capture register LOW
;PCA module-3 capture register HIGH
;PCA test LED
;----------------------------------------
ORG 0000H
LJMP MAIN
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ORG 0033H
PCA_ISR:
CLR CCF0
CPL PCA_LED
RETI
;----------------------------------------
ORG 0100H
MAIN:
MOV CCON, #0
CLR A
MOV CL,
A
MOV CH,
A
MOV CMOD, #00H
MOV CCAPM0,#11H
;
MOV CCAPM0,#21H
;
MOV CCAPM0,#31H
;------------------------------
SETB CR
SETB EPCAI
SETB EA
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S
Tel:86-755-82948412
Fax:86-755-82905966
;Clear interrupt flag
;toggle the test pin while CEX0(P1.3) have a falling edge
;Initial PCA control register
;PCA timer stop running
;Clear CF flag
;Clear all module interrupt flag
;
;Reset PCA base timer
;
;Set PCA timer clock source as Fosc/12
;Disable PCA timer overflow interrupt
;PCA module-0 capture by a falling edge on CEX0(P1.3)
;and enable PCA interrupt
;PCA module-0 capture by a rising edge on CEX0(P1.3)
;and enable PCA interrupt
;PCA module-0 capture by a transition (falling/rising edge)
;on CEX0(P1.3) and enable PCA interrupt
U
C
M
.
d
e
mit
Li
;PCA timer start run
SJMP $
;----------------------------------------
END
STC MCU Limited.
website:www.STCMCU.com
237
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
10.5 Demo Programs for PCA module acted as 16-bit Timer (C and ASM)
There are two programs for PCA module acted as 16-bit Timer demo, one wrriten in C language and the other in
assembly language.
1. C code listing:
;/*------------------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited ---------------------------------------------*/
;/* --- STC 1T Series MCU PCA module acted as 16-bit Timer Demo ---------*/
;/* --- Mobile: (86)13922809991 -----------------------------------------------------*/
;/* --- Fax: 86-755-82905966 ---------------------------------------------------------*/
;/* --- Tel: 86-755-82948412 ----------------------------------------------------------*/
;/* --- Web: www.STCMCU.com -----------------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*------------------------------------------------------------------------------------------*/
#include "reg51.h"
#include "intrins.h"
#define FOSC 18432000L
#define T100Hz (FOSC / 12 / 100)
typedef unsigned char
typedef unsigned int
BYTE;
WORD;
C
T
S
U
C
M
/*Declare SFR associated with the PCA */
sbit
EPCAI
= IE^6;
sfr
CCON
= 0xD8;
sbit
CCF0
= CCON^0;
sbit
CCF1
= CCON^1;
sbit
CR
= CCON^6;
sbit
CF
= CCON^7;
sfr
CMOD
= 0xD9;
sfr
CL
= 0xE9;
sfr
CH
= 0xF9;
sfr
CCAPM0
= 0xDA;
sfr
CCAP0L
= 0xEA;
sfr
CCAP0H
= 0xFA;
sfr
CCAPM1
= 0xDB;
sfr
CCAP1L
= 0xEB;
sfr
CCAP1H
= 0xFB;
sfr
CCAPM2
= 0xDC;
sfr
CCAP2L
= 0xEC;
sfr
CCAP2H
= 0xFC;
sfr
CCAPM3
= 0xDD;
sfr
CCAP3L
= 0xED;
sfr
CCAP3H
= 0xFD;
238
STC MCU Limited.
.
d
e
t
i
m
Li
//PCA control register
//PCA module-0 interrupt flag
//PCA module-1 interrupt flag
//PCA timer run control bit
//PCA timer overflow flag
//PCA mode register
//PCA base timer LOW
//PCA base timer HIGH
//PCA module-0 mode register
//PCA module-0 capture register LOW
//PCA module-0 capture register HIGH
//PCA module-1 mode register
//PCA module-1 capture register LOW
//PCA module-1 capture register HIGH
//PCA module-2 mode register
//PCA module-2 capture register LOW
//PCA module-2 capture register HIGH
//PCA module-3 mode register
//PCA module-3 capture register LOW
//PCA module-3 capture register HIGH
website:www.STCMCU.com
www.STCMCU.com
sbit
PCA_LED
Mobile:(86)13922809991
= P1^0;
Tel:86-755-82948412
Fax:86-755-82905966
//PCA test LED
BYTE cnt;
WORD value;
void PCA_isr() interrupt 7 using 1
{
CCF0 = 0;
CCAP0L = value;
CCAP0H = value >> 8;
value += T100Hz;
if (cnt-- == 0)
{
cnt = 100;
PCA_LED = !PCA_LED;
}
}
void main()
{
CCON = 0;
U
C
M
C
T
S
CL = 0;
CH = 0;
CMOD = 0x00;
value = T100Hz;
CCAP0L = value;
CCAP0H = value >> 8;
value += T100Hz;
CCAPM0 = 0x49;
CR = 1;
EPCAI = 1;
EA = 1;
cnt = 0;
while (1);
//Clear interrupt flag
//Update compare value
.
d
e
mit
//Count 100 times
//Flash once per second
Li
//Initial PCA control register
//PCA timer stop running
//Clear CF flag
//Clear all module interrupt flag
//Reset PCA base timer
//Set PCA timer clock source as Fosc/12
//Disable PCA timer overflow interrupt
//Initial PCA module-0
//PCA module-0 work in 16-bit timer mode
//and enable PCA interrupt
//PCA timer start run
}
STC MCU Limited.
website:www.STCMCU.com
239
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
2. Assembly code listing:
;/*------------------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited ---------------------------------------------*/
;/* --- STC 1T Series MCU PCA module acted as 16-bit Timer Demo ---------*/
;/* --- Mobile: (86)13922809991 -----------------------------------------------------*/
;/* --- Fax: 86-755-82905966 ---------------------------------------------------------*/
;/* --- Tel: 86-755-82948412 ---------------------------------------------------------*/
;/* --- Web: www.STCMCU.com ----------------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*-----------------------------------------------------------------------------------------*/
T100Hz
EQU
3C00H
;/*Declare SFR associated with the PCA */
EPCAI
BIT
IE.6
CCON
CCF0
CCF1
CR
CF
CMOD
CL
CH
CCAPM0
CCAP0L
CCAP0H
CCAPM1
CCAP1L
CCAP1H
CCAPM2
CCAP2L
CCAP2H
CCAPM3
CCAP3L
CCAP3H
PCA_LED
EQU
BIT
BIT
BIT
BIT
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
0D8H
CCON.0
CCON.1
CCON.6
CCON.7
0D9H
0E9H
0F9H
0DAH
0EAH
0FAH
0DBH
0EBH
0FBH
0DCH
0ECH
0FCH
0DDH
0EDH
0FDH
BIT
P1.0
C
T
S
U
C
M
.
d
e
t
i
m
;(18432000 / 12 / 100)
Li
;PCA control register
;PCA module-0 interrupt flag
;PCA module-1 interrupt flag
;PCA timer run control bit
;PCA timer overflow flag
;PCA mode register
;PCA base timer LOW
;PCA base timer HIGH
;PCA module-0 mode register
;PCA module-0 capture register LOW
;PCA module-0 capture register HIGH
;PCA module-1 mode register
;PCA module-1 capture register LOW
;PCA module-1 capture register HIGH
;PCA module-2 mode register
;PCA module-2 capture register LOW
;PCA module-2 capture register HIGH
;PCA module-3 mode register
;PCA module-3 capture register LOW
;PCA module-3 capture register HIGH
;PCA test LED
CNT
EQU 20H
;----------------------------------------
ORG 0000H
LJMP MAIN
240
STC MCU Limited.
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
Tel:86-755-82948412
Fax:86-755-82905966
ORG 0033H
LJMP PCA_ISR
;----------------------------------------
ORG 0100H
MAIN:
MOV SP,
#3FH
;Initial stack point
MOV CCON, #0
;Initial PCA control register
;PCA timer stop running
;Clear CF flag
;Clear all module interrupt flag
CLR A
;
MOV CL,
A
;Reset PCA base timer
MOV CH,
A
;
MOV CMOD, #00H
;Set PCA timer clock source as Fosc/12
;Disable PCA timer overflow interrupt
;------------------------------
MOV CCAP0L, #LOW T100Hz
;
MOV CCAP0H,#HIGH T100Hz
;Initial PCA module-0
MOV CCAPM0,#49H
;PCA module-0 work in 16-bit timer mode and enable PCA interrupt
;------------------------------
SETB CR
;PCA timer start run
SETB EPCAI
SETB EA
MOV CNT,
#100
C
T
S
U
C
M
SJMP $
;----------------------------------------PCA_ISR:
PUSH PSW
PUSH ACC
CLR CCF0
MOV A,
CCAP0L
ADD A,
#LOW T100Hz
MOV CCAP0L, A
MOV A,
CCAP0H
ADDC A,
#HIGH T100Hz
MOV CCAP0H,A
DJNZ CNT,
PCA_ISR_EXIT
MOV CNT,
#100
CPL PCA_LED
PCA_ISR_EXIT:
POP ACC
POP PSW
RETI
;----------------------------------------
END
STC MCU Limited.
.
d
e
mit
Li
;Clear interrupt flag
;Update compare value
;count 100 times
;Flash once per second
website:www.STCMCU.com
241
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
10.6 Programs for PCA module as 16-bit High Speed Output(C and ASM)
There are two programs for PCA module as 16-bit High Speed Output, one wrriten in C language and the other in
assembly language.
1. C code listing:
;/*--------------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited -----------------------------------------*/
;/* --- STC 1T Series MCU PCA module as 16-bit High Speed Output ----*/
;/* --- Mobile: (86)13922809991 -------------------------------------------------*/
;/* --- Fax: 86-755-82905966 -----------------------------------------------------*/
;/* --- Tel: 86-755-82948412 ------------------------------------------------------*/
;/* --- Web: www.STCMCU.com -------------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*---------------------------------------------------------------------------------------*/
#include "reg51.h"
#include "intrins.h"
#define FOSC 18432000L
#define T100KHz (FOSC / 4 / 100000)
C
T
S
typedef unsigned char
typedef unsigned int
BYTE;
WORD;
U
C
M
.
d
e
t
i
m
Li
/*Declare SFR associated with the PCA */
sbit
EPCAI
= IE^6;
sfr
sbit
sbit
sbit
sbit
sfr
sfr
sfr
sfr
sfr
sfr
sfr
sfr
sfr
sfr
sfr
sfr
sfr
sfr
sfr
242
CCON
CCF0
CCF1
CR
CF
CMOD
CL
CH
CCAPM0
CCAP0L
CCAP0H
CCAPM1
CCAP1L
CCAP1H
CCAPM2
CCAP2L
CCAP2H
CCAPM3
CCAP3L
CCAP3H
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
0xD8;
CCON^0;
CCON^1;
CCON^6;
CCON^7;
0xD9;
0xE9;
0xF9;
0xDA;
0xEA;
0xFA;
0xDB;
0xEB;
0xFB;
0xDC;
0xEC;
0xFC;
0xDD;
0xED;
0xFD;
STC MCU Limited.
//PCA control register
//PCA module-0 interrupt flag
//PCA module-1 interrupt flag
//PCA timer run control bit
//PCA timer overflow flag
//PCA mode register
//PCA base timer LOW
//PCA base timer HIGH
//PCA module-0 mode register
//PCA module-0 capture register LOW
//PCA module-0 capture register HIGH
//PCA module-1 mode register
//PCA module-1 capture register LOW
//PCA module-1 capture register HIGH
//PCA module-2 mode register
//PCA module-2 capture register LOW
//PCA module-2 capture register HIGH
//PCA module-3 mode register
//PCA module-3 capture register LOW
//PCA module-3 capture register HIGH
website:www.STCMCU.com
www.STCMCU.com
sbit
PCA_LED
Mobile:(86)13922809991
= P1^0;
Tel:86-755-82948412
Fax:86-755-82905966
//PCA test LED
BYTE cnt;
WORD value;
void PCA_isr( ) interrupt 7 using 1
{
CCF0 = 0;
CCAP0L = value;
CCAP0H = value >> 8;
value += T100KHz;
}
void main()
{
CCON = 0;
//Clear interrupt flag
//Update compare value
U
C
M
CL = 0;
CH = 0;
CMOD = 0x02;
value = T100KHz;
CCAP0L = value;
CCAP0H = value >> 8;
value += T100KHz;
CCAPM0 = 0x4d;
C
T
S
CR = 1;
EPCAI = 1;
EA = 1;
cnt = 0;
while (1);
.
d
e
mit
//Initial PCA control register
//PCA timer stop running
//Clear CF flag
//Clear all module interrupt flag
//Reset PCA base timer
Li
//Set PCA timer clock source as Fosc/2
//Disable PCA timer overflow interrupt
//P1.3 output 100KHz square wave
//Initial PCA module-0
//PCA module-0 work in 16-bit timer mode
//and enable PCA interrupt, toggle the output pin CEX0(P1.3)
//PCA timer start run
}
STC MCU Limited.
website:www.STCMCU.com
243
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
2. Assembly code listing:
;/*--------------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited -----------------------------------------*/
;/* --- STC 1T Series MCU PCA module as 16-bit High Speed Output ----*/
;/* --- Mobile: (86)13922809991 -------------------------------------------------*/
;/* --- Fax: 86-755-82905966 -----------------------------------------------------*/
;/* --- Tel: 86-755-82948412 ------------------------------------------------------*/
;/* --- Web: www.STCMCU.com -------------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*---------------------------------------------------------------------------------------*/
T100KHz
EQU
2EH
;/*Declare SFR associated with the PCA */
CCON
EQU 0D8H
CCF0
BIT
CCON.0
CCF1
BIT
CCON.1
CR
BIT
CCON.6
CF
BIT
CCON.7
CMOD
EQU 0D9H
CL
EQU 0E9H
CH
EQU 0F9H
CCAPM0
EQU 0DAH
CCAP0L
EQU 0EAH
CCAP0H
EQU 0FAH
CCAPM1
EQU 0DBH
CCAP1L
EQU 0EBH
CCAP1H
EQU 0FBH
CCAPM2
EQU 0DCH
CCAP2L
EQU 0ECH
CCAP2H
EQU 0FCH
CCAPM3
EQU 0DDH
CCAP3L
EQU 0EDH
CCAP3H
EQU 0FDH
;----------------------------------------
ORG 0000H
LJMP MAIN
C
T
S
ORG
PCA_ISR:
PUSH
PUSH
CLR
244
U
C
M
.
d
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i
m
;(18432000 / 4 / 100000)
Li
;PCA control register
;PCA module-0 interrupt flag
;PCA module-1 interrupt flag
;PCA timer run control bit
;PCA timer overflow flag
;PCA mode register
;PCA base timer LOW
;PCA base timer HIGH
;PCA module-0 mode register
;PCA module-0 capture register LOW
;PCA module-0 capture register HIGH
;PCA module-1 mode register
;PCA module-1 capture register LOW
;PCA module-1 capture register HIGH
;PCA module-2 mode register
;PCA module-2 capture register LOW
;PCA module-2 capture register HIGH
;PCA module-3 mode register
;PCA module-3 capture register LOW
;PCA module-3 capture register HIGH
0033H
PSW
ACC
CCF0
STC MCU Limited.
;Clear interrupt flag
website:www.STCMCU.com
www.STCMCU.com
MOV
ADD
MOV
CLR
ADDC
MOV
Mobile:(86)13922809991
A,
CCAP0L
A,
#T100KHz
CCAP0L, A
A
A,
CCAP0H
CCAP0H,A
PCA_ISR_EXIT:
POP ACC
POP PSW
RETI
;----------------------------------------
ORG 0100H
MAIN:
MOV CCON, #0
CLR A
MOV CL,
A
MOV CH,
A
MOV CMOD, #02H
;------------------------------
MOV CCAP0L, #T100KHz
MOV CCAP0H,#0
MOV CCAPM0,#4dH
;------------------------------
SETB CR
SETB EA
SJMP $
;----------------------------------------
END
C
T
S
STC MCU Limited.
Tel:86-755-82948412
Fax:86-755-82905966
;Update compare value
.
d
e
mit
;Initial PCA control register
;PCA timer stop running
;Clear CF flag
;Clear all module interrupt flag
;
;Reset PCA base timer
;
;Set PCA timer clock source as Fosc/2
;Disable PCA timer overflow interrupt
U
C
M
Li
;P1.3 output 100KHz square wave
;Initial PCA module-0
;PCA module-0 work in 16-bit timer mode
;and enable PCA interrupt, toggle the output pin CEX0(P1.3)
;PCA timer start run
website:www.STCMCU.com
245
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
10.7 Demo Programs for PCA module as PWM Output (C and ASM)
1. C code listing:
*------------------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited --------------------------------------------*/
;/* --- STC 1T Series MCU PCA module output PWM wave Demo -----------*/
;/* --- Mobile: (86)13922809991 ----------------------------------------------------*/
;/* --- Fax: 86-755-82905966 --------------------------------------------------------*/
;/* --- Tel: 86-755-82948412 ---------------------------------------------------------*/
;/* --- Web: www.STCMCU.com ----------------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*------------------------------------------------------------------------------------------*/
#include "reg51.h"
#include "intrins.h"
#define FOSC
18432000L
typedef unsigned char
typedef unsigned int
BYTE;
WORD;
U
C
M
/*Declare SFR associated with the PCA */
sfr
CCON
= 0xD8;
sbit
CCF0
= CCON^0;
sbit
CCF1
= CCON^1;
sbit
CR
= CCON^6;
sbit
CF
= CCON^7;
sfr
CMOD
= 0xD9;
sfr
CL
= 0xE9;
sfr
CH
= 0xF9;
sfr
CCAPM0
= 0xDA;
sfr
CCAP0L
= 0xEA;
sfr
CCAP0H
= 0xFA;
sfr
CCAPM1
= 0xDB;
sfr
CCAP1L
= 0xEB;
sfr
CCAP1H
= 0xFB;
sfr
CCAPM2
= 0xDC;
sfr
CCAP2L
= 0xEC;
sfr
CCAP2H
= 0xFC;
sfr
CCAPM3
= 0xDD;
sfr
CCAP3L
= 0xED;
sfr
CCAP3H
= 0xFD;
sfr
PCAPWM0
= 0xF2;
sfr
PCAPWM1
= 0xF3;
sfr
PCAPWM2
= 0xF4;
sfr
PCAPWM3
= 0xF5;
C
T
S
246
STC MCU Limited.
.
d
e
t
i
m
Li
//PCA control register
//PCA module-0 interrupt flag
//PCA module-1 interrupt flag
//PCA timer run control bit
//PCA timer overflow flag
//PCA mode register
//PCA base timer LOW
//PCA base timer HIGH
//PCA module-0 mode register
//PCA module-0 capture register LOW
//PCA module-0 capture register HIGH
//PCA module-1 mode register
//PCA module-1 capture register LOW
//PCA module-1 capture register HIGH
//PCA module-2 mode register
//PCA module-2 capture register LOW
//PCA module-2 capture register HIGH
//PCA module-3 mode register
//PCA module-3 capture register LOW
//PCA module-3 capture register HIGH
website:www.STCMCU.com
www.STCMCU.com
void main()
{
CCON = 0;
Mobile:(86)13922809991
}
CR = 1;
while (1);
C
T
S
STC MCU Limited.
Fax:86-755-82905966
//Initial PCA control register
//PCA timer stop running
//Clear CF flag
//Clear all module interrupt flag
//Reset PCA base timer
CL = 0;
CH = 0;
CMOD = 0x02;
CCAP0H = CCAP0L = 0x80;
CCAPM0 = 0x42;
CCAP1H = CCAP1L = 0xff;
PCAPWM1 = 0x03;
CCAPM1 = 0x42;
Tel:86-755-82948412
//Set PCA timer clock source as Fosc/2
//Disable PCA timer overflow interrupt
//PWM0 port output 50% duty cycle square wave
//PCA module-0 work in 8-bit PWM mode
//and no PCA interrupt
.
d
e
mit
Li
//PWM1 port output 0% duty cycle square wave
//PCA module-1 work in 8-bit PWM mode
//and no PCA interrupt
U
C
M
//PCA timer start run
website:www.STCMCU.com
247
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
2. Assembly code listing:
*------------------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited --------------------------------------------*/
;/* --- STC 1T Series MCU PCA module output PWM wave Demo -----------*/
;/* --- Mobile: (86)13922809991 ----------------------------------------------------*/
;/* --- Fax: 86-755-82905966 --------------------------------------------------------*/
;/* --- Tel: 86-755-82948412 ---------------------------------------------------------*/
;/* --- Web: www.STCMCU.com ----------------------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*------------------------------------------------------------------------------------------*/
.
d
e
t
i
m
;/*Declare SFR associated with the PCA */
CCON
EQU 0D8H
CCF0
BIT
CCON.0
CCF1
BIT
CCON.1
CR
BIT
CCON.6
CF
BIT
CCON.7
CMOD
EQU 0D9H
CL
EQU 0E9H
CH
EQU 0F9H
CCAPM0
EQU 0DAH
CCAP0L
EQU 0EAH
CCAP0H
EQU 0FAH
CCAPM1
EQU 0DBH
CCAP1L
EQU 0EBH
CCAP1H
EQU 0FBH
CCAPM2
EQU 0DCH
CCAP2L
EQU 0ECH
CCAP2H
EQU 0FCH
CCAPM3
EQU 0DDH
CCAP3L
EQU 0EDH
CCAP3H
EQU 0FDH
;PCA control register
;PCA module-0 interrupt flag
;PCA module-1 interrupt flag
;PCA timer run control bit
;PCA timer overflow flag
;PCA mode register
;PCA base timer LOW
;PCA base timer HIGH
;PCA module-0 mode register
;PCA module-0 capture register LOW
;PCA module-0 capture register HIGH
;PCA module-1 mode register
;PCA module-1 capture register LOW
;PCA module-1 capture register HIGH
;PCA module-2 mode register
;PCA module-2 capture register LOW
;PCA module-2 capture register HIGH
;PCA module-3 mode register
;PCA module-3 capture register LOW
;PCA module-3 capture register HIGH
;----------------------------------------
ORG 0000H
LJMP MAIN
;----------------------------------------
ORG 0100H
MAIN:
MOV CCON, #0
;Initial PCA control register
;PCA timer stop running
;Clear CF flag
;Clear all module interrupt flag
C
T
S
248
STC MCU Limited.
U
C
M
Li
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
Tel:86-755-82948412
Fax:86-755-82905966
CLR
MOV
MOV
MOV
A
;
CL,
A
;Reset PCA base timer
CH,
A
;
CMOD, #02H
;Set PCA timer clock source as Fosc/2
;Disable PCA timer overflow interrupt
;------------------------------
MOV A,
#080H
;
MOV CCAP0H,A
;PWM0 port output 50% duty cycle square wave
MOV CCAP0L,A
;
MOV CCAPM0,#42H
;PCA module-0 work in 8-bit PWM mode and no PCA interrupt
;------------------------------
MOV A,
#0C0H
;
MOV CCAP1H,A
;PWM1 port output 25% duty cycle square wave
MOV CCAP1L,A
;
MOV CCAPM1,#42H
;PCA module-1 work in 8-bit PWM mode and no PCA interrupt
;------------------------------
SETB CR
;PCA timer start run
SJMP $
;----------------------------------------
END
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10.8 Demo Program for PCA clock base on Timer 1 overflow rate
;/*-------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited ----------------------------------*/
;/* --- STC 1T Series achieve adjustable frequency PWM output-----*/
;/* --- Mobile: (86)13922809991 ------------------------------------------*/
;/* --- Fax: 86-755-82905966 ----------------------------------------------*/
;/* --- Tel: 86-755-82948412 -----------------------------------------------*/
;/* --- Web: www.STCMCU.com -----------------------------------------*/
;/* If you want to use the program or the program referenced in the */
;/* article, please specify in which data and procedures from STC */
;/*------------------------------------------------------------------------------*/
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;/*Declare SFR associated with the ADC */
IPH
EQU 0B7H
;Interrupt priority control register high byte
CCON EQU 0D8H
;PCA control register
CCF0 BIT CCON.0
;PCA module-0 interrupt flag
CCF1 BIT CCON.1
;PCA module-1 interrupt flag
CR
BIT CCON.6
;PCA timer run control bit
CF
BIT CCON.7
;PCA timer overflow flag
CMOD EQU 0D9H
;PCA mode register
CL
EQU 0E9H
;PCA base timer LOW
CH
EQU 0F9H
;PCA base timer HIGH
CCAPM0
EQU 0DAH
;PCA module-0 mode register
CCAP0L EQU 0EAH
;PCA module-0 capture register LOW
CCAP0H EQU 0FAH
;PCA module-0 capture register HIGH
CCAPM1
EQU 0DBH
;PCA module-1 mode register
CCAP1L EQU 0EBH
;PCA module-1 capture register LOW
CCAP1H EQU 0FBH
;PCA module-1 capture register HIGH
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;/*Define working LED */
LED_MCU_START
EQU P1.7
LED_5ms_Flashing
EQU P1.6
LED_1S_Flashing EQU P1.5
Channel_5mS_H EQU 01H
Channel_5mS_L EQU 00H
;PCA module-1 5ms counter high byte @ 18.432MHz
;PCA module-1 5ms counter low byte @ 18.432MHz
Timer0_Reload_1 EQU 0F6H
Timer0_Reload_2 EQU 0ECH
;Timer0 auto reload value (-10)
;Timer0 auto reload value (-20)
PWM_WIDTH
;low duty
EQU 0FFH
Counter EQU 030H
250
;counter value
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;----------------------------------------
ORG
0000H
LJMP MAIN
ORG
003BH
LJMP PCA_interrupt
;----------------------------------------
MAIN:
ORG
0050H
CLR
MOV
MOV
ACALL
ACALL
LED_MCU_START
SP,#7FH
Counter,#0
PAC_Initial
Timer0_Initial
;Turn on MCU working LED
;initial Counter var
;initial PCA
;Initial Timer0
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MAIN_Loop:
;------------------------------
MOV TH0,#Timer0_Reload_1
;Set Timer0 overload rate 1
MOV TL0,#Timer0_Reload_1
MOV A,#PWM_WIDTH ;setting duty
MOV CCAP0H,A
ACALL delay
MOV TH0,#Timer0_Reload_2
;Set Timer0 overload rate 2
MOV TL0,#Timer0_Reload_2
ACALL delay
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;------------------------------
MOV TH0,#Timer0_Reload_1
MOV TL0,#Timer0_Reload_1
MOV A,#PWM_WIDTH
ACALL RL_A ;change duty
ACALL RL_A
MOV CCAP0H,A
ACALL delay
MOV TH0,#Timer0_Reload_2
MOV TL0,#Timer0_Reload_2
ACALL delay
;------------------------------
MOV TH0,#Timer0_Reload_1
MOV TL0,#Timer0_Reload_1
MOV A,#PWM_WIDTH
ACALL RL_A ;change duty
STC MCU Limited.
;Set Timer0 overload rate 1
;Set Timer0 overload rate 2
;Set Timer0 overload rate 1
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ACALL
ACALL
ACALL
MOV
ACALL
MOV
MOV
ACALL
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RL_A
RL_A
RL_A
CCAP0H,A
delay
TH0,#Timer0_Reload_2
TL0,#Timer0_Reload_2
delay
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;Set Timer0 overload rate 2
;------------------------------
SJMP MAIN_Loop
;----------------------------------------RL_A:
CLR
C
RRC
A
RET
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;----------------------------------------Timer0_Initial:
MOV TMOD,#02H
;8-bit auto-reload
MOV TH0,#Timer0_Reload_1
MOV TL0,#Timer0_Reload_1
SETB TR0
;strat run
RET
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;----------------------------------------PCA_Initial:
MOV CMOD,#10000100B
;PCA timer base on Timer0
MOV CCON,#00H
;PCA stop count
MOV CL,#0 ;initial PCA counter
MOV CH,#0
MOV CCAPM0,#42H ;PCA module-0 as 8-bit PWM
MOV PCA_PWM0,#0 ;PWM mode 9th bit
;
MOV PCA_PWM0,#03H ;PWM will keep low level
252
MOV
MOV
MOV
SETB
SETB
RET
CCAP1L,#Channel_5mS_L ;initial PCA module-1
CCAP1H,#Channel_5mS_H
CCAPM1,#49H ;PCA module-1 as 16-bit timer
EA
CR
;PCA counter start running
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;----------------------------------------PCA_Interrupt:
PUSH ACC
PUSH PSW
CPL
LED_5mS_Flashing
;Flashing once per 5ms
MOV A,#Channel_5mS_L
ADD
A,CCAP1L
MOV CCAP1L,A
MOV A,#Channel_5mS_H
ADDC A,CCAP1H
MOV CCAP1H,A
CLR
CCF1 ;Clear PCA module-1 flag
INC
Counter
MOV A,Counter
CLR
C
SUBB A,#100 ;Count 100 times
JC
PCA_Interrupt_Exit
MOV Counter,#0
CPL
LED_1S,Flash
PCA_Interrupt_Exit:
POP
PSW
POP
ACC
RETI
;----------------------------------------delay:
CLR
A
MOV R1,A
MOV R2,A
MOV R3,#80H
delay_loop:
NOP
NOP
NOP
DJNZ R1,delay_loop
DJNZ R2,delay_loop
DJNZ R3,delay_loop
RET
;----------------------------------------
END
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10.9 Using PWM achieve D/A Conversion function reference circuit
1
32
VDD
P2.3
2
31
P2.1
RST
3
30
P2.0
RxD/P3.0
4
29
P1.7/ADC7
TxD/P3.1
5
28
P1.6/ADC6
P0.0
6
27
P1.5/ADC5
XTAL2
7
26
P0.3
XTAL1
8
25
P1.4/ADC4
INT0/P3.2
9
24
P1.3/ADC3
SOP-32
P2.2
P0.1
10
23
P0.2
INT1/P3.3
11
22
P1.2/ADC2/LVD
ECI/T0/P3.4
12
21
P1.1/ADC1/CLKOUT1
PWM1/T1/P3.5
13
20
P1.0/ADC0/CLKOUT0
P2.4
14
19
P3.7/PWM0
P2.5
15
18
P2.7
VSS
16
17
P2.6
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D/A
104
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Chapter 11. Serial Peripheral Interface (SPI)
STC12C2052AD provides another high-speed serial communication interface, the SPI interface. SPI
is a full-duplex, high-speed, synchronous communication bus with two operation modes: Master
mode and Slave mode. Up to 3Mbit/s can be supported in either Master or Slave mode under the
SYSclk=12MHz. Two status flags are provided to signal the transfer completion and write-collision
occurrence.
11.1 Special Function Registers related with SPI
SPI Management SFRs
Mnemonic
Description
SPCTL SPI Control Register
SPSTAT SPI Status Register
SPDAT SPI Data Register
Address
85H
84H
86H
Bit address and Symbol
B7
B6
B5
SPCTL
85H
bit
B7
name
SSIG
C
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S
B3
B2
B1
SSIG SPEN DORD MSTR CPOL CPHA SPR1
SPIF WCOL
-
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1. SPI Control register: SPCTL (Non bit-addressable)
SFR name Address
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B6
SPEN
B5
B4
Li
DORD MSTR
B0
Reset
Value
SPR0 0000,0100
00xx,xxxx
0000,0000
B3
B2
B1
B0
CPOL
CPHA
SPR1
SPR0
SSIG :
Control whether SS pin is ignored or not.
If SSIG=1, MSTR(SPCTL.4) decides whether the device is a master or slave.
If SSIG=0, the SS pin decides whether the device is a master or slave. SS pin can be used as I/O port.
SPEN :
SPI enable bit.
If SPEN=0, the SPI interface is disabled and all SPI pins will be general-purpose I/O ports.
If SPEN=1, the SPI is enabled.
DORD : Set the transmitted or received SPI data order.
If DORD=1, The LSB of the data word is transmitted first.
If DORD=0, The MSB of the data word is transmitted first.
MSTR : Master/Slave mode select bit.
If MSTR=0, set the SPI to play as Slave part.
If MSTR=1, set the SPI to play as Master part.
CPOL : SPI clock polarity select bit.
If CPOL=1, SPICLK is high level when in idle mode. The leading edge of SPICLK is the falling edge
and the trailing edge is the rising edge.
If CPOL=0, SPICLK is low when idle. The leading edge of SPICLK is the rising edge and the trailing
edge is the falling edge.
CPHA : SPI clock phase select bit.
If CPHA=1, Data is driven on the leading edge of SPICLK, and is sampled on the trailing edge.
If CPHA=0, Data is driven when SS pin is low (SSIG=0) and changes on the trailing edge of SPICLK.
Data is sampled on the leading edge of SPICLK. (Note : If SSIG=1, CPHA must not be 0,
otherwise the operation is undefined)
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SPR1-SPR0 : SPI clock rate select bit (when in master mode)
SPI clock frequency select bit
SPR1
SPR0
SPI clock (SCLK )
0
0
CPU_CLK/4
0
1
CPU_CLK/16
1
0
CPU_CLK/64
1
1
CPU_CLK/128
CPU_CLK is CPU clock.
When CPHA equals 0, SSIG must be 0 and SS pin must be negated and reasserted between each successive serial
byte transfer. If the SPDAT register is written while SS is active(0), a write collision error results and WCOL is
set.
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When CPHA equals 1, SSIG may be 0 or 1. If SSIG=0, the SS pin may remain active low between successive
transfers(can be tied low at any times). This format is sometimes preferred for use in systems having a signle
fixed master and a single slave configuration.
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2. SPI State register: SPSTAT (Non bit-addressable)
SFR name Address
SPSTAT
SPIF :
CDH
bit
B7
name
SPIF
C
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B6
B5
B4
WCOL
-
-
Li
B3
B2
B1
B0
-
-
-
-
SPI transfer completion flag.
When a serial transfer finishes, the SPIF bit is set and an interrupt is generated if all the EADC_SPI (IE.6)
bit, ESPI bit (AUXR.3) and the EA (IE.7) bit are set. If SS is an input and is driven low when SPI is in
master mode with SSIG = 0, SPIF will also be set to signal the “mode change”.The SPIF is cleared in
software by “writing 1 to this bit”.
WCOL: SPI write collision flag.
The WCOL bit is set if the SPI data register, SPDAT, is written during a data transfer. The WCOL flag is
cleared in software by “writing 1 to this bit”.
3. SPI Data register : SPDAT (Non bit-addressable)
SFR name Address
SPDAT
CFH
bit
B7
B6
B5
B4
B3
B2
B1
B0
name
The SFR SPDAT holds the data to be transmitted or the data received.
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5. Registers related with SPI interrupt : IE, AUXR, IP and IPH
IE: Interrupt Enable Rsgister (Bit-addressable)
SFR name Address
IE
A8H
bit
B7
name
EA
B6
B5
EPCA_LVD EADC_SPI
B4
B3
B2
B1
B0
ES
ET1
EX1
ET0
EX0
EA : disables all interrupts.
If EA = 0,no interrupt will be acknowledged.
If EA = 1, each interrupt source is individually enabled or disabled by setting or clearing its enable bit.
EADC_SPI : Interrupt controller of Serial Peripheral Interface (SPI) and A/D Converter (ADC).
If EADC_SPI = 0, Disable the interrupt of Serial Peripheral Interface (SPI) and A/D Converter (ADC).
If EADC_SPI = 1, Enable the interrupt of Serial Peripheral Interface (SPI) and A/D Converter (ADC).
AUXR: Auxiliary register (Non bit-addressable)
SFR name
AUXR
Address
8EH
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B7
B6
B5
B4
name T0x12 T1x12 UART_M0x6 EADCI
Li
B3
ESPI
B2
ELVDI
B1
-
B0
-
ELVDI : Enable/Disable interrupt from low-voltage sensor
0 : (default)Inhibit the low-voltage sensor functional block to generate interrupt to the MCU
1 : Enable the low-voltage sensor functional block to generate interrupt to the MCU
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ESPI : Enable/Disable interrupt from Serial Peripheral Interface (SPI)
0 : (default)Inhibit the SPI functional block to generate interrupt to the MCU
1 : Enable the SPI functional block to generate interrupt to the MCU
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EADCI : Enable/Disable interrupt from A/D converter
0 : (default) Inhibit the ADC functional block to generate interrupt to the MCU
1 : Enable the ADC functional block to generate interrupt to the MCU
IPH: Interrupt Priority High Register (Non bit-addressable)
SFR name Address
IPH
B7H
bit
B7
name
-
B6
B5
PPCA_LVDH PADC_SPIH
B4
B3
B2
B1
B0
PSH
PT1H
PX1H
PT0H
PX0H
IP: Interrupt Priority Register (Bit-addressable)
SFR name Address
IP
B8H
bit
B7
name
-
B6
B5
PPCA_LVD PADC_SPI
B4
B3
B2
B1
B0
PS
PT1
PX1
PT0
PX0
PADC_SPIH, PADC_SPI : Serial Peripheral Interface (SPI) and A/D Converter (ADC) interrupt priority control bits.
if PADC_SPIH=0 and PADC_SPI=0, Serial Peripheral Interface (SPI) and A/D Converter (ADC)
interrupt are assigned lowest priority(priority 0).
if PADC_SPIH=0 and PADC_SPI=1, Serial Peripheral Interface (SPI) and A/D Converter (ADC)
interrupt are assigned lowest priority(priority 1).
if PADC_SPIH=1 and PADC_SPI=0, Serial Peripheral Interface (SPI) and A/D Converter (ADC)
interrupt are assigned lowest priority(priority 2).
if PADC_SPIH=1 and PADC_SPI=1, Serial Peripheral Interface (SPI) and A/D Converter (ADC)
interrupt are assigned lowest priority(priority 3).
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11.2 SPI Structure
S
M
CPU clock
M
S
8-bit shift register
read data buffer
S
M
clock logic
C
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SPI interrupt request
SPR1
MSTR
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SPR0
CPHA
CPOL
MSTR
SPEN
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SSIG
SPI state register: SPSTAT
DORD
MSTR
SPEN
WCOL
SPI Control
SPIF
clock
SPI clock(host)
SPR0
SPR1
selection
I/O
control
MOSI
P1.5
SCLK
P1.7
SS
P1.4
SPEN
Clock divider
4, 16, 64, 128
MISO
P1.6
SPI Control Register: SPCTL
internal data bus
SPI block diagram
The SPI interface has three pins implementing the SPI functionality: SCLK(P1.7), MISO(P1.6), MOSI(P1.5). An
extra pin SS(P1.4) is designed to configure the SPI to run under Master or Slave mode. SCLK, MOSI and MISO
are typically tied together between two or more SPI devices. Data flows from master to slave on MOSI(Master
Out Slave In) pin and flows from slave to master on MISO(Master In Slave Out) pin. The SCLK signal is output
in the master mode and is input in the slave mode. If the SPI system is disabled, i.e, SPEN(SPCTL.6)=0, these
pins are configured as general-purposed I/O port(P1.4 ~ P1.7).
SS is thel slave select pin. In a typical configuration, an SPI master asserts one of its port pins to select one SPI
device as the current slave. An SPI slave device uses its SS pin to determine whether it is selected. But if SPEN=0
or SSIG(SPCTL.7) bit is 1, the SS pin is ignored. Note that even if the SPI is configured as a master(MSTR/
SPCTL.4=1), it can still be converted to a slave by driving the SS pin low. When the conversion happened, the
SPIF bit(SPSTAT.7) will be set.
Two devices with SPI interface communicate with each other via one synchronous clock signal, one input data
signal, and one output data signal. There are two concerns the user should take care, one of them is latching data
on the negative edge or positive edge of the clock signal which named polarity, the other is keeping the clock
signal low or high while the device idle which named phase. Permuting those states from polarity and phase, there
could be four modes formed, they are SPI-MODE-0, SPI-MODE-1, SPI-MODE-2, SPI-MODE-3. Many device
declares that they meet SPI machanism, but few of them are adaptive to all four modes. The STC12C5A60S2
series are flexible to be configured to communicate to another device with MODE-0, MODE-1, MODE-2 or
MODE-3 SPI, and play part of Master and Slave.
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11.3 SPI Data Communication
11.3.1 SPI Configuration
When SPI data communication, SPEN, SSIG, SS(P1.4) and MSTR jointly control the selection of master and
slave.
Table: SPI master and slave selection
SPEN SSIG
SS
MSTR
(P1.4)
0
X
P1.4
X
1
0
0
0
1
0
1
0
1
0
0
1->0
Mode
MISO
(P1.6)
MOSI
(P1.5)
SPI disable
GPI/O
P1.6
GPI/O
P1.5
GPI/O
P1.7
SPI is disabled. P1.4/P1.5/P1.6/
P1.7 as GPIO.
Selected salve output
input
input
Selected as slave
input
input
Not selected.
input
input
Convert from Master to Slave
Unselected slave Hi-Z
slave
0
1
1
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MOSI and SCLK are in highimpedance state in order to
avoid bus clash when master is
highhighidle. Whether is SCLK pulled
impedance impedance
up or pulled down depends on
input
CPOL/SPCTL.3. But it do not be
allowed that SCLK is suspended.
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Master (idle)
1
output
SPICLK
Remark
(P1.7)
Master (active)
output
output
MOSI and SCLK is strong pushpull output.
1
1
P1.4
0
slave
output
input
input
Slave
1
1
P1.4
1
Master
input
output
output
Master
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11.3.2 SPI Data Communication Modes
There are 3 SPI data communication modes: single master — single slave, dual devices configuration (both can be a
master or slave) and single master — multiple slaves.
Master
Slave
8-bit shift register
SPI clock
generator
MISO
MISO
MOSI
MOSI
SPICLK
8-bit shift register
SPICLK
Port
/SS
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SPI single master — single slave configuration
Li
Master/Slave
MISO
8-bit shift register
SPI clock
generator
C
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CU
MOSI
M
SPICLK
/SS
MISO
MOSI
Master/Slave
8-bit shift register
SPICLK
SPI clock
generator
/SS
SPI dual device configuration, both can be a master or slave
Master
Slave #1
MISO
MISO
8-bit shift register
8-bit shift register
MOSI
SPI clock
generator
SPICLK
Port
MOSI
SPICLK
/SS
Slave #1
MISO
8-bit shift register
MOSI
SPICLK
Port
/SS
SPI single master multiple slaves configuration
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In SPI, transfers are always initiated by the master. If the SPI is enabled(SPEN=1) and selected as master, any
instruction that use SPI data register SPDAT as the destination will starts the SPI clock generator and a data
transfer. The data will start to appear on MOSI about one half SPI bit-time to one SPI bit-time after it. Before
starting the transfer, the master may select a slave by driving the SS pin of the corresponding device low. Data
written to the SPDAT register of the master shifted out of MOSI pin of the master to the MOSI pin of the slave.
And at the same time the data in SPDAT register of the selected slave is shifted out of MISO pin to the MISO pin
of the master. During one byte transfer, data in the master and in the slave is interchanged. After shifting one byte,
the transfer completion flag(SPIF) is set and an interrupt will be created if the SPI interrupt is enabled.
If SPEN=1, SSIG=0, SS pin=1 and MSTR=1, the SPI is enabled in master mode. Before the instruction that use
SPDAT as the destination register, the master is in idle state and can be selected as slave device by any other
master drives the idle master SS pin low. Once this happened, MSTR bit of the idle master is cleared by hardware
and changes its state a selected slave. User software should always check the MSTR bit. If this bit is cleared by
the mode change of SS pin and the user wants to continue to use the SPI as a master later, the user must set the
MSTR bit again, otherwise it will always stay in slave mode.
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The SPI is single buffered in transmit direction and double buffered in receive direction. New data for
transmission can not be written to the shift register until the previous transaction is complete. The WCOL bit is set
to signal data collision when the data register is written during transaction. In this case, the data currently being
transmitted will continue to be transmitted, but the new data which causing the collision will be lost. For receiving
data, received data is transferred into a internal parallel read data buffer so that the shift register is free to accept
a second byte. However, the received byte must be read from the data register(SPDAT) before the next byte has
been completely transferred. Otherwise the previous byte is lost. WCOL can be cleared in software by “writing 1
to the bit”.
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11.3.3 SPI Data Modes
CPHA/SPCTL.2 is SPI clock phase select bit which is used to setting the clock edge of Data sample and change.
CPOL/SPCTL.3 is used to select SPI clock polarity.
The following are some typical timing diagrams which depend on the value of CPHA/SPCTL.2
Clock Cycle
1
2
3
4
5
6
7
8
SCLK(CPOL=0)
SCLK(CPOL=1)
MOSI(input)
DORD=0
DORD=1
MISO(output) DORD=0
MSB
LSB
MSB
LSB
DORD=1
6
1
5
2
4
3
3
4
6
1
5
2
4
3
3
4
Li
SS pin(if SSIG bit=0)
U
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2
5
2
5
1
6
LSB
MSB
1
6
LSB
MSB
undefined
SPI slave transfer format with CPHA=0
C
T
S
Clock Cycle
1
2
3
4
5
6
7
8
SCLK(CPOL=0)
SCLK(CPOL=1)
MOSI(input)
MISO(output)
SS pin(if SSIG bit=0)
DORD=0
DORD=1
DORD=0
DORD=1
1)
MSB
LSB
6
1
5
2
4
3
3
4
2
5
1
6
LSB
MSB
MSB
LSB
6
1
5
2
4
3
3
4
2
5
1
6
LSB
MSB
1)undefined
SPI slave transfer format with CPHA=1
262
STC MCU Limited.
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
1
Clock Cycle
2
3
Tel:86-755-82948412
4
5
6
7
Fax:86-755-82905966
8
SCLK(CPOL=0)
SCLK(CPOL=1)
MOSI(input)
DORD=0
DORD=1
MSB
LSB
MISO(output) DORD=0
DORD=1
MSB
LSB
6
1
5
2
4
3
3
4
2
5
1
6
6
1
5
2
4
3
3
4
2
5
1
6
SS pin(if SSIG bit=0)
1
SCLK(CPOL=0)
SCLK(CPOL=1)
C
T
S
DORD=0
MOSI(input) DORD=1
MISO(output) DORD=0
DORD=1
U
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2
MSB
LSB
MSB
LSB
3
4
5
6
1
5
2
4
3
6
1
5
2
4
3
Li
6
LSB
MSB
.
d
e
mit
SPI master transfer format with CPHA=0
Clock Cycle
LSB
MSB
7
8
3
4
2
5
1
6
3
4
2
5
1
6
LSB
MSB
LSB
MSB
SS pin(if SSIG bit=0)
SPI master transfer format with CPHA=1
*When P4SPI bit in AUXR1 register is set, the function of SPI is redirected from P3[7:4] to P4[7:4]
pin by pin.
STC MCU Limited.
website:www.STCMCU.com
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www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
11.4 SPI Function Demo Programs (Single Master — Single Slave)
11.4.1 SPI Function Demo Programs using Interrupts (C and ASM)
The following program,written in C language and assembly language, tests SPI function and applys to SPI single
master single slave configuration.
1. C code listing:
;/*----------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited -------------------------------------*/
;/* --- STC 1T Series MCU SPI Demo (1 master and 1 slave) -----------*/
;/* --- Mobile: (86)13922809991 ---------------------------------------------*/
;/* --- Fax: 86-755-82905966 -------------------------------------------------*/
;/* --- Tel: 86-755-82948412 --------------------------------------------------*/
;/* --- Web: www.STCMCU.com ---------------------------------------------*/
;/* If you want to use the program or the program referenced in the ----*/
;/* article, please specify in which data and procedures from STC ----*/
;/*-----------------------------------------------------------------------------------*/
#include "reg51.h"
U
C
M
#define MASTER
#define FOSC 18432000L
#define BAUD (256 - FOSC / 32 / 115200)
C
T
S
typedef unsigned char
typedef unsigned int
typedef unsigned long
BYTE;
WORD;
DWORD;
sfr
AUXR = 0x8e;
sfr
#define
#define
sfr
#define
#define
#define
#define
#define
#define
#define
#define
#define
#define
sfr
sbit
SPSTAT = 0x84;
SPIF 0x80
WCOL 0x40
SPCTL = 0x85;
SSIG 0x80
SPEN 0x40
DORD 0x20
MSTR 0x10
CPOL 0x08
CPHA 0x04
SPDHH 0x00
SPDH 0x01
SPDL 0x02
SPDLL 0x03
SPDAT = 0x86;
SPISS
= P1^3;
sbit
EADC_SPI = IE^5;
#define ESPI
0x08;
264
STC MCU Limited.
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Li
//define:master undefine:slave
//Auxiliary register
//SPI status register
//SPSTAT.7
//SPSTAT.6
//SPI control register
//SPCTL.7
//SPCTL.6
//SPCTL.5
//SPCTL.4
//SPCTL.3
//SPCTL.2
//CPU_CLK/4
//CPU_CLK/16
//CPU_CLK/64
//CPU_CLK/128
//SPI data register
//SPI slave select, connect to slave' SS(P1.4) pin
//AUXR.3
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
void InitUart();
void InitSPI();
void SendUart(BYTE dat);
BYTE RecvUart();
Tel:86-755-82948412
Fax:86-755-82905966
//send data to PC
//receive data from PC
///////////////////////////////////////////////////////////
void main()
{
InitUart();
InitSPI();
AUXR |= ESPI;
EADC_SPI = 1;
EA = 1;
while (1)
{
#ifdef MASTER
ACC = RecvUart();
SPISS = 0;
SPDAT = ACC;
#endif
}
}
C
T
S
//initial UART
//initial SPI
U
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Li
//for master (receive UART data from PC and send it to slave,
//in the meantime receive SPI data from slave and send it to PC)
//pull low slave SS
//trigger SPI send
///////////////////////////////////////////////////////////
void spi_isr()
interrupt 5 using 1
{
SPSTAT = SPIF | WCOL;
#ifdef MASTER
SPISS = 1;
SendUart(SPDAT);
#else
SPDAT = SPDAT;
#endif
}
//SPI interrupt routine 5 (002BH)
//clear SPI status
//push high slave SS
//return received SPI data
//for salve (receive SPI data from master and
//
send previous SPI data to master)
///////////////////////////////////////////////////////////
STC MCU Limited.
website:www.STCMCU.com
265
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Mobile:(86)13922809991
void InitUart()
{
SCON = 0x5a;
TMOD = 0x20;
AUXR = 0x40;
TH1 = TL1 = BAUD;
TR1 = 1;
}
Tel:086-755-82948412
Fax:86-755-82905966
//set UART mode as 8-bit variable baudrate
//timer1 as 8-bit auto reload mode
//timer1 work at 1T mode
//115200 bps
///////////////////////////////////////////////////////////
void InitSPI()
{
SPDAT = 0;
SPSTAT = SPIF | WCOL;
#ifdef MASTER
SPCTL = SPEN | MSTR;
#else
SPCTL = SPEN;
#endif
}
C
T
S
///////////////////////////////////////////////////////////
void SendUart(BYTE dat)
{
while (!TI);
TI = 0;
SBUF = dat;
}
//initial SPI data
//clear SPI status
//master mode
U
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//slave mode
.
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//wait pre-data sent
//clear TI flag
//send current data
///////////////////////////////////////////////////////////
BYTE RecvUart()
{
while (!RI);
RI = 0;
return SBUF;
}
266
STC MCU Limited.
//wait receive complete
//clear RI flag
//return receive data
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
Tel:86-755-82948412
Fax:86-755-82905966
2. Assemly code listing:
;/*----------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited -------------------------------------*/
;/* --- STC 1T Series MCU SPI Demo (1 master and 1 slave) -----------*/
;/* --- Mobile: (86)13922809991 ---------------------------------------------*/
;/* --- Fax: 86-755-82905966 -------------------------------------------------*/
;/* --- Tel: 86-755-82948412 --------------------------------------------------*/
;/* --- Web: www.STCMCU.com ---------------------------------------------*/
;/* If you want to use the program or the program referenced in the ----*/
;/* article, please specify in which data and procedures from STC ----*/
;/*-----------------------------------------------------------------------------------*/
//#define MASTER
AUXR DATA
SPSTAT DATA
SPIF EQU
WCOL EQU
SPCTL DATA
SSIG EQU
SPEN EQU
DORD EQU
MSTR EQU
CPOL EQU
CPHA EQU
SPDHH EQU
SPDH EQU
SPDL EQU
SPDLL EQU
SPDAT DATA
SPISS BIT
08EH
084H
080H
040H
085H
080H
040H
020H
010H
008H
004H
000H
001H
002H
003H
086H
P1.3
C
T
S
EADC_SPI
ESPI
//define:master undefine:slave
.
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;Auxiliary register
;SPI status register
;SPSTAT.7
;SPSTAT.6
;SPI control register
;SPCTL.7
;SPCTL.6
;SPCTL.5
;SPCTL.4
;SPCTL.3
;SPCTL.2
;CPU_CLK/4
;CPU_CLK/16
;CPU_CLK/64
;CPU_CLK/128
;SPI data register
;SPI slave select, connect to slave' SS(P1.4) pin
Li
U
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BIT IE.5
EQU 08H
;AUXR.3
;//////////////////////////////////////////////////////////
ORG 0000H
LJMP RESET
ORG 002BH
SPI_ISR:
PUSH ACC
PUSH PSW
MOV SPSTAT, #SPIF | WCOL
STC MCU Limited.
;SPI interrupt routine 5(2BH)
;clear SPI status
website:www.STCMCU.com
267
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Mobile:(86)13922809991
#ifdef MASTER
SETB SPISS
MOV A,
SPDAT
LCALL SEND_UART
#else
MOV SPDAT, SPDAT
#endif
POP PSW
POP ACC
RETI
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Fax:86-755-82905966
;push high slave SS
;return received SPI data
//for salve (receive SPI data from master and
;
send previous SPI data to master)
;//////////////////////////////////////////////////////////
.
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ORG 0100H
RESET:
LCALL INIT_UART
;initial UART
LCALL INIT_SPI
;initial SPI
ORL AUXR, #ESPI
;enable SPI interrupt
SETB EADC_SPI
SETB EA
MAIN:
#ifdef MASTER
//for master (receive UART data from PC and send it to slave,
LCALL RECV_UART
; in the meantimereceive SPI data from slave and send it to PC)
CLR SPISS
;pull low slave SS
MOV SPDAT, A
;trigger SPI send
#endif
SJMP MAIN
C
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S
U
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Li
;//////////////////////////////////////////////////////////
INIT_UART:
MOV
MOV
MOV
MOV
MOV
SETB
RET
SCON,
TMOD,
AUXR,
TL1,
TH1,
TR1
#5AH
#20H
#40H
#0FBH
#0FBH
;set UART mode as 8-bit variable baudrate
;timer1 as 8-bit auto reload mode
;timer1 work at 1T mode
;115200 bps(256 - 18432000 / 32 / 115200)
;//////////////////////////////////////////////////////////
268
STC MCU Limited.
website:www.STCMCU.com
www.STCMCU.com
INIT_SPI:
MOV
MOV
#ifdef MASTER
MOV
#else
MOV
#endif
RET
Mobile:(86)13922809991
Tel:86-755-82948412
SPDAT, #0
SPSTAT, #SPIF | WCOL
;initial SPI data
;clear SPI status
SPCTL, #SPEN | MSTR
;master mode
SPCTL, #SPEN
;slave mode
Fax:86-755-82905966
;//////////////////////////////////////////////////////////
SEND_UART:
JNB TI,
$
CLR TI
MOV SBUF, A
RET
U
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;//////////////////////////////////////////////////////////
RECV_UART:
JNB RI,$
CLR RI
MOV A,
SBUF
RET
RET
C
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S
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;wait pre-data sent
;clear TI flag
;send current data
Li
;wait receive complete
;clear RI flag
;return receive data
;//////////////////////////////////////////////////////////
END
STC MCU Limited.
website:www.STCMCU.com
269
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
11.4.2 SPI Function Demo Programs using Polling (C and ASM)
1. C code listing:
;/*-----------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited --------------------------------------*/
;/* --- STC 1T Series MCU SPI Demo (1 master and 1 slave) ------------*/
;/* --- Mobile: (86)13922809991 ----------------------------------------------*/
;/* --- Fax: 86-755-82905966 --------------------------------------------------*/
;/* --- Tel: 86-755-82948412 ---------------------------------------------------*/
;/* --- Web: www.STCMCU.com ---------------------------------------------*/
;/* If you want to use the program or the program referenced in the ----*/
;/* article, please specify in which data and procedures from STC ----*/
;/*----------------------------------------------------------------------------------*/
.
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#include "reg51.h"
Li
//#define MASTER
#define FOSC
#define BAUD
//define:master undefine:slave
18432000L
(256 - FOSC / 32 / 115200)
typedef unsigned char
typedef unsigned int
typedef unsigned long
BYTE;
WORD;
DWORD;
C
T
S
U
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sfr
AUXR = 0x8e;
sfr
#define
#define
sfr
#define
#define
#define
#define
#define
#define
#define
#define
#define
#define
sfr
sbit
SPSTAT = 0x84;
SPIF
0x80
WCOL 0x40
SPCTL = 0x85;
SSIG 0x80
SPEN 0x40
DORD 0x20
MSTR 0x10
CPOL 0x08
CPHA 0x04
SPDHH 0x00
SPDH 0x01
SPDL 0x02
SPDLL 0x03
SPDAT = 0x86;
SPISS
= P1^3;
void
void
void
BYTE
BYTE
InitUart();
InitSPI();
SendUart(BYTE dat);
RecvUart();
SPISwap(BYTE dat);
270
STC MCU Limited.
//Auxiliary register
//SPI status register
//SPSTAT.7
//SPSTAT.6
//SPI control register
//SPCTL.7
//SPCTL.6
//SPCTL.5
//SPCTL.4
//SPCTL.3
//SPCTL.2
//CPU_CLK/4
//CPU_CLK/16
//CPU_CLK/64
//CPU_CLK/128
//SPI data register
//SPI slave select, connect to slave' SS(P1.4) pin
//send data to PC
//receive data from PC
//swap SPI data between master and slave
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
Tel:86-755-82948412
Fax:86-755-82905966
///////////////////////////////////////////////////////////
void main()
{
InitUart();
InitSPI();
//initial UART
//initial SPI
while (1)
{
#ifdef MASTER
//for master (receive UART data from PC and send it to slave,
// in the meantime receive SPI data from slave and send it to PC)
SendUart(SPISwap(RecvUart()));
#else
//for salve (receive SPI data from master and
ACC = SPISwap(ACC); //
send previous SPI data to master)
#endif
}
}
U
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///////////////////////////////////////////////////////////
void InitUart()
{
SCON = 0x5a;
TMOD = 0x20;
AUXR = 0x40;
TH1 = TL1 = BAUD;
TR1 = 1;
}
C
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//set UART mode as 8-bit variable baudrate
//timer1 as 8-bit auto reload mode
//timer1 work at 1T mode
//115200 bps
///////////////////////////////////////////////////////////
void InitSPI()
{
SPDAT = 0;
SPSTAT = SPIF | WCOL;
#ifdef MASTER
SPCTL = SPEN | MSTR;
#else
SPCTL = SPEN;
#endif
}
STC MCU Limited.
//initial SPI data
//clear SPI status
//master mode
//slave mode
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Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
///////////////////////////////////////////////////////////
void SendUart(BYTE dat)
{
while (!TI);
TI = 0;
SBUF = dat;
}
//wait pre-data sent
//clear TI flag
//send current data
///////////////////////////////////////////////////////////
BYTE RecvUart()
{
while (!RI);
RI = 0;
return SBUF;
}
///////////////////////////////////////////////////////////
C
T
S
BYTE SPISwap(BYTE dat)
{
#ifdef MASTER
SPISS = 0;
#endif
SPDAT = dat;
while (!(SPSTAT & SPIF));
SPSTAT = SPIF | WCOL;
#ifdef MASTER
SPISS = 1;
#endif
return SPDAT;
}
272
STC MCU Limited.
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//wait receive complete
//clear RI flag
//return receive data
U
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//pull low slave SS
//trigger SPI send
//wait send complete
//clear SPI status
//push high slave SS
//return received SPI data
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
Tel:86-755-82948412
Fax:86-755-82905966
2. Assemly code listing:
;/*----------------------------------------------------------------------------------*/
;/* --- STC MCU International Limited -------------------------------------*/
;/* --- STC 1T Series MCU SPI Demo (1 master and 1 slave) -----------*/
;/* --- Mobile: (86)13922809991 ---------------------------------------------*/
;/* --- Fax: 86-755-82905966 -------------------------------------------------*/
;/* --- Tel: 86-755-82948412 --------------------------------------------------*/
;/* --- Web: www.STCMCU.com ---------------------------------------------*/
;/* If you want to use the program or the program referenced in the ----*/
;/* article, please specify in which data and procedures from STC ----*/
;/*-----------------------------------------------------------------------------------*/
.
d
e
mit
//#define MASTER
//define:master undefine:slave
AUXR DATA
SPSTAT DATA
SPIF EQU
WCOL EQU
SPCTL DATA
SSIG EQU
SPEN EQU
DORD EQU
MSTR EQU
CPOL EQU
CPHA EQU
SPDHH EQU
SPDH EQU
SPDL EQU
SPDLL EQU
SPDAT DATA
SPISS BIT
;Auxiliary register
;SPI status register
;SPSTAT.7
;SPSTAT.6
;SPI control register
;SPCTL.7
;SPCTL.6
;SPCTL.5
;SPCTL.4
;SPCTL.3
;SPCTL.2
;CPU_CLK/4
;CPU_CLK/16
;CPU_CLK/64
;CPU_CLK/128
;SPI data register
;SPI slave select, connect to slave' SS(P1.4) pin
08EH
084H
080H
040H
085H
080H
040H
020H
010H
008H
004H
000H
001H
002H
003H
086H
P1.3
C
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Li
U
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;//////////////////////////////////////////////////////////
RESET:
ORG 0000H
LJMP RESET
ORG 0100H
LCALL INIT_UART
LCALL INIT_SPI
STC MCU Limited.
;initial UART
;initial SPI
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Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
MAIN:
#ifdef MASTE
//for master (receive UART data from PC and send it to slave, in the meantime
LCALL RECV_UART
;
receive SPI data from slave and send it to PC)
LCALL SPI_SWAP
LCALL SEND_UART
#else
//for salve (receive SPI data from master and
LCALL SPI_SWAP
;
send previous SPI data to master)
#endif
SJMP MAIN
;//////////////////////////////////////////////////////////
INIT_UART:
MOV
MOV
MOV
MOV
MOV
SETB
RET
SCON,
TMOD,
AUXR,
TL1,
TH1,
TR1
#5AH
#20H
#40H
#0FBH
#0FBH
;//////////////////////////////////////////////////////////
C
T
S
U
C
M
INIT_SPI:
MOV SPDAT, #0
MOV SPSTAT, #SPIF | WCOL
#ifdef MASTER
MOV SPCTL, #SPEN | MSTR
#else
MOV SPCTL, #SPEN
#endif
RET
.
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;set UART mode as 8-bit variable baudrate
;timer1 as 8-bit auto reload mode
;timer1 work at 1T mode
;115200 bps(256 - 18432000 / 32 / 115200)
Li
;initial SPI data
;clear SPI status
;master mode
;slave mode
;//////////////////////////////////////////////////////////
SEND_UART:
JNB TI,
$
CLR TI
MOV SBUF, A
RET
;wait pre-data sent
;clear TI flag
;send current data
;//////////////////////////////////////////////////////////
274
STC MCU Limited.
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
RECV_UART:
JNB RI,
$
CLR RI
MOV A,
SBUF
RET
RET
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Fax:86-755-82905966
;wait receive complete
;clear RI flag
;return receive data
;//////////////////////////////////////////////////////////
SPI_SWAP:
#ifdef MASTER
CLR
#endif
MOV
WAIT:
MOV
JNB
MOV
#ifdef MASTER
SETB
#endif
MOV
RET
.
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SPISS
;pull low slave SS
SPDAT, A
;trigger SPI send
Li
A,
SPSTAT
ACC.7, WAIT
SPSTAT, #SPIF | WCOL
;wait send complete
;clear SPI status
SPISS
;push high slave SS
A,
;return received SPI data
C
T
S
U
C
M
SPDAT
;//////////////////////////////////////////////////////////
END
STC MCU Limited.
website:www.STCMCU.com
275
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
11.5 SPI Function Demo Programs (Each other as the Master-Slave)
11.5.1 SPI Function Demo Programs using Interrupts (C and ASM)
1. C code listing:
/*--------------------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -----------------------------------------------*/
/* --- STC12C5Axx Series MCU SPI Demo(Each other as the master-slave) --*/
/* --- Mobile: (86)13922809991 -------------------------------------------------------*/
/* --- Fax: 86-755-82905966 -----------------------------------------------------------*/
/* --- Tel: 86-755-82948412 ------------------------------------------------------------*/
/* --- Web: www.STCMCU.com -------------------------------------------------------*/
/* If you want to use the program or the program referenced in the --------------*/
/* article, please specify in which data and procedures from STC --------------*/
/*---------------------------------------------------------------------------------------------*/
.
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#include "reg51.h"
#define FOSC
#define BAUD
typedef unsigned char
typedef unsigned int
typedef unsigned long
BYTE;
WORD;
DWORD;
C
T
S
sfr
AUXR = 0x8e;
sfr
#define
#define
sfr
#define
#define
#define
#define
#define
#define
#define
#define
#define
#define
sfr
sbit
SPSTAT = 0x84;
SPIF
0x80
WCOL
0x40
SPCTL = 0x85;
SSIG 0x80
SPEN 0x40
DORD 0x20
MSTR 0x10
CPOL 0x08
CPHA 0x04
SPDHH 0x00
SPDH 0x01
SPDL 0x02
SPDLL 0x03
SPDAT =
SPISS =
U
C
M
//Auxiliary register
//SPI status register
//SPSTAT.7
//SPSTAT.6
//SPI control register
//SPCTL.7
//SPCTL.6
//SPCTL.5
//SPCTL.4
//SPCTL.3
//SPCTL.2
//CPU_CLK/4
//CPU_CLK/16
//CPU_CLK/64
//CPU_CLK/128
0x86;
//SPI data register
P1^3;
//SPI slave select, connect to other MCU's SS(P1.4) pin
sbit
EADC_SPI = IE^5;
#define ESPI
0x08;
276
Li
18432000L
(256 - FOSC / 32 / 115200)
STC MCU Limited.
//AUXR.3
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
Tel:86-755-82948412
void InitUart();
void InitSPI();
void SendUart(BYTE dat);
BYTE RecvUart();
//send data to PC
//receive data from PC
bit MSSEL;
//1: master 0:slave
Fax:86-755-82905966
///////////////////////////////////////////////////////////
void main()
{
InitUart();
InitSPI();
AUXR |= ESPI;
EADC_SPI = 1;
EA = 1;
while (1)
{
if (RI)
{
}
}
}
//initial UART
//initial SPI
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SPCTL = SPEN | MSTR;
MSSEL = 1;
ACC = RecvUart();
SPISS = 0;
SPDAT = ACC;
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//set as master
//pull low slave SS
//trigger SPI send
///////////////////////////////////////////////////////////
void spi_isr( ) interrupt 5 using 1
//SPI interrupt routine 5 (002BH)
{
SPSTAT = SPIF | WCOL;
//clear SPI status
if (MSSEL)
{
SPCTL = SPEN;
//reset as slave
MSSEL = 0;
SPISS = 1;
//push high slave SS
SendUart(SPDAT);
//return received SPI data
}
else
{
//for salve (receive SPI data from master and
SPDAT = SPDAT;
//
send previous SPI data to master)
}
}
///////////////////////////////////////////////////////////
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void InitUart()
{
SCON = 0x5a;
TMOD = 0x20;
AUXR = 0x40;
TH1 = TL1 = BAUD;
TR1 = 1;
}
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//set UART mode as 8-bit variable baudrate
//timer1 as 8-bit auto reload mode
//timer1 work at 1T mode
//115200 bps
///////////////////////////////////////////////////////////
void InitSPI()
{
SPDAT = 0;
SPSTAT = SPIF | WCOL;
SPCTL = SPEN;
}
///////////////////////////////////////////////////////////
void SendUart(BYTE dat)
{
while (!TI);
TI = 0;
SBUF = dat;
}
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//initial SPI data
//clear SPI status
//slave mode
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//wait pre-data sent
//clear TI flag
//send current data
///////////////////////////////////////////////////////////
BYTE RecvUart()
{
while (!RI);
RI = 0;
return SBUF;
}
278
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//wait receive complete
//clear RI flag
//return receive data
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2. Assembly code listing:
/*--------------------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -----------------------------------------------*/
/* --- STC12C5Axx Series MCU SPI Demo(Each other as the master-slave) --*/
/* --- Mobile: (86)13922809991 -------------------------------------------------------*/
/* --- Fax: 86-755-82905966 -----------------------------------------------------------*/
/* --- Tel: 86-755-82948412 ------------------------------------------------------------*/
/* --- Web: www.STCMCU.com -------------------------------------------------------*/
/* If you want to use the program or the program referenced in the --------------*/
/* article, please specify in which data and procedures from STC --------------*/
/*---------------------------------------------------------------------------------------------*/
AUXR DATA
SPSTAT DATA
SPIF EQU
WCOL EQU
SPCTL DATA
SSIG EQU
SPEN EQU
DORD EQU
MSTR EQU
CPOL EQU
CPHA EQU
SPDHH EQU
SPDH EQU
SPDL EQU
SPDLL EQU
SPDAT DATA
SPISS BIT
08EH
084H
080H
040H
085H
080H
040H
020H
010H
008H
004H
000H
001H
002H
003H
086H
P1.3
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EADC_SPI
ESPI
MSSEL BIT
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BIT IE.5
EQU 08H
20H.0
;Auxiliary register
;SPI status register
;SPSTAT.7
;SPSTAT.6
;SPI control register
;SPCTL.7
;SPCTL.6
;SPCTL.5
;SPCTL.4
;SPCTL.3
;SPCTL.2
;CPU_CLK/4
;CPU_CLK/16
;CPU_CLK/64
;CPU_CLK/128
;SPI data register
;SPI slave select, connect to other MCU's SS(P1.4) pin
;AUXR.3
;1: master 0:slave
;//////////////////////////////////////////////////////////
ORG 0000H
LJMP RESET
ORG 002BH
;SPI interrupt routine
SPI_ISR:
PUSH ACC
PUSH PSW
MOV SPSTAT, #SPIF | WCOL ;clear SPI status
JBC MSSEL, MASTER_SEND
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SLAVE_RECV:
MOV SPDAT, SPDAT
JMP SPI_EXIT
MASTER_SEND:
SETB SPISS
MOV SPCTL, #SPEN
MOV A,
SPDAT
LCALL SEND_UART
SPI_EXIT:
POP PSW
POP ACC
RETI
;//////////////////////////////////////////////////////////
RESET:
MAIN:
ORG
0100H
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MOV SP,#3FH
LCALL INIT_UART
LCALL INIT_SPI
ORL AUXR, #ESPI
SETB EADC_SPI
SETB EA
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//for salve (receive SPI data from master and
;
send previous SPI data to master)
;push high slave SS
;
;reset as slave
;return received SPI data
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;initial UART
;initial SPI
JNB RI,
$
;wait UART data
MOV SPCTL, #SPEN | MSTR
; ;set as master
SETB MSSEL
LCALL RECV_UART
;receive UART data from PC
CLR SPISS
;pull low slave SS
MOV SPDAT, A
;trigger SPI send
SJMP MAIN
;//////////////////////////////////////////////////////////
INIT_UART:
MOV
MOV
MOV
MOV
MOV
SETB
RET
SCON,
TMOD,
AUXR
TL1,
TH1,
TR1
280
STC MCU Limited.
#5AH
#20H
,#40H
#0FBH
#0FBH
;set UART mode as 8-bit variable baudrate
;timer1 as 8-bit auto reload mode
;timer1 work at 1T mode
;115200 bps(256 - 18432000 / 32 / 115200)
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;//////////////////////////////////////////////////////////
INIT_SPI:
MOV
MOV
MOV
RET
SPDAT, #0
SPSTAT, #SPIF | WCOL
SPCTL, #SPEN
;initial SPI data
;clear SPI status
;slave mode
;//////////////////////////////////////////////////////////
SEND_UART:
JNB TI,
$
CLR TI
MOV SBUF, A
RET
;//////////////////////////////////////////////////////////
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RECV_UART:
JNB RI,
$
CLR RI
MOV A,
SBUF
RET
RET
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;wait pre-data sent
;clear TI flag
;send current data
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;wait receive complete
;clear RI flag
;return receive data
;//////////////////////////////////////////////////////////
END
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11.5.2 SPI Function Demo Programs using Polling
1. C code listing:
/*--------------------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -----------------------------------------------*/
/* --- STC12C5Axx Series MCU SPI Demo(Each other as the master-slave) --*/
/* --- Mobile: (86)13922809991 -------------------------------------------------------*/
/* --- Fax: 86-755-82905966 -----------------------------------------------------------*/
/* --- Tel: 86-755-82948412 ------------------------------------------------------------*/
/* --- Web: www.STCMCU.com -------------------------------------------------------*/
/* If you want to use the program or the program referenced in the --------------*/
/* article, please specify in which data and procedures from STC --------------*/
/*---------------------------------------------------------------------------------------------*/
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#include "reg51.h"
#define FOSC
#define BAUD
18432000L
(256 - FOSC / 32 / 115200)
typedef unsigned char
typedef unsigned int
typedef unsigned long
BYTE;
WORD;
DWORD;
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sfr
AUXR =
0x8e;
sfr
#define
#define
sfr
#define
#define
#define
#define
#define
#define
#define
#define
#define
#define
sfr
sbit
SPSTAT =
SPIF
WCOL
SPCTL =
SSIG
SPEN
DORD
MSTR
CPOL
CPHA
SPDHH
SPDH
SPDL
SPDLL
SPDAT =
SPISS
=
0x84;
0x80
0x40
0x85;
0x80
0x40
0x20
0x10
0x08
0x04
0x00
0x01
0x02
0x03
0x86;
P1^3;
//SPI status register
//SPSTAT.7
//SPSTAT.6
//SPI control register
//SPCTL.7
//SPCTL.6
//SPCTL.5
//SPCTL.4
//SPCTL.3
//SPCTL.2
//CPU_CLK/4
//CPU_CLK/16
//CPU_CLK/64
//CPU_CLK/128
//SPI data register
//SPI slave select, connect to slave' SS(P1.4) pin
void
void
void
BYTE
BYTE
InitUart();
InitSPI();
SendUart(BYTE dat);
RecvUart();
SPISwap(BYTE dat);
282
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//Auxiliary register
//send data to PC
//receive data from PC
//swap SPI data between master
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///////////////////////////////////////////////////////////
void main()
{
InitUart();
InitSPI();
//initial UART
//initial SPI
while (1)
{
if (RI)
{
SPCTL = SPEN | MSTR;
//set as master
SendUart(SPISwap(RecvUart()));
SPCTL = SPEN;
//reset as slave
}
if (SPSTAT & SPIF)
{
SPSTAT = SPIF | WCOL; //clear SPI status
SPDAT = SPDAT;
//mov data from receive buffer to send buffer
}
}
}
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///////////////////////////////////////////////////////////
void InitUart()
{
SCON = 0x5a;
TMOD = 0x20;
AUXR = 0x40;
TH1 = TL1 = BAUD;
TR1 = 1;
}
//set UART mode as 8-bit variable baudrate
//timer1 as 8-bit auto reload mode
//timer1 work at 1T mode
//115200 bps
///////////////////////////////////////////////////////////
void InitSPI()
{
SPDAT = 0;
SPSTAT = SPIF | WCOL;
SPCTL = SPEN;
}
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//initial SPI data
//clear SPI status
//slave mode
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///////////////////////////////////////////////////////////
void SendUart(BYTE dat)
{
while (!TI);
TI = 0;
SBUF = dat;
}
//wait pre-data sent
//clear TI flag
//send current data
///////////////////////////////////////////////////////////
BYTE RecvUart()
{
while (!RI);
RI = 0;
return SBUF;
}
///////////////////////////////////////////////////////////
BYTE SPISwap(BYTE dat)
{
SPISS = 0;
SPDAT = dat;
while (!(SPSTAT & SPIF));
SPSTAT = SPIF | WCOL;
SPISS = 1;
return SPDAT;
}
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//wait receive complete
//clear RI flag
//return receive data
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//pull low slave SS
//trigger SPI send
//wait send complete
//clear SPI status
//push high slave SS
//return received SPI data
website:www.STCMCU.com
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Mobile:(86)13922809991
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2. Assemly code listing:
/*--------------------------------------------------------------------------------------------*/
/* --- STC MCU International Limited -----------------------------------------------*/
/* --- STC12C5Axx Series MCU SPI Demo(Each other as the master-slave) --*/
/* --- Mobile: (86)13922809991 -------------------------------------------------------*/
/* --- Fax: 86-755-82905966 -----------------------------------------------------------*/
/* --- Tel: 86-755-82948412 ------------------------------------------------------------*/
/* --- Web: www.STCMCU.com -------------------------------------------------------*/
/* If you want to use the program or the program referenced in the --------------*/
/* article, please specify in which data and procedures from STC --------------*/
/*---------------------------------------------------------------------------------------------*/
AUXR DATA
SPSTAT DATA
SPIF EQU
WCOL EQU
SPCTL DATA
SSIG EQU
SPEN EQU
DORD EQU
MSTR EQU
CPOL EQU
CPHA EQU
SPDHH EQU
SPDH EQU
SPDL EQU
SPDLL EQU
SPDAT DATA
SPISS BIT
08EH
084H
080H
040H
085H
080H
040H
020H
010H
008H
004H
000H
001H
002H
003H
086H
P1.3
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;Auxiliary register
;SPI status register
;SPSTAT.7
;SPSTAT.6
;SPI control register
;SPCTL.7
;SPCTL.6
;SPCTL.5
;SPCTL.4
;SPCTL.3
;SPCTL.2
;CPU_CLK/4
;CPU_CLK/16
;CPU_CLK/64
;CPU_CLK/128
;SPI data register
;SPI slave select, connect to slave' SS(P1.4) pin
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;//////////////////////////////////////////////////////////
RESET:
MAIN:
ORG 0000H
LJMP RESET
ORG 0100H
LCALL INIT_UART
LCALL INIT_SPI
JB
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RI,
;initial UART
;initial SPI
MASTER_MODE
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SLAVE_MODE:
MOV A,
SPSTAT
JNB ACC.7, MAIN
MOV SPSTAT, #SPIF | WCOL
;clear SPI status
MOV SPDAT, SPDAT
;return received SPI data
SJMP MAIN
MASTER_MODE:
MOV SPCTL, #SPEN | MSTR
;set as master
LCALL RECV_UART
;receive UART data from PC
LCALL SPI_SWAP
;send it to slave, in the meantime, receive SPI data from slave
LCALL SEND_UART
;send SPI data to PC
MOV SPCTL, #SPEN
;
;reset as slave
SJMP MAIN
;//////////////////////////////////////////////////////////
INIT_UART:
MOV
MOV
MOV
MOV
MOV
SETB
RET
SCON,
TMOD,
AUXR,
TL1,
TH1,
TR1
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#5AH
#20H
#40H
#0FBH
#0FBH
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;set UART mode as 8-bit variable baudrate
;timer1 as 8-bit auto reload mode
;timer1 work at 1T mode
;115200 bps(256 - 18432000 / 32 / 115200)
;//////////////////////////////////////////////////////////
INIT_SPI:
MOV SPDAT, #0
MOV SPSTAT, #SPIF | WCOL
MOV SPCTL, #SPEN
RET
;initial SPI data
;clear SPI status
;slave mode
;//////////////////////////////////////////////////////////
SEND_UART:
JNB TI,
$
CLR TI
MOV SBUF, A
RET
286
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;wait pre-data sent
;clear TI flag
;send current data
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;//////////////////////////////////////////////////////////
RECV_UART:
JNB RI,
$
CLR RI
MOV A,
SBUF
RET
RET
;wait receive complete
;clear RI flag
;return receive data
;//////////////////////////////////////////////////////////
SPI_SWAP:
CLR SPISS
MOV SPDAT, A
WAIT:
MOV A,
SPSTAT
JNB ACC.7, WAIT
MOV SPSTAT, #SPIF | WCOL
SETB SPISS
MOV A,
SPDAT
RET
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;pull low slave SS
;trigger SPI send
Li
;wait send complete
;clear SPI status
;push high slave SS
;return received SPI data
;//////////////////////////////////////////////////////////
END
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Chapter 12. IAP / EEPROM
The ISP in STC12C2052AD series makes it possible to update the user’s application program and non-volatile
application data (in IAP-memory) without removing the MCU chip from the actual end product. This useful
capability makes a wide range of field-update applications possible. (Note ISP needs the loader program preprogrammed in the ISP-memory.) In general, the user needn’t know how ISP operates because STC has provided
the standard ISP tool and embedded ISP code in STC shipped samples.But, to develop a good program for ISP
function, the user has to understand the architecture of the embedded flash.
The embedded flash consists of 20 pages. Each page contains 512 bytes. Dealing with flash, the user must erase it
in page unit before writing (programming) data into it.Erasing flash means setting the content of that flash as FFh.
Two erase modes are available in this chip. One is mass mode and the other is page mode. The mass mode gets
more performance, but it erases the entire flash. The page mode is something performance less, but it is flexible
since it erases flash in page unit. Unlike RAM’s real-time operation, to erase flash or to write (program) flash
often takes long time so to wait finish.
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Furthermore, it is a quite complex timing procedure to erase/program flash. Fortunately, the STC12C2052AD
series carried with convenient mechanism to help the user read/change the flash content. Just filling the target
address and data into several SFR, and triggering the built-in ISP automation, the user can easily erase, read, and
program the embedded flash.
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The In-Application Program feature is designed for user to Read/Write nonvolatile data flash. It may bring great
help to store parameters those should be independent of power-up and power-done action. In other words, the user
can store data in data flash memory, and after he shutting down the MCU and rebooting the MCU, he can get the
original value, which he had stored in.
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The user can program the data flash according to the same way as ISP program, so he should get deeper understanding related to SFR ISP_DATA, ISP_ADDRL, ISP_ADDRH, ISP_CMD, ISP_TRIG, and ISP_CONTR.
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12.1 IAP / EEPROM Special Function Registers
The following special function registers are related to the IAP/ISP/EEPROM operation. All these
registers can be accessed by software in the user’s application program.
Symbol
ISP_DATA
ISP_ADDRH
ISP_ADDRL
ISP_CMD
ISP_TRIG
ISP_CONTR
Description
ISP/IAP Flash Data
Register
ISP/IAP Flash
Address High
ISP/IAP Flash
Address Low
ISP/IAP Flash
Command Register
ISP/IAP Flash
Command Trigger
ISP/IAP Control
Register
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Address
Value after
Power-on or
LSB
Reset
Bit Address and Symbol
MSB
E2H
1111 1111B
E3H
0000 0000B
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E4H
E5H
-
-
E6H
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ISPEN SWBS SWRST CMD_FAIL
-
-
MS1
WT2 WT1
0000 0000B
MS0
xxxx x000B
xxxx xxxxB
WT0
0000 1000B
1. ISP/IAP Flash Data Register : ISP_DATA (Address: E2H, Non bit-addressable)
ISP_DATA is the data port register for ISP/IAP operation. The data in ISP_DATA will be written into
the desired address in operating ISP/IAP write and it is the data window of readout in operating ISP/
IAP read.
2. ISP/IAP Flash Address Registers : ISP_ADDRH and ISP_ADDRL
ISP_ADDRH (address:E3H) is the high-byte address port for all ISP/IAP modes.
ISP_ADDRH[7:5] must be cleared to 000, if one bit of ISP_ADDRH[7:5] is set, the IAP/ISP write
function must fail.
ISP_ADDRL (address:E4H) is the low port for all ISP/IAP modes. In page erase operation, it is
ignored.
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3. ISP/IAP Flash Command Register : ISP_CMD (Non bit -addressable)
SFR name
Address
bit
B7
B6
B5
B4
B3
B2
B1
B0
ISP_CMD
E5H
name
-
-
-
-
-
-
MS1
MS0
B7~B2: Reserved.
MS1, MS0 : ISP/IAP operating mode selection. IAP_CMD is used to select the flash mode for
performing numerous ISP/IAP function or used to access protected SFRs.
0, 0 : Standby
0, 1 : Data Flash/EEPROM read.
1, 0 : Data Flash/EEPROM program.
1, 1 : Data Flash/EEPROM page erase.
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4. ISP/IAP Flash Command Trigger Register : ISP_TRIG (Address: E6H, Non bit -addressable)
ISP_TRIG is the command port for triggering ISP/IAP activity and protected SFRs access. If ISP_TRIG is filled
with sequential 0x46h, 0xB9h and if ISPEN(ISP_CONTR.7) = 1, ISP/IAP activity or protected SFRs access will
triggered.
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5. ISP/IAP Control Register : ISP_CONTR (Non bit-addressable)
SFR name
Address
ISP_CONTR
E7H
bit
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B7
B6
B5
B4
name ISPEN SWBS SWRST CMD_FAIL
B3
B2
B1
B0
-
WT2
WT2
WT0
ISPEN : ISP/IAP operation enable.
0 : Global disable all ISP/IAP program/erase/read function.
1 : Enable ISP/IAP program/erase/read function.
SWBS: software boot selection control.
0 : Boot from main-memory after reset.
1 : Boot from ISP memory after reset.
SWRST: software reset trigger control.
0 : No operation
1 : Generate software system reset. It will be cleared by hardware automatically.
CMD_FAIL: Command Fail indication for ISP/IAP operation.
0 : The last ISP/IAP command has finished successfully.
1 : The last ISP/IAP command fails. It could be caused since the access of flash memory was inhibited.
B3: Reserved. Software must write “0” on this bit when ISP_CONTR is written.
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WT2~WT0 : Waiting time selection while flash is busy.
Setting wait times
CPU wait times
Read
WT2 WT1 WT0 (2 System
clocks)
1
1
1 2 SYSclks
1
1
0 2 SYSclks
1
0
1 2 SYSclks
1
0
0 2 SYSclks
0
1
1 2 SYSclks
0
1
0 2 SYSclks
0
0
1 2 SYSclks
0
0
0 2 SYSclks
Program
(=55uS)
Sector Erase
(=21mS)
Recommended System
Clock Frequency (MHz)
55 SYSclks
110 SYSclks
165 SYSclks
330 SYSclks
660 SYSclks
1100 SYSclks
1320 SYSclks
1760 SYSclks
21012 SYSclks
42024 SYSclks
63036 SYSclks
126072 SYSclks
252144 SYSclks
420240 SYSclks
504288 SYSclks
672384 SYSclks
≤1MHz
≤ 2MHz
≤ 3MHz
≤ 6MHz
≤ 12MHz
≤ 20MHz
≤ 24MHz
≤ 30MHz
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Note: Software reset actions could reset other SFR,but it never influences bits ISPEN and SWBS.The ISPEN and
SWBS. The ISPEN and SWBS only will be reset by power-up action, while not software reset.
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6. When the operation voltage is too low, EEPROM / IAP function should be disabled
SFR name
Address
PCON
87H
LVDF
bit
B7
M
B6
B5
name SMOD SMOD0 LVDF
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B4
B3
B2
B1
B0
POF
GF1
GF0
PD
IDL
: Pin Low-Voltage Flag. Once low voltage condition is detected (VCC power is lower than LVD
voltage), it is set by hardware (and should be cleared by software).
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12.2 STC12C2052AD series Internal EEPROM Allocation Table
STC12C2052AD series microcontroller's Data Flash (internal available EEPROM) address (and program space
is separate) : if the application area of IAP write Data/erase sector of the action, the statements will be ignore
and continue to the next one. Program in user application area (AP area), only operate IAP/ISP on Data Flash
(EEPROM )
STC12C5052AD and STC12LE5052AD are excepted, this several types in the application area can modify the
application
STC12C2052AD series MCU internal EEPROM Selection Table
STC12LE2052AD series MCU internal EEPROM Selection Table
EEPROM
Sector
Begin_Sector
End_Sector
Type
(Byte)
Numbers
Begin_Address
End_Address
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STC12C1052AD/
STC12LE1052AD
10K
20
0000h
27FFh
STC12C2052AD/
STC12LE2052AD
10K
20
0000h
27FFh
STC12C3052AD/
STC12LE3052AD
10K
20
0000h
27FFh
STC12C4052AD/
STC12LE4052AD
10K
20
0000h
27FFh
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The following series are special.
User can modify the application the application area, all flash area can be modified as EEPROM
STC12C5052AD/
STC12LE5052AD
-
10
0000h
27FFh
STC12C2052AD series MCU address reference table in detail (512 bytes per sector)
STC12LE2052AD series MCU address reference table in detail (512 bytes per sector)
Sector 1
Sector 2
Sector 3
Sector 4
Each sector 512
Start
End
Start
End
Start
End
Start
End
byte
0000H
01FFH
0200H
03FFH
0400H
05FFH
0600H
07FFH
Sector 5
Sector 6
Sector7
Sector 8
Start
End
Start
End
Start
End
Start
End
Suggest the same
0800H
09FFH
0A00H
0BFFH
0C00H
0DFFH
0E00H
0FFFH
times modified data
Sector 9
Sector 10
Sector 11
Sector 12
Start
End
Start
End
Start
End
Start
End
in the same sector,
1000H
11FFH
1200H
13FFH
1400H
15FFH
1600H
17FFH each times modified
Sector 13
Sector 14
Sector 15
Sector 16
data in different
Start
End
Start
End
Start
End
Start
End
sectors, don't have
1800H
19FFH
1A00H
1BFFH 1C000H 1DFFH
1E00H
1FFFH
to use full, of
Sector 17
Sector 18
Sector 19
Sector 20
course, it was all to
Start
End
Start
End
Start
End
Start
End
use
2000H
21FFH
2200H
23FFH
2400H
25FFH
2600H
27FFH
292
STC MCU Limited.
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
Tel:86-755-82948412
Fax:86-755-82905966
12.3 IAP/EEPROM Assembly Language Program Introduction
; /*It is decided by the assembler/compiler used by users that whether the SFRs addresses are declared by the
DATA or the EQU directive*/
ISP_DATA
DATA 0E2H or
ISP_DATA
EQU
0E2H
ISP_ADDRH
DATA 0E3H or
ISP_ADDRH
EQU
0E3H
ISP_ADDRL
DATA 0E4H or
ISP_ADDRL
EQU
0E4H
ISP_CMD
DATA 0E5H or
ISP_CMD
EQU
0E5H
ISP_TRIG
DATA 0E6H or
ISP_TRIG
EQU
0E6H
ISP_CONTR
DATA 0E7H or
ISP_CONTR
EQU
0E7H
;/*Define ISP/IAP/EEPROM command and wait time*/
ISP_IAP_BYTE_READ
EQU
ISP_IAP_BYTE_PROGRAM
EQU
ISP_IAP_SECTOR_ERASE
EQU
WAIT_TIME
EQU
1
2
3
0
;Byte-Read
;Byte-Program
;Sector-Erase
;Set wait time
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;/*Byte-Read*/
MOV ISP_ADDRH,
#BYTE_ADDR_HIGH
;Set ISP/IAP/EEPROM address high
MOV ISP_ADDRL,
#BYTE_ADDR_LOW
;Set ISP/IAP/EEPROM address low
MOV ISP_CONTR,
#WAIT_TIME
;Set wait time
ORL
ISP_CONTR,
#10000000B
;Open ISP/IAP function
MOV ISP_CMD,
#ISP_IAP_BYTE_READ ;Set ISP/IAP Byte-Read command
MOV ISP_TRIG,
#46H
;Send trigger command1 (0x46)
MOV ISP_TRIG,
#0B9H
;Send trigger command2 (0xB9)
NOP
;CPU will hold here until ISP/IAP/EEPROM operation complete
MOV A,
ISP_DATA
;Read ISP/IAP/EEPROM data
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;/*Disable ISP/IAP/EEPROM function, make MCU in a safe state*/
MOV ISP_CONTR,
#00000000B
MOV ISP_CMD,
#00000000B
;MOV ISP_TRIG,
#00000000B
;MOV ISP_ADDRH,
#0FFH
;MOV ISP_ADDRL,
#0FFH
;Close ISP/IAP/EEPROM function
;Clear ISP/IAP/EEPROM command
;Clear trigger register to prevent mistrigger
;Move 00 into address high-byte unit,
;Data ptr point to non-EEPROM area
;Move 00 into address low-byte unit,
;prevent misuse
;/*Byte-Program, if the byte is null(0FFH), it can be programmed; else, MCU must operate Sector-Erase firstly,
and then can operate Byte-Program.*/
MOV ISP_DATA,
#ONE_DATA
;Write ISP/IAP/EEPROM data
MOV ISP_ADDRH,
#BYTE_ADDR_HIGH
;Set ISP/IAP/EEPROM address high
MOV ISP_ADDRL,
#BYTE_ADDR_LOW
;Set ISP/IAP/EEPROM address low
MOV ISP_CONTR,
#WAIT_TIME
;Set wait time
ORL
ISP_CONTR,
#10000000B
;Open ISP/IAP function
MOV ISP_CMD,
#ISP_IAP_BYTE_READ ;Set ISP/IAP Byte-Read command
MOV ISP_TRIG,
#46H
;Send trigger command1 (0x46)
MOV ISP_TRIG,
#0B9H
;Send trigger command2 (0xb9)
NOP
;CPU will hold here until ISP/IAP/EEPROM operation complete
STC MCU Limited.
website:www.STCMCU.com
293
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
;/*Disable ISP/IAP/EEPROM function, make MCU in a safe state*/
MOV ISP_CONTR,
#00000000B
MOV ISP_CMD,
#00000000B
;MOV ISP_TRIG,
#00000000B
;MOV ISP_ADDRH,
#FFH
;MOV ISP_ADDRL,
#0FFH
Fax:86-755-82905966
;Close ISP/IAP/EEPROM function
;Clear ISP/IAP/EEPROM command
;Clear trigger register to prevent mistrigger
;Move 00H into address high-byte unit,
;Data ptr point to non-EEPROM area
;Move 00H into address low-byte unit,
;prevent misuse
;/*Erase one sector area, there is only Sector-Erase instead of Byte-Erase, every sector area account for 512
bytes*/
MOV ISP_ADDRH,
#SECTOT_FIRST_BYTE_ADDR_HIGH
;Set the sector area starting address high
MOV ISP_ADDRL,
#SECTOT_FIRST_BYTE_ADDR_LOW
;Set the sector area starting address low
MOV ISP_CONTR,
#WAIT_TIME
;Set wait time
ORL
ISP_CONTR,
#10000000B
;Open ISP/IAP function
MOV ISP_CMD,
#ISP_IAP_SECTOR_ERASE
;Set Sectot-Erase command
MOV ISP_TRIG,
#46H
;Send trigger command1 (0x46)
MOV ISP_TRIG,
#0B9H
;Send trigger command2 (0xb9)
NOP
;CPU will hold here until ISP/IAP/EEPROM operation complete
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;/*Disable ISP/IAP/EEPROM function, make MCU in a safe state*/
MOV ISP_CONTR,
#00000000B
MOV ISP_CMD,
#00000000B
;MOV ISP_TRIG,
#00000000B
;MOV ISP_ADDRH,
#0FFH
;MOV ISP_ADDRL,
#0FFH
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;Close ISP/IAP/EEPROM function
;Clear ISP/IAP/EEPROM command
;Clear trigger register to prevent mistrigger
;Move 00H into address high-byte unit,
; Data ptr point to non-EEPROM area
;Move 00H into address low-byte unit,
;prevent misuse
website:www.STCMCU.com
www.STCMCU.com
Mobile:(86)13922809991
Tel:86-755-82948412
Fax:86-755-82905966
Little common sense: (STC MCU Data Flash use as EEPROM function)
Three basic commands -- bytes read, byte programming, the sector erased
Byte programming: "1" write "1" or "0", will "0" write "0".Just FFH can byte programming. If the byte not FFH,
you must erase the sector , because only the "sectors erased" to put "0" into "1".
Sector erased: only "sector erased" will also be a "0" erased for "1".
Big proposal:
1. The same times modified data in the same sector, not the same times modified data in other sectors, won't have
to read protection.
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2. If a sector with only one byte, that's real EEPROM, STC MCU Data Flash faster than external EEPROM, read
a byte/many one byte programming is about 2 clock / 55uS.
3. If in a sector of storing a large amounts of data, a only need to modify one part of a byte, or when the other
byte don't need to modify data must first read on STC MCU, then erased RAM the whole sector, again will need
to keep data and need to amend data in bytes written back to this sector section literally only bytes written orders
(without continuous bytes, write command). Then each sector use bytes are using the less the convenient (not
need read a lot of maintained data).
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Frequently asked questions:
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1. IAP instructions after finishing, address is automatically "add 1" or "minus 1"?
Answer: not
2. Send 46 and B9 after IAP ordered the trigger whether to have sent 46 and B9 trigger?
Answer: yes
STC MCU Limited.
website:www.STCMCU.com
295
www.STCMCU.com
Mobile:(86)13922809991
Tel:086-755-82948412
Fax:86-755-82905966
12.4 EEPROM Demo Program (C and ASM)
1. C Code Listing
/*-------------------------------------------------------------------------------*/
/* --- STC MCU International Limited ----------------------------------*/
/* --- STC 1T Series MCU ISP/IAP/EEPROM Demo ----------------*/
/* --- Mobile: (86)13922809991 -----------------------------------------*/
/* --- Fax: 86-755-82905966 ---------------------------------------------*/
/* --- Tel: 86-755-82948412 ----------------------------------------------*/
/* --- Web: www.STCMCU.com -----------------------------------------*/
/* If you want to use the program or the program referenced in the */
/* article, please specify in which data and procedures from STC */
/*-------------------------------------------------------------------------------*/
#include "reg51.h"
#include "intrins.h"
typedef unsigned char BYTE;
typedef unsigned int WORD;
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/*Declare SFR associated with the IAP */
sfr
IAP_DATA
= 0xE2;
sfr
IAP_ADDRH = 0xE3;
sfr
IAP_ADDRL = 0xE4;
sfr
IAP_CMD
= 0xE5;
sfr
IAP_TRIG
= 0xE6;
sfr
IAP_CONTR
= 0xE7;
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/*Define ISP/IAP/EEPROM command*/
#define CMD_IDLE
0
#define CMD_READ 1
#define CMD_PROGRAM 2
#define CMD_ERASE 3
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//Flash data register
//Flash address HIGH
//Flash address LOW
//Flash command register
//Flash command trigger
//Flash control register
//Stand-By
//Byte-Read
//Byte-Program
//Sector-Erase
/*Define ISP/IAP/EEPROM operation const for IAP_CONTR*/
//#define ENABLE_IAP 0x80
//if SYSCLK