WL9100P3-50

WL9100 36V,1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator Features • Low Power Consumption: 1.5µA (Typ) • Maximum Output Current: 150mA • Small Dropout Voltage • • • • • • 300mV@100mA (Vout=3.3V) • High Input Voltage: Up to 36V • High Accurate: Good Transient Response Integrated Short-Circuit Protection Over-Temperature Protection Output Current Limit Stable with Ceramic Capacitor Support Fixed Output Voltage 1.8,2.5,2.8.3.0,3.3,3.6,4.0,4.2 and 5.0V WL9100 (B) ±2% Output Voltage • Available Package WL9100(A) ±1% Output Voltage • RoHS Compliant and Lead (Pb) Free SOT23-3 \ SOT89-3 Application • Portable, Battery Powered Equipment • Battery-powered equipment • Weighting Scales • Smoke detector and sensor • Audio/Video Equipmen • Home Automation Description The WL9100 series is a high voltage，ultralow-power，low dropout voltage regulator. The device can deliver 150mA output current with a dropout voltage of 300mV and allows an input voltage as high as 36V. The typical quiescent current is only 1.5µA. The device is available in fixed output voltages of 1.8,2.5,2.8,3.0,3.3,3.6,4.0,4.2,4.4 and 5.0V.The device features integrated shortcircuit and thermal shutdown protection.Although designed primarily as fixed voltage regulators, the device can be used with external components to obtain variable voltages. Application Circuits VIN VIN VOUT VOUT GND !ev.2.1_Jan_2019 10uF 10uF CIN COUT -1- www.wpmtek.com WL9100 36V;1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator Pin Configuration SOT23-3L 2 SOT23-3L 2 1 3 WL9100S3-XX SOT23-3L 2 1 3 WL9100SA-XX SOT89-3L 1 2 3 WL9100P3-XX 1 3 WL9100SB-XX SOT23-3L 2 1 3 WL9100SC-XX SOT89-3L SOT89-3L SOT89-3L 1 2 3 WL9100PA-XX 1 2 3 WL9100PB-XX 1 2 3 WL9100PC-XX Pin Description SOT23-3L Pin No. Pin Name Pin Function WL9100S3-XX WL9100SA-XX* WL9100SB-XX* WL9100SC-XX* 1 3 2 2 GND Ground. 2 2 1 3 VIN Supply voltage input 3 1 3 1 VOUT Voltage Output Pin Name Pin Function SOT89-3L Pin No. WL9100P3-XX WL9100PA-XX* WL9100PB-XX* WL9100PC-XX* 1 3 2 2 GND Ground. 2 2 1 3 VIN Supply voltage input 3 1 3 1 VOUT Voltage Output NOTE: (*) It needs to be customized !ev.2.1_Jan_2019 -2- www.wpmtek.com WL9100 36V;1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator Order Information AS9100①②-③④⑤ Designator Symbol Description ①② S3/P3 SOT23-3L / SOT89-3L ③④ Integer ⑤ Model Output Voltage 1.8,2.5,2.8.3.0,3.3,3.6,4.0,4.2 and 5.0V A Accurate ±1% B Accurate ±2% Marking WL9100S3-XX* AFXXA(B) WL9100P3-XX* AFXXA(B) Description Package T/R Qty WL9100 36V,1.5µA IQ, 150mA Low-Dropout LDO SOT23-3L 3,000 PCS SOT89-3L 1,000 PCS Note：(*) XX Represents the Output Voltage Marking Information ①②③④⑤ ①②Represents the product name Mark ①② AF Product Series WL9100 S3 / P3 ③④Represents the Output Voltage Mark Output Voltage (V) 18 25 28 1.8 2.5 2.8 —— —— —— Mark —— —— —— 30 —— 3.0 —— 33 —— 3.3 —— ⑤Represents the Output Voltage Accurate Mark⑤ 36 —— 3.6 —— 40 42 —— —— 4.0 4.2 —— —— 50 —— —— —— 5.0 —— —— —— Product Series ±1% Output Voltage ±2% Output Voltage A B !ev.2.1_Jan_2019 Output Voltage (V) WL9100 (A or B) -3- www.wpmtek.com WL9100 36V;1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator Absolute Maximum Ratings (1) (2) Parameter Symbol Maximum Rating Unit Input Voltage VIN VOUT VSS -0.3~VSS+42.0 VSS -0.3~VSS+6.0 V V Output Current IOUT 150 mA Power Dissipation Thermal Resistance SOT23-3 400 Pd SOT89-3 SOT23-3 500 RθJA SOT89-3 (3) mW 250 ℃/W 200 ℃/W Operating Temperature Topr -40~85 ℃ Storage Temperature Tstg -40~125 ℃ Soldering Temperature & Time Tsolder 260℃, 10s Note (1): Exceeding these ratings may damage the device. Note (2): The device is not guaranteed to function outside of its operating conditions Note (3): The package thermal impedance is calculated in accordance to JESD 51-7. ESD Ratings Item V(ESD-HBM) V(ESD-CDM) ILATCH-UP Description Human Body Model (HBM) ANSI/ESDA/JEDEC JS-001-2014 Classification, Class: 2 Value Unit ±4000 V ±100 V ±150 mA Charged Device Mode (CDM) ANSI/ESDA/JEDEC JS-002-2014 Classification, Class: C0b JEDEC STANDARD NO.78E APRIL 2016 Temperature Classification, Class: I ESD testing is performed according to the respective JESD22 JEDEC standard.The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Recommended Operating Conditions Parameter MIN. MAX. Units Supply voltage at VIN 3.0 12 V Operating junction temperature range, Tj -40 125 °C Operating free air temperature range, TA -40 85 °C Note : All limits specified at room temperature (TA = 25°C) unless otherwise specified. All room temperature limits are 100% production tested. All limits at temperature extremes are ensured through correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). !ev.2.1_Jan_2019 -4- www.wpmtek.com WL9100 36V;1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator Electrical Characteristics (Test Conditions:VIN=12V, VOUT=Vset,CIN=10uF, COUT=10uF,TA=25℃, unless otherwise specified.) Parameter Symbol Input Voltage VIN Supply Current IQ Output Voltage WL9100 (A) Output Voltage WL9100 (B) Maximum Output Current Dropout Voltage VOUT1 Typ 3.0 VIN=12V ILOAD=0mA VIN=12V IOUT=10mA Max Units 36 V — 1.5 3.0 uA Vset*0.99 Vset Vset*1.01 V VIN=12V IOUT=10mA Vset*0.98 Vset Vset*1.02 V IOUT(Max) — — 150 — mA VDROP IOUT=150mA — 550 — VOUT=3.0V IOUT=100mA IOUT=150mA IOUT=100mA — — — 330 500 300 — — — IOUT=150mA IOUT=100mA IOUT=10mA (Vset+2.0v)≦VIN≦24V — — 520 300 — — — 0.15 — %/V — 45 — mV VDROP VOUT=3.3V VOUT=5.0V Line Regulation ΔVOUT/ ΔVIN•VOUT Load Regulation ΔVOUT Short Current ISHORT Output Noise Voltage eNO !ev.2.1_Jan_2019 Min VOUT2 VDROP Output Voltage Temperature Coefficient Conditions ΔVOUT/ ΔT•VOUT VIN=10V 1mA≦IOUT≦150mA mV 80 mA IOUT=50mA BW = 300Hz~50kHz 50 uVRMS IOUT=10mA 100 ppm/℃ RL=1Ω -5- www.wpmtek.com WL9100 36V;1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator Function Block Diagram Application Guideline Input Capacitor A 10μF ceramic capacitor is recommended to connect between VDD and GND pins to decouple input power supply glitch and noise. The amount of the capacitance may be increased without limit. This input capacitor must be located as close as possible to the device to assure input stability and less noise. For PCB layout, a wide copper trace is required for both VIN and GND. Output Capacitor An output capacitor is required for the stability of the LDO. The recommended output capacitance is 10μF, ceramic capacitor is recommended, and temperature characteristics are X7R or X5R. Higher capacitance values help to improve load/line transient response. The output capacitance may be increased to keep low undershoot/overshoot. Place output capacitor as close as possible to VOUT and GND pins. Dropout Voltage The dropout voltage refers to the voltage difference between the VIN and VOUT pins while operating at specific output current. The dropout voltage VDROP also can be expressed as the voltage drop on the pass-FET at specific output current (IRATED) while the pass-FET is fully operating at ohmic region and the pass-FET can be characterized asan resistance RDS(ON). Thus the dropout voltage can bedefined as (VDROP = VIN − VOUT = RDS(ON) x IRATED). Fornormal operation, the !ev.2.1_Jan_2019 -6- www.wpmtek.com WL9100 36V;1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator suggested LDO operating range is (VIN > VOUT + VDROP) for good transient response and PSRR ability. Vice versa, while operating at the ohmic region will degrade the performance severely. Thermal Application For continuous operation, do not exceed the absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated as below: TA=25°C, PCB, The max PD= (125°C − 25°C) / (Thermal Resistance °C/W) Power dissipation (PD) is equal to the product of the output current and the voltage drop across the output pass element, as shown in the equation below: PD = (VIN – VOUT) × IOUT Layout Consideration By placing input and output capacitors on the same side of the PCB as the LDO, and placing them as close as is practical to the package can achieve the best performance. The ground connections for input and output capacitors must be back to the WL9100 ground pin using as wide and as short of a copper trace as is practical.Connections using long trace lengths, narrow trace widths, and/ or connections through via must be avoided. These add parasitic inductances and resistance that results in worse performance especially during transient conditions. !ev.2.1_Jan_2019 -7- www.wpmtek.com WL9100 36V;1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator Packaging Information SOT23-3L !ev.2.1_Jan_2019 -8- www.wpmtek.com WL9100 36V;1.5μA IQ,150mA Low-Dropout Linear Voltage Regulator Packaging Information SOT89-3L !ev.2.1_Jan_2019 -9- www.wpmtek.com