XD34063 DIP8
XD33063 DIP8
XL34063 SOP8
XL33063 SOP8
1 Features
3 Description
•
•
•
•
•
•
•
The XD34063 and XD33063 devices are easy-touse ICs containing all the primary circuitry needed for
building simple DC-DC converters. These devices
primarily consist of an internal temperaturecompensated reference, a comparator, an oscillator,
a PWM controller with active current limiting, a driver,
and a high-current output switch. Thus, the devices
require minimal external components to build
converters in the boost, buck, and inverting
topologies.
1
Wide Input Voltage Range: 3 V to 40 V
High Output Switch Current: Up to 1.5 A
Adjustable Output Voltage
Oscillator Frequency Up to 100 kHz
Precision Internal Reference: 2%
Short-Circuit Current Limiting
Low Standby Current
2 Applications
•
•
•
•
•
•
•
The XD34063 device is characterized for operation
from –40°C to 85°C, while the XD33063 device is
characterized for operation from 0°C to 70°C.
Blood Gas Analyzers: Portable
Cable Solutions
HMIs (Human Machine Interfaces)
Telecommunications
Portable Devices
Consumer & Computing
Test & Measurement
5 Device Information(1)
PART NUMBER
33063 /34063
PACKAGE (PIN)
BODY SIZE
SOIC (8)
4.90 mm × 3.91 mm
SON (8)
4.00 mm × 4.00 mm
PDIP (8)
9.81 mm × 6.35 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
Drive
Collector
8
1
Switch
Collector
2
Switch
Emitter
3
Timing
Capacitor
Q2
S Q
Q1
R
100 W
Ipk
Sense
7
Ipk
Oscillator
CT
6
VCC
1.25-V
Reference
Regulator
+
−
Comparator
Inverting Input
4
5
GND
1
1
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
6 Pin Configuration and Functions
D (SOIC) OR P (PDIP) PACKAGE
(TOP VIEW)
Switch Collector
Switch Emitter
Timing Capacitor
GND
1
8
2
7
3
6
4
5
Driver Collector
Ipk
VCC
Comparator Inverting Input
DRJ (QFN) PACKAGE
(TOP VIEW)
Switch Collector
1
Switch Emitter
†
8
Driver Collector
2
7
Ipk
Timing Capacitor
3
6
VCC
GND
4
5
Comparator Inverting Input
†
The exposed thermal pad is electrically bonded internally to pin 4 (GND) .
Pin Functions
PIN
NAME
NO.
TYPE
DESCRIPTION
Switch Collector
1
I/O
High-current internal switch collector input.
Switch Emitter
2
I/O
High-current internal switch emitter output.
Timing Capacitor
3
—
Attach a timing capacitor to change the switching frequency.
GND
4
—
Ground
Comparator
Inverting Input
5
I
Attach to a resistor divider network to create a feedback loop.
VCC
6
I
Logic supply voltage. Tie to VIN.
IPK
7
I
Current-limit sense input.
Driver Collector
8
I/O
Darlington pair driving transistor collector input.
2
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
VCC
Supply voltage
VIR
Comparator inverting input voltage range
VC(switch)
Switch collector voltage
VE(switch)
Switch emitter voltage
VCE(switch)
VC(driver)
MAX
UNIT
40
V
40
V
40
V
40
V
Switch collector to switch emitter voltage
40
V
Driver collector voltage
40
V
IC(driver)
Driver collector current
100
mA
ISW
Switch current
1.5
A
TJ
Operating virtual junction temperature
150
°C
Tstg
Storage temperature range
150
°C
(1)
–0.3
VPIN1 = 40 V
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
2500
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
VCC
Supply voltage
TA
Operating free-air temperature
MIN
MAX
3
40
XD34063
–40
85
XD33063
0
70
UNIT
V
°C
7.4 Thermal Information
XD33063
THERMAL METRIC (1)
D
DRJ
P
UNIT
85
°C/W
8 PINS
RθJA
(1)
Junction-to-ambient thermal resistance
97
41
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
7.5 Electrical Characteristics—Oscillator
VCC = 5 V, TA = full operating range (unless otherwise noted) (see block diagram)
MIN
TYP
MAX
fosc
Oscillator frequency
PARAMETER
VPIN5 = 0 V, CT = 1 nF
TEST CONDITIONS
25°C
24
33
42
kHz
Ichg
Charge current
VCC = 5 V to 40 V
25°C
24
35
42
μA
Idischg
Discharge current
VCC = 5 V to 40 V
25°C
140
220
260
μA
Idischg/Ichg
Discharge-to-charge current ratio
VPIN7 = VCC
25°C
5.2
6.5
7.5
—
VIpk
Current-limit sense voltage
Idischg = Ichg
25°C
250
300
350
mV
3
TA
UNIT
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
7.6 Electrical Characteristics—Output Switch
VCC = 5 V, TA = full operating range (unless otherwise noted) (see block diagram) (1)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
UNIT
VCE(sat)
Saturation voltage –
Darlington connection
ISW = 1 A, pins 1 and 8 connected
Full range
1
1.3
V
VCE(sat)
Saturation voltage –
non-Darlington connection (2)
ISW = 1 A, RPIN8 = 82 Ω to VCC,
forced β ∼ 20
Full range
0.45
0.7
V
hFE
DC current gain
ISW = 1 A, VCE = 5 V
IC(off)
Collector off-state current
VCE = 40 V
100
μA
(1)
(2)
25°C
50
Full range
75
0.01
—
Low duty-cycle pulse testing is used to maintain junction temperature as close to ambient temperature as possible.
In the non-Darlington configuration, if the output switch is driven into hard saturation at low switch currents (≤300 mA) and high driver
currents (≥30 mA), it may take up to 2 μs for the switch to come out of saturation. This condition effectively shortens the off time at
frequencies ≥30 kHz, becoming magnified as temperature increases. The following output drive condition is recommended in the nonDarlington configuration:
Forced β of output switch = IC,SW / (IC,driver – 7 mA) ≥ 10, where ∼7 mA is required by the 100-Ω resistor in the emitter of the driver to
forward bias the Vbe of the switch.
7.7 Electrical Characteristics—Comparator
VCC = 5 V, TA = full operating range (unless otherwise noted) (see block diagram)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
25°C
1.225
1.25
1.275
Full range
1.21
UNIT
Vth
Threshold voltage
ΔVth
Threshold-voltage line regulation
VCC = 5 V to 40 V
Full range
1.4
5
mV
IIB
Input bias current
VIN = 0 V
Full range
–20
–400
nA
MIN
MAX
UNIT
1.29
V
7.8 Electrical Characteristics—Total Device
VCC = 5 V, TA = full operating range (unless otherwise noted) (see block diagram)
PARAMETER
ICC
Supply current
TEST CONDITIONS
VCC = 5 V to 40 V, CT = 1 nF,
VPIN7 = VCC, VPIN5 > Vth,
VPIN2 = GND, All other pins open
4
TA
Full range
4
mA
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
7.9 Typical Characteristics
1000
1.8
100
Pin 7 = VCC
Pin 5 = GND
TA = 25°C
VCE(SAT), Output Switch
Saturation Voltage (V)
On-Off Time (µs)
t ON-OFF, Output Switch
VCC = 5 V
t ON
10
t OFF
1
0.01
0.1
1
CT, Oscillator Timing Capacitor (nF)
1.6
1.5
1.4
1.3
1.2
1.1
1.0
1
0
0.0
10
ICC, Supply Current (mA)
VCE(SAT), Output Switch
Saturation Voltage (V)
1.0
Force Beta = 20
0.6
VCC = 5 V
Pin 7 = VCC
Pin 2, 3, 5 = GND
TA = 25°C
0.2
0.0
0
0
0.0
0.2
1
0.4 0.6 0.8 1.0
1.2
IC, Collector Current (A)
0.6
0.8
1
1.0
1.2
1.4
1.6
3.6
1.2
0.4
0.4
IE, Emitter Current (A)
Darlington Connection
0.8
0.2
Figure 2. Output Switch Saturation Voltage vs
Emitter Current (Emitter-Follower Configuration)
Figure 1. Output Switch On-Off Time vs
Oscillator Timing Capacitor
1.4
VCC = 5 V
Pin 1, 7, 8 = VCC
Pin 3, 5 = GND
TA = 25°C
1.7
1.4
3.2
2.8
2.4
2.0
1.6
CT = 1 nF
Pin 7 = VCC
Pin 2 = GND
TA = 25°C
1.2
0.8
0.4
0.0
1.6
0
5
10
15
20
25
30
VCC, Supply Voltage (V)
35
Figure 4. Standby Supply Current vs Supply Voltage
Figure 3. Output Switch Saturation Voltage vs
Collector Current (Common-Emitter Configuration)
5
40
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
8 Detailed Description
8.1 Overview
The XD33063 and XD34063 devices are easy-to-use ICs containing all the primary circuitry needed for
building simple DC-DC converters. These devices primarily consist of an internal temperature-compensated
reference, a comparator, an oscillator, a PWM controller with active current limiting, a driver, and a high-current
output switch. Thus, the devices require minimal external components to build converters in the boost, buck, and
inverting topologies.
The XD33063 device is characterized for operation from –40°C to 85°C, while the XD34063 device is
characterized for operation from 0°C to 70°C.
8.2 Functional Block Diagram
Drive
Collector
8
1
Switch
Collector
2
Switch
Emitter
3
Timing
Capacitor
Q2
S Q
Q1
R
100 W
Ipk
Sense
7
Ipk
Oscillator
CT
6
VCC
1.25-V
Reference
Regulator
+
−
Comparator
Inverting Input
4
5
GND
8.3 Feature Description
•
•
•
•
•
•
•
Wide Input Voltage Range: 3 V to 40 V
High Output Switch Current: Up to 1.5 A
Adjustable Output Voltage
Oscillator Frequency Up to 100 kHz
Precision Internal Reference: 2%
Short-Circuit Current Limiting
Low Standby Current
8.4 Device Functional Modes
8.4.1 Standard operation
Based on the application, the device can be configured in multiple different topologies. See the Application and
Implementation section for how to configure the device in several different operating modes.
6
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
9 Application and Implementation
9.1 Application Information
9.1.1 External Switch Configurations for Higher Peak Current
R*
8
1
7
VOUT
7
2
1
2
RSC
RSC
6
VIN
8
VIN
6
7
* R → 0 for constant Vin
a) EXTERNAL npn SWITCH
A.
b) EXTERNAL npn SATURATED SWITCH (see Note A)
If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents (≤300 mA) and
high driver currents (≥30 mA), it may take up to 2 μs to come out of saturation. This condition will shorten the off time
at frequencies ≥30 kHz and is magnified at high temperatures. This condition does not occur with a Darlington
configuration because the output switch cannot saturate. If a non-Darlington configuration is used, the output drive
configuration in Figure 7b is recommended.
Figure 5. Boost Regulator Connections for IC Peak Greater Than 1.5 A
7
VOUT
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
Application Information (continued)
1
1
8
8
7
7
2
RSC
2
RSC
VOUT
6
VIN
VOUT
6
VIN
a) EXTERNAL npn SWITCH
b) EXTERNAL pnp SATURATED SWITCH
Figure 6. Buck Regulator Connections for IC Peak Greater Than 1.5 A
8
8
1
1
VOUT
7
2
6
3
5
4
7
2
6
3
5
4
VOUT
VIN
VIN
a) External NPN Switch
b) External PNP Saturated Switch
Figure 7. Inverting Regulator Connections for IC Peak Greater Than 1.5 A
9.2 Typical Application
9.2.1
Voltage-Inverting Converter Application
1
8
S Q
R
Q2
Q1
2
7
Oscillator
6
VIN
4.5 V to 6.0 V
L
88 mH
Ipk
RSC
0.24 W
CT
3
VCC
+
+
_ Comparator
100 mF
1.25-V
Reference
Regulator
1N5819
+
1500 pF
4
5
1.0 mH
R1
R2
8.2 kW
VOUT
−12 V/100 mA
953 W
CO
1000 mF
VOUT = –1.25 (1+ R2)
R1
100 mF
+
+
Optional Filter
8
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
Typical Application (continued)
9.2.1.1 Design Requirements
The user must determine the following desired parameters:
Vsat = Saturation voltage of the output switch
VF = Forward voltage drop of the chosen output rectifier
The following power-supply parameters are set by the user:
Vin = Nominal input voltage
Vout = Desired output voltage
Iout = Desired output current
fmin = Minimum desired output switching frequency at the selected values of Vin and Iout
Vripple = Desired peak-to-peak output ripple voltage. The ripple voltage directly affects the line and load
regulation and, thus, must be considered. In practice, the actual capacitor value should be larger than the
calculated value, to account for the capacitor's equivalent series resistance and board layout.
9.2.1.2 Detailed Design Procedure
CALCULATION
VOLTAGE INVERTING
Vout + VF
ton/toff
Vin - Vsat
1
f
+ t off
(ton + toff)
toff
t on
t on
+1
t off
ton
(ton + toff ) - toff
CT
4 ´ 10-5 t on
æt
ö
2Iout(max ) ç on + 1÷
è t off
ø
0.3
Ipk (switch )
Ipk(switch)
RSC
(
)
æ V
- Vsat ö
ç in(min )
÷
ç
÷ t on(max )
I
pk (switch )
ç
÷
è
ø
I t
9 out on
Vripple(pp )
L(min)
CO
æ R2 ö
-1.25 ç 1 +
R1 ÷ø
è
Vout
See Figure 8
9
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
9.2.1.3 Application Performance
380
VCC = 5 V
ICHG = IDISCHG
360
VIPK, Current Limit
Sense Voltage (mV)
340
320
300
280
260
240
220
200
−50
−25
0
25
50
75
100
TA, Ambient Temperature (°C)
125
Figure 9. Current-Limit Sense Voltage vs Temperature
TEST
CONDITIONS
RESULTS
Line regulation
VIN = 4.5 V to 6 V, IO = 100 mA
3 mV ± 0.12%
Load regulation
VIN = 5 V, IO = 10 mA to 100 mA
0.022 V ± 0.09%
Output ripple
VIN = 5 V, IO = 100 mA
500 mVPP
Short-circuit current
VIN = 5 V, RL = 0.1 Ω
910 mA
Efficiency
VIN = 5 V, IO = 100 mA
62.2%
Output ripple with optional filter
VIN = 5 V, IO = 100 mA
70 mVPP
10
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
9.2.2 Step-Up Converter Application
170 mH
L
1
8
180 W
S Q
R
Q2
1N5819
Q1
2
7
Ipk
RSC
0.22 W
VIN
12 V
3
CT
6
CT
1500 pF
VCC
+
+
_ Comparator
100 mF
1.25-V
Reference
Regulator
4
5
1.0 mH
R2
R1
2.2 kW
47 kW
CO
330 mF
+
VOUT = 1.25 (1+ R2)
R1
VOUT
28 V/175 mA
100 mF
+
Optional Filter
Figure 10. Step-Up Converter
9.2.2.1 Design Requirements
The user must determine the following desired parameters:
Vsat = Saturation voltage of the output switch
VF = Forward voltage drop of the chosen output rectifier
The following power-supply parameters are set by the user:
Vin = Nominal input voltage
Vout = Desired output voltage
Iout = Desired output current
fmin = Minimum desired output switching frequency at the selected values of Vin and Iout
Vripple = Desired peak-to-peak output ripple voltage. The ripple voltage directly affects the line and load
regulation and, thus, must be considered. In practice, the actual capacitor value should be larger than the
calculated value, to account for the capacitor's equivalent series resistance and board layout.
11
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
9.2.2.2 Detailed Design Procedure
CALCULATION
STEP UP
Vout + VF- Vin(min )
ton/toff
Vin(min ) - Vsat
1
f
+ t off
(ton + toff)
toff
t on
t on
+1
t off
ton
(ton + toff ) - toff
CT
4 ´ 10-5 t on
æt
ö
2Iout(max ) ç on + 1÷
è t off
ø
0.3
Ipk (switch )
Ipk(switch)
RSC
(
)
æ V
- Vsat ö
ç in(min )
÷
ç
÷ t on(max )
Ipk (switch )
ç
÷
è
ø
I t
9 out on
Vripple(pp )
L(min)
CO
æ R2 ö
1.25 ç 1 +
R1 ÷ø
è
Vout
See Figure 10
9.2.2.3 Application Performance
TEST
CONDITIONS
RESULTS
Line regulation
VIN = 8 V to 16 V, IO = 175 mA
30 mV ± 0.05%
Load regulation
VIN = 12 V, IO = 75 mA to 175 mA
10 mV ± 0.017%
Output ripple
VIN = 12 V, IO = 175 mA
400 mVPP
Efficiency
VIN = 12 V, IO = 175 mA
87.7%
Output ripple with optional filter
VIN = 12 V, IO = 175 mA
40 mVPP
12
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
9.2.3 Step-Down Converter Application
1
8
S Q
R
Q2
Q1
2
7
VIN
25 V
1N5819
Ipk
RSC
0.33 W
Oscillator
6
CT
3
VCC
+
+
_ Comparator
100 mF
L
220 mH
CT
470 pF
1.25-V
Reference
Regulator
4
5
1.0 mH
R2
R1
1.2 kW
VOUT
5 V/500 mA
3.8 kW
CO
470 mF
VOUT = 1.25 (1+ R2)
R1
+
100 mF
+
Optional Filter
Figure 11. Step-Down Converter
9.2.3.1 Design Requirements
The user must determine the following desired parameters:
Vsat = Saturation voltage of the output switch
VF = Forward voltage drop of the chosen output rectifier
The following power-supply parameters are set by the user:
Vin = Nominal input voltage
Vout = Desired output voltage
Iout = Desired output current
fmin = Minimum desired output switching frequency at the selected values of Vin and Iout
Vripple = Desired peak-to-peak output ripple voltage. The ripple voltage directly affects the line and load
regulation and, thus, must be considered. In practice, the actual capacitor value should be larger than the
calculated value, to account for the capacitor's equivalent series resistance and board layout.
13
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
9.2.3.2 Detailed Design Procedure
CALCULATION
STEP DOWN
ton/toff
Vout + VF
Vin(min ) - Vsat - Vout
1
f
+ t off
(ton + toff)
toff
t on
t on
+1
t off
ton
(ton + toff ) - toff
CT
4 ´ 10-5 t on
Ipk(switch)
2Iout(max )
0.3
RSC
Ipk (switch )
(
æ V
- Vsat - Vout
ç in(min )
ç
Ipk (switch )
ç
è
L(min)
)ö÷ t
÷
÷
ø
on(max )
Ipk (switch ) (t on + t off )
CO
8Vripple(pp )
æ R2 ö
1.25 ç 1 +
R1 ÷ø
è
Vout
See Figure 11
9.2.3.3 Application Performance
TEST
CONDITIONS
RESULTS
Line regulation
VIN = 15 V to 25 V, IO = 500 mA
12 mV ± 0.12%
Load regulation
VIN = 25 V, IO = 50 mA to 500 mA
3 mV ± 0.03%
Output ripple
VIN = 25 V, IO = 500 mA
120 mVPP
Short-circuit current
VIN = 25 V, RL = 0.1 Ω
1.1 A
Efficiency
VIN = 25 V, IO = 500 mA
83.7%
Output ripple with optional filter
VIN = 25 V, IO = 500 mA
40 mVPP
14
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
10 Power Supply Recommendations
This device accepts 3 V to 40 V on the input. It is recommended to have a 1000-µF decoupling capacitor on the
input.
11 Layout
11.1 Layout Guidelines
Keep feedback loop layout trace lengths to a minimum to avoid unnecessary IR drop. In addition, the loop for the
decoupling capacitor at the input should be as small as possible. The trace from VIN to pin 1 of the device should
be thicker to handle the higher current.
11.2 Layout Example
1
8
2
7
0.33
XD33063
3
6
4
5
VIN
CT
100 PF
VOUT
CO
R2
R1
Figure 12. Layout Example for a Step-Down Converter
15
16
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
DIP
16
15
XD34063 DIP8/XD33063 DIP8-XL34063 SOP8/XL33063
SOP8/XL34063 SOP8
SOP
17
15
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