XL331

XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 1 Features 3 Description • • The XDx31 family of voltage-to-frequency converters are ideally suited for use in simple low-cost circuits for analog-to-digital conversion, precision frequencyto-voltage conversion, long-term integration, linear frequency modulation or demodulation, and many other functions. The output when used as a voltageto-frequency converter is a pulse train at a frequency precisely proportional to the applied input voltage. Thus, it provides all the inherent advantages of the voltage-to-frequency conversion techniques, and is easy to apply in all standard voltage-to-frequency converter applications. 1 • • • • • • • • Ensured Linearity 0.01% Maximum Improved Performance in Existing Voltage-toFrequency Conversion Applications Split or Single-Supply Operation Operates on Single 5-V Supply Pulse Output Compatible With All Logic Forms Excellent Temperature Stability: ±50 ppm/°C Maximum Low Power Consumption: 15 mW Typical at 5 V Wide Dynamic Range, 100 dB Minimum at 10-kHz Full Scale Frequency Wide Range of Full Scale Frequency: 1 Hz to 100 kHz Low-Cost 4 PART NUMBER 2 Applications • • • • Device Information(1) Voltage to Frequency Conversions Frequency to Voltage Conversions Remote-Sensor Monitoring Tachometers Schematic Diagram 1 1 PACKAGE XD331-231 DIP8 XL331 SOP8 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 5 Pin Configuration and Functions P Package 8-Pin PDIP Top View Pin Functions PIN NAME NO. IOUT 1 IREF FOUT I/O DESCRIPTION O Current Output 2 I Reference Current 3 O Frequency Output. This output is an open-collector output and requires a pullup resistor. GND 4 G Ground RC 5 I R-C filter input THRESH 6 I Threshold input COMPIN 7 I Comparator Input VS 8 P Supply Voltage 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) (3) MIN MAX UNIT 40 V +VS V 260 °C Supply Voltage, VS Output Short Circuit to Ground Continuous Output Short Circuit to VCC Continuous −0.2 Input Voltage Lead Temperature (Soldering, 10 sec.) (1) (2) PDIP Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are measured with respect to GND = 0 V, unless otherwise noted. 6.2 ESD Ratings V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2) VALUE UNIT ±500 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Human body model, 100 pF discharged through a 1.5-kΩ resistor. 2 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 6.3 Recommended Operating Conditions XD231 Operating Ambient Temperature XD331 XL331 Supply Voltage, VS (1) (1) MIN MAX −25 85 UNIT °C 0 70 °C 4 40 V All voltages are measured with respect to GND = 0 V, unless otherwise noted. 6.4 Thermal Information XD331 XL331 THERMAL METRIC (1) P (PDIP) UNIT 8 PINS RθJA (1) Junction-to-ambient thermal resistance 100 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics PARAMETER VFC Non-Linearity TEST CONDITIONS MIN TYP MAX UNIT 4.5 V ≤ VS ≤ 20 V ±0.003 ±0.01 % FullScale TMIN ≤ TA ≤ TMAX ±0.006 ±0.02 % FullScale VS = 15 V, f = 10 Hz to 11 kHz ±0.024 ±0.14 %FullScale 0.95 1 1.05 kHz/V 0.9 1 1.1 kHz/V TMIN ≤ TA ≤ TMAX 4.5 V ≤ VS ≤ 20 V ±30 ±150 ppm/°C ±20 ±50 ppm/°C 4.5 V ≤ VS ≤ 10 V 0.01 0.1 %/V 10 V ≤ VS ≤ 40 V 0.006 0.06 %/V (1) VFC Non-Linearity in Circuit of Figure 14 Conversion Accuracy Scale Factor (Gain) Temperature Stability of Gain XD231 VIN = −10 V, RS = 14 kΩ XD331, XL331 XDx31 XDx31 Change of Gain with VS Rated Full-Scale Frequency VIN = −10 V 10.0 Gain Stability vs. Time (1000 Hours) TMIN ≤ TA ≤ TMAX Over Range (Beyond Full-Scale) Frequency VIN = −11 V kHz % FullScale ±0.02 10% INPUT COMPARATOR Offset Voltage XD231 TMIN ≤ TA ≤ TMAX XD331/XL331 TMIN ≤ TA ≤ TMAX Bias Current Offset Current Common-Mode Range TMIN ≤ TA ≤ TMAX ±3 ±10 mV ±4 ±14 mV ±3 ±10 mV −80 −300 nA ±8 ±100 nA VCC − 2 V −0.2 TIMER Timer Threshold Voltage, Pin 5 Input Bias Current, Pin 5 0.667 × VS 0.7 × VS All Devices 0V ≤ VPIN 5 ≤ 9.9 V ±10 ±100 nA XD231 VPIN 5 = 10 V 200 1000 nA XD331/XL331 VPIN 5 = 10 V 200 500 nA 0.22 0.5 V VSAT PIN 5 (Reset) (1) 0.63 × VS VS = 15 V I = 5 mA Non-linearity is defined as the deviation of fOUT from VIN × (10 kHz/−10 VDC) when the circuit has been trimmed for zero error at 10 Hz and at 10 kHz, over the frequency range 1 Hz to 11 kHz. For the timing capacitor, CT, use NPO ceramic, Teflon®, or polystyrene. 3 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 Electrical Characteristics (continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 126 135 144 μA 116 136 156 μA 0.2 1 μA 0.02 10 nA 2 50 nA CURRENT SOURCE (PIN 1) XD231 Output Current 0V ≤ VPIN 1 ≤ 10 V Change with Voltage Current Source OFF Leakage RS = 14 kΩ, VPIN 1 = 0 XD331, XL331 XD231 XD331 XL331 All Devices TA = TMAX Operating Range of Current (Typical) μA (10 to 500) REFERENCE VOLTAGE (PIN 2) XD231 1.76 1.89 2.02 1.7 1.89 2.08 XD331, XL331 Stability vs. Temperature ±60 Stability vs. Time, 1000 Hours VDC VDC ppm/°C ±0.1% LOGIC OUTPUT (PIN 3) I = 5 mA VSAT 0.15 0.5 V 0.1 0.4 V ±0.05 1 μA 2 3 4 mA VS = 40 V 2.5 4 6 mA VS = 5 V 1.5 3 6 mA 2 4 8 mA I = 3.2 mA (2 TTL Loads), TMIN ≤ TA ≤ TMAX OFF Leakage SUPPLY CURRENT XD231 XD331, XL331 VS = 5 V VS = 40 V 6.6 Dissipation Ratings Package Dissipation at 25°C (1) (1) VALUE UNIT 1.25 W The absolute maximum junction temperature (TJmax) for this device is 150°C. The maximum allowable power dissipation is dictated by TJmax, the junction-to-ambient thermal resistance (θJA), and the ambient temperature TA, and can be calculated using the formula PDmax = (TJmax - TA) / θJA. The values for maximum power dissipation will be reached only when the device is operated in a severe fault condition (e.g., when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided. 4 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 6.7 Typical Characteristics Figure 1. Non-Linearity Error as Precision V-to-F Converter Figure 2. Non-Linearity Error Figure 3. Non-Linearity Error vs. Power Supply Voltage Figure 4. Frequency vs. Temperature Figure 5. VREF vs. Temperature Figure 6. Output Frequency vs. VSUPPLY 5 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 Typical Characteristics (continued) Figure 8. Non-Linearity Error (Figure 14) Figure 7. 100 kHz Non-Linearity Error Figure 9. Input Current (Pins 6,7) vs. Temperature Figure 10. Power Drain vs. VSUPPLY Figure 11. Output Saturation Voltage vs. IOUT (Pin 3) Figure 12. Non-Linearity Error, Precision F-to-V Converter 6 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 7 Detailed Description 7.1 Overview 7.1.1 Detail of Operation, Functional Block Diagram The Functional Block Diagram shows a band gap reference which provides a stable 1.9-VDC output. This 1.9 VDC is well regulated over a VS range of 3.9 V to 40 V. It also has a flat, low temperature coefficient, and typically changes less than ½% over a 100°C temperature change. The current pump circuit forces the voltage at pin 2 to be at 1.9 V, and causes a current i = 1.90 V/RS to flow. For RS=14 k, i=135 μA. The precision current reflector provides a current equal to i to the current switch. The current switch switches the current to pin 1 or to ground, depending upon the state of the R-S flip-flop. The timing function consists of an R-S flip-flop and a timer comparator connected to the external RtCt network. When the input comparator detects a voltage at pin 7 higher than pin 6, it sets the R-S flip-flop which turns ON the current switch and the output driver transistor. When the voltage at pin 5 rises to ⅔ VCC, the timer comparator causes the R-S flip-flop to reset. The reset transistor is then turned ON and the current switch is turned OFF. However, if the input comparator still detects the voltage on pin 7 as higher than pin 6 when pin 5 crosses ⅔ VCC, the flip-flop will not be reset, and the current at pin 1 will continue to flow, trying to make the voltage at pin 6 higher than pin 7. This condition will usually apply under start-up conditions or in the case of an overload voltage at signal input. During this sort of overload the output frequency will be 0. As soon as the signal is restored to the working range, the output frequency will be resumed. 7.2 Functional Block Diagram 7 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 8 Application and Implementation 8.1 Application Information 8.1.1 Simplified Voltage-to-Frequency Converter The operation of these blocks is best understood by going through the operating cycle of the basic V-to-F converter, Figure 13, which consists of the simplified block diagram of the XDx31 and the various resistors and capacitors connected to it. The voltage comparator compares a positive input voltage, V1, at pin 7 to the voltage, Vx, at pin 6. If V1 is greater, the comparator will trigger the 1-shot timer. The output of the timer will turn ON both the frequency output transistor and the switched current source for a period t = 1.1 RtCt. During this period, the current i will flow out of the switched current source and provide a fixed amount of charge, Q = i × t, into the capacitor, CL. This will normally charge Vx up to a higher level than V1. At the end of the timing period, the current i will turn OFF, and the timer will reset itself. Now there is no current flowing from pin 1, and the capacitor CL will be gradually discharged by RL until Vx falls to the level of V1. Then the comparator will trigger the timer and start another cycle. The current flowing into CL is exactly IAVE = i × (1.1×RtCt) × f, and the current flowing out of CL is exactly Vx/RL ≃ VIN/RL. If VIN is doubled, the frequency will double to maintain this balance. Even a simple V-to-F converter can provide a frequency precisely proportional to its input voltage over a wide range of frequencies. 9.1.2 Principles of Operation The XDx31 are monolithic circuits designed for accuracy and versatile operation when applied as voltage-tofrequency (V-to-F) converters or as frequency-to-voltage (F-to-V) converters. A simplified block diagram of the XDx31 is shown in Figure 13 and consists of a switched current source, input comparator, and 1-shot timer. Figure 13. Simplified Block Diagram of Stand-Alone Voltage-to-Frequency Converter and External Components 8 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 8.2 Typical Applications 8.2.1 Basic Voltage-to-Frequency Converter The simple stand-alone V-to-F converter shown in Figure 14 includes all the basic circuitry of Figure 13 plus a few components for improved performance. 231 331 *Use stable components with low temperature coefficients. See Application Information. **0.1 μF or 1 μF, See Typical Applications. Figure 14. Simple Stand-Alone V-to-F Converter with ±0.03% Typical Linearity (f = 10 Hz to 11 kHz) 8.2.1.1 Design Requirements For this example, the system requirements are 0.05% linearity over an output frequency range of 10 Hz to 4 kHz with an input voltage range of 25 mV to 12.5 V. The available supply voltage is 15.0 V. 8.2.1.2 Detailed Design Procedure A capacitor CIN is added from pin 7 to ground to act as a filter for VIN, use of a 0.1 μF is appropriate for this application. A value of 0.01 μF to 0.1 μF will be adequate in most cases; however, in cases where better filtering is required, a 1-μF capacitor can be used. When the RC time constants are matched at pin 6 and pin 7, a voltage step at VIN will cause a step change in fOUT. If CIN is much less than CL, a step at VIN may cause fOUT to stop momentarily. Next, we cancel the comparator bias current by setting RIN to 100 kΩ to match RL. This will help to minimize any frequency offset. For best results, all the components should be stable low-temperature-coefficient components, such as metal-film resistors. The capacitor should have low dielectric absorption; depending on the temperature characteristics desired, NPO ceramic, polystyrene, Teflon or polypropylene are best suited. The resistance RS at pin 2 is made up of a 12-kΩ fixed resistor plus a 5-kΩ (cermet, preferably) gain adjust rheostat. The function of this adjustment is to trim out the gain tolerance of the XDx31, and the tolerance of Rt, RL and Ct. 9 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 910 XD331 DIP-8 / XL331 SOP8 / XD231 DIP-8 911