XD7650-14

XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 2MHz, Super Chopper-Stabilized Operational Amplifier Features • Guaranteed Max Input Offset Voltage for All Temperature Ranges The XD/XL7650 Super Chopper-Stabilized Amplifier offers exceptionally low input offset voltage and is extremely stable with respect to time and temperature. It is a direct replacement for the industry-standard XD/XL7650 offering improved input offset voltage, lower input offset voltage temperature coefficient, reduced input bias current, and wider common mode voltage range. All improvements are highlighted in bold italics in the Electrical Characteristics section. Critical parameters are guaranteed over the entire commercial temperature range. • Low Long-Term and Temperature Drifts of Input Offset Voltage • Guaranteed Max Input Bias Current . . . . . . . . . . . . .10pA • Extremely Wide Common Mode Voltage Range. . . . . . . . . . . . . . . . . . . . . . . +3.5V to -5V • Reduced Supply Current . . . . . . . . . . . . . . . . . . . . . . 2mA • Guaranteed Minimum Output Source/Sink Current • Extremely High Gain . . . . . . . . . . . . . . . . . . . . . . . .150dB Intersil’s unique CMOS chopper-stabilized amplifier circuitry is user-transparent, virtually eliminating the traditional chopper amplifier problems of intermodulation effects, chopping spikes, and overrange lockup. • Extremely High CMRR and PSRR . . . . . . . . . . . . . .140dB • High Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5V/μs • Wide Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2MHz The chopper amplifier achieves its low offset by comparing the inverting and non-inverting input voltages in a nulling amplifier, nulled by alternate clock phases. Two external capacitors are required to store the correcting potentials on the two amplifier nulling inputs; these are the only external components necessary. • Unity-Gain Compensated • Clamp Circuit to Avoid Overload Recovery Problems and Allow Comparator Use • Extremely Low Chopping Spikes at Input and Output • Improved, Direct Replacement for Industry-Standard XD/XL7650 and other Second-Source Parts The clock oscillator and all the other control circuitry is entirely self-contained. However the 14 lead version includes a provision for the use of an external clock, if required for a particular application. In addition, the XD/XL7650 is internally compensated for unity-gain operation. • Pb-Free Plus Anneal Available (RoHS Compliant) 1 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 Pinouts DIP8/SOP8 CEXTA 1 8 CEXTB -IN 2 7 V+ 6 OUTPUT 5 CRETN +IN 3 V- 4 - + DIP14 CEXTB 1 14 INT/EXT CEXTA 2 13 EXT CLK IN NC (GUARD) 3 -IN 4 12 INT CLK OUT - 11 V+ + +IN 5 10 OUTPUT NC (GUARD) 6 9 OUT CLAMP 8 CRETN V- 7 Functional Diagram INT/EXT EXT CLK IN A A OSC. B EXT CLK IN C CLK OUT INTERNAL BIAS +IN A = CLK OUT P A + MAIN OUTPUT - -IN C - A A CAP RETURN B N C CLAMP NULL + B CEXTA CEXTB 2 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 Absolute Maximum Ratings Thermal Information Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +0.3) to (V- -0.3) Voltage on Oscillator Control Pins . . . . . . . . . . . . . . . . . . . . V+ to VDuration of Output Short Circuit. . . . . . . . . . . . . . . . . . . . . Indefinite Current to Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA While Operating (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .100μA Thermal Resistance (Typical, Note 2) θJA (°C/W) θJC (°C/W) XD7650-8 . . . . . . . . .. . . . . . . . . . . . . . . . 110 N/A XD7650-14 . . . . . . . . . . . . . . . . . . . . . . . . . 90 N/A XL7650-8. . . . . . . . . . . . . . . . . . . . . . . . . . . 160 N/A Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . . -55°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below Operating Conditions *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. Temperature Range 7650. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Limiting input current to 100μA is recommended to avoid latchup problems. Typically 1mA is safe, however this is not guaranteed. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VSUPPLY = ±5V. See Test Circuit, Unless Otherwise Specified PARAMETER Input Offset Voltage (Note 3) SYMBOL TEST CONDITIONS VOS Average Temperature Coefficient of Input Offset Voltage (Note 3) ΔVOS/ΔT Change in Input Offset with Time TEMP. (°C) MIN TYP MAX UNITS +25 - ±0.7 ±5 μV 0 to +70 - ±1 ±8 μV 0 to +70 - 0.02 - μV/°C ΔVOS/ΔT +25 - 100 - nV/√month Input Bias Current |I(+)|, |I(-)| IBIAS +25 - 4 10 pA 0 to +70 - 5 20 pA Input Offset Current |I(-), |I(+)| IOS +25 - 8 20 pA Input Resistance RIN Large Signal Voltage Gain (Note 3) Output Voltage Swing (Note 4) Common Mode Voltage Range (Note 3) AVOL VOUT RL = 10kΩ, VO = ±4V CMRR Power Supply Rejection Ratio PSRR - 10 40 pA +25 - 1012 - Ω +25 135 150 - dB 0 to +70 130 - - dB RL = 10kΩ +25 ±4.7 ±4.85 - V RL = 100kΩ +25 - ±4.95 - V CMVR Common Mode Rejection Ratio (Note 3) 0 to +70 CMVR = -5V to +3.5V +25 -5 -5.2 to +4 3.5 V 0 to +70 -5 - 3.5 V +25 120 140 - dB 0 to +70 120 - - dB VS = ±3V to ±8V +25 120 140 - dB Input Noise Voltage eN RS = 100Ω, f = DC to 10Hz +25 - 2 - μVP-P Input Noise Current iN f = 10Hz +25 - 0.01 - pA/√Hz +25 - 2 - MHz +25 - 2.5 - V/μs Gain Bandwidth Product Slew Rate GBWP SR CL = 50pF, RL = 10kΩ Rise Time tR +25 - 0.2 - μs Overshoot OS +25 - 20 - % +25 4.5 - 16 V +25 - 2 3 mA 0 to +70 - - 3.2 mA Operating Supply Range Supply Current V+ to VISUPP No Load 3 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 VSUPPLY = ±5V. See Test Circuit, Unless Otherwise Specified (Continued) Electrical Specifications PARAMETER SYMBOL Output Source Current TEST CONDITIONS IO SOURCE Output Sink Current IO SINK Internal Chopping Frequency fCH TEMP. (°C) MIN TYP MAX UNITS +25 2.9 4.5 - mA 0 to +70 2.3 - - mA +25 25 30 - mA 0 to +70 20 - - mA Pins 13 and 14 Open +25 120 250 375 Hz Clamp ON Current (Note 5) RL = 100kΩ +25 25 70 - μA Clamp OFF Current (Note 5) -4V ≤ VOUT ≤ +4V +25 - 0.001 5 nA 0 to +70 - - 10 nA NOTES: 3. These parameters are guaranteed by design and characterization, but not tested at temperature extremes because thermocouple effects prevent precise measurement of these voltages in automatic test equipment. 4. OUTPUT CLAMP not connected. See typical characteristic curves for output swing vs clamp current characteristics. 5. See OUTPUT CLAMP under detailed description. Test Circuit INTERMODULATION Previous chopper-stabilized amplifiers have suffered from intermodulation effects between the chopper frequency and input signals. These arise because the finite AC gain of the amplifier necessitates a small AC signal at the input. This is seen by the zeroing circuit as an error signal, which is chopped and fed back, thus injecting sum and difference frequencies and causing disturbances to the gain and phase vs frequency characteristics near the chopping frequency. These effects are substantially reduced in the XD/XL7650 by feeding the nulling circuit with a dynamic current, corresponding to the compensation capacitor current, in such a way as to cancel that portion of the input signal due to finite AC gain. Since that is the major error contribution to the XD/XL7650, the intermodulation and gain/phase disturbances are held to very low values, and can generally be ignored. R2 1MΩ R1 1MΩ 7650 OUTPUT C + C CR 0.1μF 0.1μF Application Information Detailed Description AMPLIFIER The functional diagram shows the major elements of the XD/XL7650. There are two amplifiers, the main amplifier, and the nulling amplifier. Both have offset-null capability. The main amplifier is connected continuously from the input to the output, while the nulling amplifier, under the control of the chopping oscillator and clock circuit, alternately nulls itself and the main amplifier. The nulling connections, which are MOSFET gates, are inherently high impedance, and two external capacitors provide the required storage of the nulling potentials and the necessary nulling-loop time constants. The nulling arrangement operates over the full common-mode and power-supply ranges, and is also independent of the output level, thus giving exceptionally high CMRR, PSRR, and AVOL. CAPACITOR CONNECTION The null/storage capacitors should be connected to the CEXTA and CEXTB pins, with a common connection to the CRETN pin. This connection should be made directly by either a separate wire or PC trace to avoid injecting load current IR drops into the capacitive circuitry. The outside foil, where available, should be connected to CRETN. OUTPUT CLAMP The OUTPUT CLAMP pin allows reduction of the overload recovery time inherent with chopper-stabilized amplifiers. When tied to the inverting input pin, or summing junction, a current path between this point and the OUTPUT pin occurs just before the device output saturates. Thus uncontrolled input differentials are avoided, together with the consequent charge buildup on the correction-storage capacitors. The output swing is slightly reduced. Careful balancing of the input switches, and the inherent balance of the input circuit, minimizes chopper frequency charge injection at the input terminals, and also the feed forward-type injection into the compensation capacitor, which is the main cause of output spikes in this type of circuit. 4 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 CLOCK the same time or before any input signals are applied. If this is not possible, the drive circuits must limit input current flow to under 1mA to avoid latchup, even under fault conditions. The XD/XL7650 has an internal oscillator, giving a chopping frequency of 200Hz, available at the CLOCK OUT pin on the 14 pin devices. Provision has also been made for the use of an external clock in these parts. The INT/EXT pin has an internal pull-up and may be left open for normal operation, but to utilize an external clock this pin must be tied to V- to disable the internal clock. The external clock signal may then be applied to the EXT CLOCK IN pin. An internal divide-by-two provides the desired 50% input switching duty cycle. Since the capacitors are charged only when EXT CLOCK IN is high, a 50% to 80% positive duty cycle is recommended, especially for higher frequencies. The external clock can swing between V+ and V-. The logic threshold will be at about 2.5V below V+. Note also that a signal of about 400 Hz, with a 70% duty cycle, will be present at the EXT CLOCK IN pin with INT/EXT high or open. This is the internal clock signal before being fed to the divider. OUTPUT STAGE/LOAD DRIVING The output circuit is a high-impedance type (approximately 18kΩ), and therefore with loads less than this value, the chopper amplifier behaves in some ways like a transconductance amplifier whose open-loop gain is proportional to load resistance. For example, the open-loop gain will be 17dB lower with a 1kΩ load than with a 10kΩ load. If the amplifier is used strictly for DC, this lower gain is of little consequence, since the DC gain is typically greater than 120dB even with a 1kΩ load. However, for wideband applications, the best frequency response will be achieved with a load resistor of 10kΩ or higher. This will result in a smooth 6dB/octave response from 0.1Hz to 2MHz, with phase shifts of less than 10° in the transition region where the main amplifier takes over from the null amplifier. In those applications where a strobe signal is available, an alternate approach to avoid capacitor misbalancing during overload can be used. If a strobe signal is connected to EXT CLK IN so that it is low during the time that the overload signal is applied to the amplifier, neither capacitor will be charged. Since the leakage at the capacitor pins is quite low at room temperature, the typical amplifier will drift less than 10μV/s, and relatively long measurements can be made with little change in offset. THERMO-ELECTRIC EFFECTS The ultimate limitations to ultra-high precision DC amplifiers are the thermo-electric or Peltier effects arising in thermocouple junctions of dissimilar metals, alloys, silicon, etc. Unless all junctions are at the same temperature, thermoelectric voltages typically around 0.1μV/°C, but up to tens of mV/°C for some materials, will be generated. In order to realize the extremely low offset voltages that the chopper amplifier can provide, it is essential to take special precautions to avoid temperature gradients. All components should be enclosed to eliminate air movement, especially that caused by power-dissipating elements in the system. Low thermoelectric-efficient connections should be used where possible and power supply voltages and power dissipation should be kept to a minimum. High-impedance loads are preferable, and good separation from surrounding heat-dissipating elements is advisable. COMPONENT SELECTION The two required capacitors, CEXTA and CEXTB, have optimum values depending on the clock or chopping frequency. For the preset internal clock, the correct value is 0.1μF, and to maintain the same relationship between the chopping frequency and the nulling time constant this value should be scaled approximately in proportion if an external clock is used. A high quality film type capacitor such as mylar is preferred, although a ceramic or other lower-grade capacitor may prove suitable in many applications. For quickest settling on initial turn-on, low dielectric absorption capacitors (such as polypropylene) should be used. With ceramic capacitors, several seconds may be required to settle to 1μV. GUARDING Extra care must be taken in the assembly of printed circuit boards to take full advantage of the low input currents of the XD/XL7650. Boards must be thoroughly cleaned with TCE or alcohol and blown dry with compressed air. After cleaning, the boards should be coated with epoxy or silicone rubber to prevent contamination. STATIC PROTECTION All device pins are static-protected by the use of input diodes. However, strong static fields and discharges should be avoided, as they can cause degraded diode junction characteristics, which may result in increased input-leakage currents. Even with properly cleaned and coated boards, leakage currents may cause trouble, particularly since the input pins are adjacent to pins that are at supply potentials. This leakage can be significantly reduced by using guarding to lower the voltage difference between the inputs and adjacent metal runs. The guard, which is a conductive ring surrounding the inputs, is connected to a low impedance point that is at approximately the same voltage as the inputs. Leakage currents from high-voltage pins are then absorbed by the guard. LATCHUP AVOIDANCE Junction-isolated CMOS circuits inherently include a parasitic 4-layer (PNPN) structure which has characteristics similar to an SCR. Under certain circumstances this junction may be triggered into a low-impedance state, resulting in excessive supply current. To avoid this condition, no voltage greater than 0.3V beyond the supply rails should be applied to any pin. In general, the amplifier supplies must be established either at 5 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 INPUT R1 + R2 OUTPUT OUTPUT + INPUT FIGURE 1B. FOLLOWER FIGURE 1A. INVERTING AMPLIFIER R2 - OUTPUT + R1 INPUT R1 R2 NOTE: ---------------------R1 + R2 SHOULD BE LOW IMPEDANCE FOR OPTIMUM GUARDING FIGURE 1C. NON-INVERTING AMPLIFIER FIGURE 1. CONNECTION OF INPUT GUARDS PIN COMPATIBILITY as shown in Figure 4, to enable the full output capabilities of the 741 (or any other standard device) to be combined with the input capabilities of the XD/XL7650. The pair form a composite device, so loop gain stability, when the feedback network is added, should be watched carefully. The basic pinout of the 8-pin device corresponds, where possible, to that of the industry standard 8-pin devices, the 741 ,101, etc. The null-storing external capacitors are connected to pins 1 and 8, usually used for offset null or compensation capacitors, or simply not connected. In the case of the OP-05 and OP-07 devices, the replacement of the offset-null pot, connected between pins 1 and 8 and V+, by two capacitors from those pins to pin 5, will provide easy compatibility. As for the 108, replacement of the compensation capacitor between pins 1 and 8 by the two capacitors to pin 5 is all that is necessary. The same operation, with the removal of any connection to pin 5, will suffice for the 101 ,748 and similar parts. 0.1μF 0.1μF C INPUT + 7650 - R3 + (R1||R2) ≥ 100kΩ For Full Clamp Effect The 14-pin device pinout corresponds most closely to that of the 108 device, owing to the provision of “NC” pins for guarding between the input and all other pins. Since this device does not use any of the extra pins, and has no provision for offset-nulling, but requires a compensation capacitor, some changes will be required in layout to convert it to the XD/XL7650. R C CLAMP R3 OUTPUT R2 R1 NOTE: R1||R2 indicates the parallel combination of R1 and R2. FIGURE 2. NON INVERTING AMPLIFIER WITH OPTIONAL CLAMP Figure 5 shows the use of the clamp circuit to advantage in a zero-offset comparator. The usual problems in using a chopper stabilized amplifier in this application are avoided, since the clamp circuit forces the inverting input to follow the input signal. The threshold input must tolerate the output clamp current ≈ VlN/R without disturbing other portions of the system. Typical Applications Clearly the applications of the XD/XL7650 will mirror those of other op amps. Anywhere that the performance of a circuit can be significantly improved by a reduction of input-offset voltage and bias current, the XD/XL7650 is the logical choice. Basic non-inverting and inverting amplifier circuits are shown in Figures 2 and 3. Both circuits can use the output clamping circuit to enhance the overload recovery performance. The only limitations on the replacement of other op amps by the XD/XL7650 are the supply voltage (±8V Max) and the output drive capability (10kΩ load for full swing). Even these limitations can be overcome using a simple booster circuit, The pin configuration of the 14 pin dual in-line package is designed to facilitate guarding, since the pins adjacent to the inputs are not used (this is different from the standard 741 and 101A pin configuration, but corresponds to that of the 108). 6 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 R2 R1 INPUT CLAMP CLAMP IN 7650 + C R C 0.1μF + 7650 +7.5V +15V + 741 - OUT - OUTPUT -7.5V 0.1μF -15V 0.1μF 0.1μF 10kΩ 10kΩ (R1||R2) ≥ 100kΩ For Full Clamp Effect NOTE: R1||R2 indicates the parallel combination of R1 and R2. FIGURE 4. USING 741 TO BOOST OUTPUT DRIVE CAPACITY FIGURE 3. INVERTING AMPLIFIER WITH (OPTIONAL) CLAMP 0.1μF 0.1μF C VIN + 7650 R C VOUT R CLAMP 200kΩ - 2MΩ VTH FIGURE 5. LOW OFFSET COMPARATOR XD/XL7650 5 4 16 + Q1 IIN 2 VIN - R3 12 + A2 VOUT - 1 10 R1 8048 GROUND GAIN 150pF 2kΩ 13 Q2 A1 + RIN R5 IREF 33kΩ 33kΩ V+ RREF VREF (+15V) 7 C1 15.9kΩ 15 680Ω R2 1kΩ (LOW T.C.) R0 10kΩ NOTE: For further Applications Assistance, see AN053. FIGURE 6.8048 OFFSET NULLED BY XD/XL7650 Normal logarithmic amplifiers are limited in dynamic range in the voltage-input mode by their input-offset voltage. The built-in temperature compensation and convenience features of the 8048 can be extended to a voltage-input dynamic range of close to 6 decades by using the XD/XL7650 to offset-null the 8048, as shown in Figure 6. The same concept can also be used with such devices as the 2500 or 2600 families of op amps to add very low offset voltage capability to their very high slew rates and bandwidths. Note that these circuits will also have their DC gains, CMRR, and PSRR enhanced. 7 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 Typical Performance Curves 3 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 3 2 1 2 1 0 0 4 6 8 10 12 14 -50 16 -25 0 FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE 75 100 125 8 COMMON MODE VOLTAGE LIMIT MAXIMUM OUTPUT CURRENT (mA) 50 FIGURE 8. SUPPLY CURRENT vs AMBIENT TEMPERATURE 8 6 4 2 0 -10 -20 7 2 4 6 8 10 12 14 NEGATIVE LIMIT 6 5 POSITIVE LIMIT 4 3 2 1 0 -30 16 0 TOTAL SUPPLY VOLTAGE (V) 1 2 3 4 5 SUPPLY VOLTAGE (±V) 6 7 8 FIGURE 10. COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE FIGURE 9. MAXIMUM OUTPUT CURRENT vs SUPPLY VOLTAGE 4 10Hz NOISE VOLTAGE (μVP-P) CLOCK RIPPLE DUE TO LEAKAGE CURRENT AT CAP PINS (μVP-P REFERRED TO INPUT) 25 TEMPERATURE (°C) TOTAL SUPPLY VOLTAGE (V) 100 0.1μF BROADBAND NOISE (AV = 1000) 10 1.0μF 1 0.1 25 50 75 100 TEMPERATURE (oC) 125 3 2 1 0 150 10 FIGURE 11. CLOCK RIPPLE REFERRED TO THE INPUT vs TEMPERATURE 100 1k CHOPPING FREQUENCY - CLOCK OUT (Hz) FIGURE 12. 10Hz NOISE VOLTAGE vs CHOPPING FREQUENCY 8 10k XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 Typical Performance Curves (Continued) 8 2 OFFSET VOLTAGE (μV) INPUT OFFSET VOLTAGE CHANGE (μV) 3 1 0 -1 6 4 2 -2 0 -3 4 6 8 10 12 14 10 16 100 1k 10k CHOPPING FREQUENCY - CLOCK OUT (Hz) TOTAL SUPPLY VOLTAGE (V) FIGURE 14. INPUT OFFSET VOLTAGE vs CHOPPING FREQUENCY FIGURE 13. INPUT OFFSET VOLTAGE CHANGE vs SUPPLY VOLTAGE 160 RL = 10kΩ CEXT = 0.1μF 0 20 50 120 70 100 90 80 110 60 130 40 1 2 3 4 5 6 7 8 20 0.01 9 TIME (ms) FIGURE 15. OUTPUT WITH ZERO INPUT; GAIN = 1000; BALANCED SOURCE IMPEDANCE = 10kΩ 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 16. OPEN LOOP GAIN AND PHASE SHIFT vs FREQUENCY 9 PHASE SHIFT (°) OPEN LOOP GAIN (dB) 20 20mV/DIV. 1ms/DIV. OUTPUT (mV) 140 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 Typical Performance Curves (Continued) 160 OUTPUT VOLTAGE (V) 140 50 120 70 100 90 80 110 60 PHASE SHIFT (°) OPEN LOOP GAIN (dB) 2 RL = 10kΩ CEXT = 1μF 1 CLOCK OUT LOW CLOCK OUT HIGH 0 -1 -2 130 40 0 20 0.01 0.1 1 10 100 1k FREQUENCY (Hz) 10k 0.5 1.0 1.5 TIME (μs) 2.0 2.5 100k NOTE: The two different responses correspond to the two phases of the clock. FIGURE 17. OPEN LOOP GAIN AND PHASE SHIFT vs FREQUENCY FIGURE 18. VOLTAGE FOLLOWER LARGE SIGNAL PULSE RESPONSE (NOTE) 100μA N-CHANNEL CLAMP CURRENT OUTPUT VOLTAGE (V) 2 1 0 CLOCK OUT LOW CLOCK OUT HIGH -1 -2 0 NOTE: 0.5 1.0 1.5 10μA 1μA 100nA 10nA 1nA 100pA 10pA 1pA 2.0 TIME (μS) 0.8 0.6 The two different responses correspond to the two phases of the clock. FIGURE 19. VOLTAGE FOLLOWER LARGE SIGNAL PULSE RESPONSE (NOTE) P-CHANNEL CLAMP CURRENT 0.2 FIGURE 20. N-CHANNEL CLAMP CURRENT vs OUTPUT VOLTAGE 100μA 10μA 1μA 100nA 10nA 1nA 100pA 10pA 1pA -0.8 0.4 OUTPUT VOLTAGE (ΔV-) -0.6 -0.4 OUTPUT VOLTAGE (ΔV+) -0.2 0 FIGURE 21. P-CHANNEL CLAMP CURRENT vs OUTPUT VOLTAGE 10 0 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 封装信息 8 引脚塑封双列直插式封装 （P）——300 mil （DIP） E1 D 2 n 1 a E A2 A L c A1 b B1 p eB 引脚数 引脚间距 顶端到固定面高度 塑模封装厚度 塑模底面到固定面高度 肩到肩宽度 塑模封装宽度 总长度 引脚尖到固定面高度 引脚厚度 引脚上部宽度 引脚下部宽度 总排列间距 塑模顶部锥度 塑模底部锥度 B 单位 尺寸范围 n p A A2 A1 E E1 D L c B1 B eB a b 最小 英寸 * 正常 .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 11 最大 8 .100 .155 .130 .170 .145 .313 .250 .373 .130 .012 .058 .018 .370 10 10 .325 .260 .385 .135 .015 .070 .022 .430 15 15 最小 3.56 2.92 0.38 7.62 6.10 9.14 3.18 0.20 1.14 0.36 7.87 5 5 毫米 正常 最大 8 2.54 3.94 3.30 4.32 3.68 7.94 6.35 9.46 3.30 0.29 1.46 0.46 9.40 10 10 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 8 引脚中等宽度塑封小型封装 （SM）——主体 208 mil （SOP8） % % P $  N  " A C ! ! F , B ᓩ㛮᭄ ᓩ㛮䯈䎱 ᘏ催ᑺ ล῵ᇕ㺙८ᑺ  ぎ䯈䱭 ᘏᆑᑺ ล῵ᇕ㺙ᆑᑺ ᘏ䭓ᑺ ᑩ䎇䭓ᑺ ᑩ䎇ؒ᭰ᑺ ᑩ䎇८ᑺ ᑩ䎇ᆑᑺ ล῵乊䚼䫹ᑺ ล῵ᑩ䚼䫹ᑺ ऩԡ ሎᇌ㣗ೈ N P ! ! ! % % $ , F C " A B ᳔ᇣ             㣅ᇌ ℷᐌ               12 ! ᳔໻             ᳔ᇣ             ↿㉇ ℷᐌ               ᳔໻             XD7650-14 DIP-14 ,XD7650-8 DIP-8,XL7650-8 SOP8 DIP14 D 8 E 14 1 b 7 3 A Z L A1 Reference Symbol e θ bp c e1 ( Ni/Pd/Au plating ) 13 e1 D E A A1 bp b3 c θ e Z L Dimension in Millimeters Min Nom Max 7.62 19.2 20.32 6.3 7.4 5.06 0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0° 15° 2.29 2.54 2.79 2.39 2.54