XL4558

XD4558 DIP8 / XL4558 SOP8 1 Features 3 Description • • The XDXL/4558 device is a dual general-purpose operational amplifier, with each half electrically similar to the μA741, except that offset null capability is not provided. 1 • • • • • • Continuous Short-Circuit Protection Wide Common-Mode and Differential Voltage Ranges No Frequency Compensation Required Low Power Consumption No Latch-Up Unity-Gain Bandwidth: 3 MHz Typ Gain and Phase Match Between Amplifiers Low Noise: 8 nV/√Hz Typ at 1 kHz The high common-mode input voltage range and the absence of latch-up make this amplifier ideal for voltage-follower applications. The device is shortcircuit protected, and the internal frequency compensation ensures stability without external components. 2 Applications • • DVD Recorders and Players Pro Audio Mixers 4 Noninverting Amplifier Schematic RIN VIN 5 Pin Configuration and Functions + VOUT RG RF D, DGK, P, PS, OR PW PACKAGE (TOP VIEW) 1OUT 1IN− 1IN+ VCC− 1 8 2 7 3 6 4 5 VCC+ 2OUT 2IN− 2IN+ Pin Functions PIN NAME NO. TYPE DESCRIPTION 1IN+ 3 I Noninverting input 1IN- 2 I Inverting Input 1OUT 1 O Output 2IN+ 5 I Noninverting input 2IN- 6 I Inverting Input 2OUT 7 O Output VCC+ 8 — Positive Supply VCC- 4 — Negative Supply 1 1 XD4558 DIP8 / XL4558 SOP8 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN VCC+ VCC– MAX 18 Supply voltage (2) –18 UNIT V VID Differential input voltage (3) ±30 V VI Input voltage (any input) (2) (4) ±15 V Duration of output short circuit to ground, one amplifier at a time TJ (1) (2) (3) (4) (5) (5) Unlimited Operating virtual junction temperature 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC–. Differential voltages are at IN+ with respect to IN–. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. 6.2 Handling Ratings Tstg Storage temperature range V(ESD) (1) (2) Electrostatic discharge MIN MAX UNIT -65 150 °C 0 500 0 1000 Human body model (HBM), per AEC Q100-002 (1) Charged device model (CDM), per AEC Q100-011 (2) V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions VCC+ VCC– TA MIN MAX 5 15 –5 –15 XD4558 0 70 XL4558 –40 85 Supply voltage Operating free-air temperature UNIT V °C 6.4 Thermal Information XDXL/4558 THERMAL METRIC (1) D DGK Junction-to-ambient thermal resistance 97 172 P PS PW UNIT 95 149 °C/W 8 PINS RθJA (1) 85 For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 XD4558 DIP8 / XL4558 SOP8 6.5 Electrical Characteristics at specified free-air temperature, VCC+ = 15 V, VCC– = –15 V TEST CONDITIONS (1) PARAMETER VIO Input offset voltage VO = 0 IIO Input offset current VO = 0 IIB Input bias current VO = 0 VICR Common-mode input voltage range RL = 10 kΩ VOM Maximum output voltage swing RL = 2 kΩ RL ≥ 2 kΩ, VO = ±10 V TA (2) 25°C ±12 ±14 ±12 ±14 ±13 25°C ±10 Full range ±10 25°C 20 Full range 15 Input resistance 25°C Common-mode rejection ratio 25°C AVD = 100, RS = 100 Ω, f = 1 kHz, BW = 1 Hz ICC Supply current (both amplifiers) VO = 0, No load PD VO1/VO2 (1) (2) VO = 0, No load Total power dissipation (both amplifiers) Crosstalk attenuation Open loop RS = 1 kΩ, f = 10 kHz AVD = 100 6 mV 200 nA 500 nA 800 25°C CMRR Equivalent input noise voltage (closed loop) 150 25°C ri UNIT 300 25°C 25°C Vn 5 Full range Unity-gain bandwidth MAX 7.5 Full range B1 Supply-voltage sensitivity (ΔVIO/ΔVCC) 0.5 25°C Large-signal differential voltage amplification kSVS TYP Full range AVD VCC = ±15 V to ±9 V MIN V V 300 V/mV 3 MHz 0.3 5 MΩ 70 90 dB 25°C 30 25°C 8 25°C μV/V 150 nV/√Hz 2.5 5.6 TA min 3 6.6 TA max 2.3 5 25°C 75 170 TA min 90 200 TA max 70 150 85 25°C mA mW dB 105 All characteristics are measured under open-loop conditions with zero common-mode input voltage, unless otherwise specified. Full range is 0°C to 70°C for XD4558 and –40°C to 85°C for XL4558 6.6 Operating Characteristics VCC+ = 15 V, VCC– = –15 V, TA = 25°C PARAMETER tr SR TEST CONDITIONS MIN Rise time VI = 20 mV, RL = 2 kΩ, CL = 100 pF Overshoot VI = 20 mV, RL = 2 kΩ, CL = 100 pF Slew rate at unity gain VI = 10 V, RL = 2 kΩ, CL = 100 pF 3 TYP 0.13 MAX UNIT ns 5% 1.1 1.7 V/μs XD4558 DIP8 / XL4558 SOP8 6 6 5 5 ICC – Supply Current – mA 4 3 2 1 4 3 2 1 0 0 2 4 6 8 10 12 14 16 18 0 -55 20 -35 VCC – Supply Voltage – V -15 5 25 45 65 Supply Current vs Supply Voltage (TA = 25°C) 40 40 30 -20 -60 10 -100 -120 Phase -60 Gain 10 -160 Phase -160 -10 -180 -200 10000 -20 100 f – Frequency – kHz 10 25 VOM – Output Voltage Swing – V VOM – Output Voltage Swing – V 30 5 0 -5 -10 -15 12 -200 10000 Gain and Phase vs Frequency (VCC = ±15 V, RL = 10 kΩ, CL = 22 pF) 15 10 1000 f – Frequency – kHz Gain and Phase vs Frequency (VCC = ±15 V, RL = 2 kΩ, CL = 22 pF) 8 -120 -140 -180 6 -80 -100 0 -140 -10 -40 20 Gain – dB -80 Gain Phase – deg 20 Gain – dB 30 -40 1000 125 0 -20 -20 100 105 Supply Current vs Temperature (VCC = ±15 V) 0 0 85 TA – Temperature – °C Phase – deg ICC – Supply Current – mA 6.7 Typical Characteristics 14 16 20 15 10 5 0 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 10 100 10k 100k 1.E+06 1 1k 1M 18 VCC – Supply Voltage – V f – Frequency – Hz Output Voltage Swing vs Supply Voltage (RL = 2 kΩ, TA = 25°C) Output Voltage Swing vs Frequency (VCC = ±15 V, RL = 2 kΩ, TA = 25°C) 4 XD4558 DIP8 / XL4558 SOP8 Typical Characteristics (continued) 15 32 14.75 28 VOM – Output Voltage Swing – V VOM – Output Voltage Swing – V 30 26 24 22 20 18 16 14.5 14.25 14 13.75 13.5 13.25 14 12 100 1000 13 -55 10000 -35 -15 5 25 45 65 85 105 125 TA – Temperature – °C RloadR– –Load LoadResistance Resistance–– W L Output Voltage Swing vs Temperature (VCC = ±15 V, RL = 10 kΩ) Output Voltage Swing vs Load Resistance (VCC = ±15 V, TA = 25°C) 120 -12 110 100 -12.5 G M – Open Loop Gain – dB –V OM – Output Voltage Swing – V -12.25 -12.75 -13 -13.25 -13.5 90 80 70 60 50 40 30 20 -13.75 10 -14 -55 -35 -15 5 25 45 65 85 0 100 1.E+02 105 125 1k 1.E+03 TA – Temperature – °C 10k 1.E+04 100k 1.E+05 1M 1.E+06 10M 1.E+07 f – Frequency – Hz Negative Output Voltage Swing vs Temperature (VCC = ±15 V, RL = 10 kΩ) Open Loop Gain vs Frequency (VCC = ±15 V, RL = 2 kΩ, CL = 22 pF, TA = 25°C) 200 0.003 190 0.002 VIO – Input Offset Voltage – V IIB – Input Bias Current – nA 180 170 160 150 140 130 120 0.001 0 -0.001 -0.002 110 100 -55 -35 -15 5 25 45 65 85 -0.003 -55 105 125 -35 -15 5 25 45 65 85 105 125 TA – Temperature – °C TA – Temperature – °C Input Bias Current vs Temperature (VCC = ±15 V) Input Offset Voltage vs Temperature (VCC = ±15 V) 5 XD4558 DIP8 / XL4558 SOP8 Typical Characteristics (continued) – Input NoiseVoltage Voltage––nV/rt(Hz) nV/ÖHz Vn V–n Input Noise 14 12 10 8 6 4 2 0 10 1.E+01 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 f – Frequency – Hz Input Noise Voltage vs Frequency (VCC = ±15 V, TA = 25°C) 6 XD4558 DIP8 / XL4558 SOP8 7 Detailed Description 7.1 Overview The XDXL/4558 device is a dual general-purpose operational amplifier, with each half electrically similar to the μA741, except that offset null capability is not provided. The high common-mode input voltage range and the absence of latch-up make this amplifier ideal for voltagefollower applications. The device is short-circuit protected, and the internal frequency compensation ensures stability without external components. 7.2 Functional Block Diagram VCC+ IN− IN+ OUT VCC− 7.3 Feature Description 7.3.1 Unity-Gain Bandwidth The unity-gain bandwidth is the frequency up to which an amplifier with a unity gain may be operated without greatly distorting the signal. The XDXL/4558 device has a 3-MHz unity-gain bandwidth. 7.3.2 Common-Mode Rejection Ratio The common-mode rejection ratio (CMRR) of an amplifier is a measure of how well the device rejects unwanted input signals common to both input leads. It is found by taking the ratio of the change in input offset voltage to the change in the input voltage, then converting to decibels. Ideally the CMRR is infinite, but in practice, amplifiers are designed to have it as high as possible. The CMRR of the XDXL/4558device is 90 dB. 7.3.3 Slew Rate The slew rate is the rate at which an operational amplifier can change its output when there is a change on the input. The XDXL/4558 device has a 1.7 V/μs slew rate. 7.4 Device Functional Modes The XDXL/4558 device is powered on when the supply is connected. Each of these devices can be operated as a single supply operational amplifier or dual supply amplifier depending on the application. 7 XD4558 DIP8 / XL4558 SOP8 8 Application and Implementation 8.1 Typical Application Some applications require differential signals. Figure 14 shows a simple circuit to convert a single-ended input of 2 V to 10 V into differential output of ±8 V on a single 15-V supply. The output range is intentionally limited to maximize linearity. The circuit is composed of two amplifiers. One amplifier acts as a buffer and creates a voltage, VOUT+. The second amplifier inverts the input and adds a reference voltage to generate VOUT–. Both VOUT+ and VOUT– range from 2 V to 10 V. The difference, VDIFF, is the difference between VOUT+ and VOUT–. R2 15 V R1 VOUT+ R3 VREF 12 V + R4 VDIFF ± VOUT+ + VIN Schematic for Single-Ended Input to Differential Output Conversion 8 XD4558 DIP8 / XL4558 SOP8 Typical Application (continued) 8.1.1 Design Requirements The design requirements are as follows: • Supply voltage: 15 V • Reference voltage: 12V • Input: 2 V to 10 V • Output differential: ±8 V 8.1.2 Detailed Design Procedure The circuit in Figure 14 takes a single-ended input signal, VIN, and generates two output signals, VOUT+ and VOUT– using two amplifiers and a reference voltage, VREF. VOUT+ is the output of the first amplifier and is a buffered version of the input signal, VIN (see Equation 1). VOUT– is the output of the second amplifier which uses VREF to add an offset voltage to VIN and feedback to add inverting gain. The transfer function for VOUT– is Equation 2. VOUT+ = VIN (1) æ R 44 ö æ R22 ö R2 VOUT - VINin ´ 2 out - = VREF ref ´ ç ÷ ´ ç1 + ÷ + R 44 ø è R11 ø R11 è R33+ (2) The differential output signal, VDIFF, is the difference between the two single-ended output signals, VOUT+ and VOUT–. Equation 3 shows the transfer function for VDIFF. By applying the conditions that R1 = R2 and R3 = R4, the transfer function is simplified into Equation 6. Using this configuration, the maximum input signal is equal to the reference voltage and the maximum output of each amplifier is equal to the VREF. The differential output range is 2×VREF. Furthermore, the common mode voltage will be one half of VREF (see Equation 7). æ öæ æ R ö R4 R2 ö VD IF F = V O U T + - V O U T - = VIN ´ ç 1 + 2 ÷ - VR E F ´ ç ÷ ç1 + ÷ R1 ø R1 ø è è R3 + R4 ø è VOUT+ = VIN VOUT– = VREF – VIN VDIFF = 2×VIN – VREF (3) (4) (5) (6) + VOUT - ö 1 æV Vcm = ç OUT + ÷ = VREF 2 è ø 2 (7) 8.1.2.1 Amplifier Selection Linearity over the input range is key for good dc accuracy. The common mode input range and the output swing limitations determine the linearity. In general, an amplifier with rail-to-rail input and output swing is required. Bandwidth is a key concern for this design. Because XDXL/4558 has a bandwidth of 3 MHz, this circuit will only be able to process signals with frequencies of less than 3 MHz. 8.1.2.2 Passive Component Selection Because the transfer function of VOUT– is heavily reliant on resistors (R1, R2, R3, and R4), use resistors with low tolerances to maximize performance and minimize error. This design used resistors with resistance values of 36 kΩ with tolerances measured to be within 2%. But, if the noise of the system is a key parameter, the user can select smaller resistance values (6 kΩ or lower) to keep the overall system noise low. This ensures that the noise from the resistors is lower than the amplifier noise. 9 XD4558 DIP8 / XL4558 SOP8 Typical Application (continued) 8.1.3 Application Curves The measured transfer functions in Figure 15, Figure 16, and Figure 17 were generated by sweeping the input voltage from 0 V to 12 V. However, this design should only be used between 2 V and 10 V for optimum linearity. 16 16 12 14 12 VOUT+ (V) 4 0 10 8 6 ±4 4 ±8 2 0 ±12 0 2 4 6 8 10 VIN (V) 0 12 2 4 Differential Output Voltage Node vs Input Voltage 10 8 6 4 2 0 2 8 10 12 C001 Positive Output Voltage Node vs Input Voltage 12 0 6 VIN (V) C003 VOUTt (V) VDIFF (V) 8 4 6 VIN (V) 8 10 12 C002 Positive Output Voltage Node vs Input Voltage 10 XD4558 DIP8 / XL4558 SOP8 9 Layout 9.1 • • • • • • Layout Guidelines For best operational performance of the device, use good PCB layout practices, including: Noise can propagate into analog circuitry through the power pins of the circuit as a whole and the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single supply applications. Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. For more detailed information, refer to Circuit Board Layout Techniques, (SLOA089). To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. Place the external components as close to the device as possible. Keeping RF and RG close to the inverting input minimizes parasitic capacitance, as shown in Layout Example. Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 9.2 Layout Example VIN RIN + RG VOUT RF Operational Amplifier Schematic for Noninverting Configuration Place components close to device and to each other to reduce parasitic errors Run the input traces as far away from the supply lines as possible VS+ RF OUT1 VCC+ GND IN1í OUT2 VIN IN1+ IN2í VCCí IN2+ RG GND RIN Use low-ESR, ceramic bypass capacitor Only needed for dual-supply operation GND VS(or GND for single supply) Ground (GND) plane on another layer Operational Amplifier Board Layout for Noninverting Configuration 11 XD4558 DIP8 / XL4558 SOP8 12 11 XD4558 DIP8 / XL4558 SOP8 13 12