4-7cells Li-ion/polymer battery protection IC
MM3877 series
Outline
The MM3787 series are protection IC using high voltage CMOS process for overcharge, overdischarge, overcurrent,
temperature protection, and cell balance control of the rechargeable Lithium-ion or Lithium-polymer battery.
The overcharge, overdischarge, discharging overcurrent, charging overcurrent, and short of the rechargeable 47cells lithium-ion or lithium-polymer battery can detected. In addition, the temperature detection by external NTC
thermistor and cell balance control are also possible. The internal circuit of IC is composed by the voltage detector,
the reference voltage source, oscillator, counter circuit and the logical circuit, etc. A stacking configuration using
multiple ICs is also possible, so a low-cost, space-saving protection circuit can be configured for applications with
more than 7 cells.
Features
・Range and accuracy of detection/release voltage/temperature
(Unless otherwise specified, Topr=+25°C)
Range
Accuracy
Overcharge detection voltage
3.6V to 4.5V, 5mV step
±20mV
Overcharge release voltage *1
3.4V to 4.5V, 50mV step
±30mV
Overdischarge detection voltage
2.0V to 3.0V, 50mV step
±50mV
Overdischarge release voltage *2
2.0V to 3.5V, 50mV step
±100mV
Cell balance detection voltage
3.6V to 4.5V, 5mV step
±25mV
Discharging overcurrent detection voltage1
30mV to 300mV, 5mV step
±10% (Min.±5mV)
Discharging overcurrent detection voltage2
60mV to 600mV, 6mV step
±15% (Min.±15mV)
Short detection voltage
200mV to 1.0V, 50mV step
±20%
Charging overcurrent detection voltage
-300mV to -20mV, 5mV step
±10% (Min.±5mV)
High/low temp protection detection temperature *3
-40°C to 75°C , 5°C step
±5°C
・SEL pin can be set from 4cell protection to 7 cell protection.
・Power save function
After overdischarge detection, if the charger is not connected and any cell voltage is below the overdischarge
release voltage and the power save delay time has elapsed, the IC enters power save mode.
In power save mode, the IC stops unnecessary circuits and reduces current consumption.
・Cascade connection
By cascading two ICs, it is possible to protect batteries of 8 cells or more.
By connecting the OV pin and DCHG pin of the high side IC to the SOC pin and SDC pin of the low side IC respectively,
it is possible to transmit charge/discharge control signal from high side IC to low side IC and the charge/load
connection signal from the low side IC to high side IC. Various functions can be supported without increasing the
number of external circuits in cascade connection.
■ All brand names, logos, product names, trade names and service names described here are trademarks or registered trademarks of their respective companies or organizations.
■ Any products mentioned in this leaflet are subject to any modification in their appearance and others for improvements without prior notification.
■ The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications.
Oct, 2020 Rev.0
Features
・0V battery charge function
Selection from "Permission" or " Inhibition"
・Current consumption
Ave. current consumption (Normal mode)
Typ. 20.0uA Max. 30.0uA (VCELL=3.5V)
Current consumption (power save mode)
Typ. 1.0uA Max. 1.5uA (VCELL=1.8V)
*1 Overcharge release function is selectable from 2 options(voltage decrease, charger remove).
*2 Overdischarge release function is selectable from 2 options(voltage increase , load remove).
*3 High/Low temp protection detection temperature accuracy is guaranteed by design.
Detection accuracy may change with the specification of the used NTC thermistor.
Package type
・VSOP-20A
8.66 × 6.00 × 1.50 [mm]
Oct, 2020 Rev.0
Block Diagram
SOC
SDC
SEL
VDD
V7
VSOC_CNT
VSDC_CNT
OV
REG
V6
DCHG
V5
SEL
V4
L/S
HV→LV
+
-
Logic
&
Timer
V3
CB_CNT
V2
Cell_MON
V1
+
-
PD
Cell_MON
CB_CNT
VSS
Short
delay
V_MON_SW
T_MON_SW
+
-
L/S
LV→HV
OSC1
+
+
+
TH
+
OSC2
+
-
CS
VSOC_CNT
VSDC_CNT
V_MON_SW
T_MON_SW
VCM
VLM
COC
Package
VDD
1
20
SDC
V7
2
19
SOC
V6
3
18
VCM
V5
4
17
OV
V4
5
16
VLM
V3
6
15
DCHG
V2
7
14
CS
V1
8
13
TH
SEL
9
12
VSS
PD
10
11
COC
TOP VIEW
Oct, 2020 Rev.0
Pin configuration
PIN No. Symbol
Function
1
VDD
The input pin of the power supply of IC.
2
V7
The input pin of the positive voltage of V7 cell and the output pin of cell balance control of V7 cell.
3
V6
The input pin of the positive voltage of V6, and the negative voltage of V7 cell.
And the output pin of cell balance control of V6 cell.
4
V5
The input pin of the positive voltage of V5, and the negative voltage of V6 cell.
And the output pin of cell balance control of V5 cell.
5
V4
The input pin of the positive voltage of V4, and the negative voltage of V5 cell.
And the output pin of cell balance control of V4 cell.
6
V3
The input pin of the positive voltage of V3, and the negative voltage of V4 cell.
And the output pin of cell balance control of V3 cell.
7
V2
The input pin of the positive voltage of V2, and the negative voltage of V3 cell.
And the output pin of cell balance control of V2 cell.
8
V1
The input pin of the positive voltage of V1, and the negative voltage of V2 cell.
And the output pin of cell balance control of V1 cell.
9
SEL
This input pin is changing function for 4cell, 5cell, 6cell, and 7cell in series.
SEL=VDD：7cell mode, SEL=V4：6cell mode, SEL=V2：5cell mode, SEL=VSS=4cell mode
10
PD
The output pin for controlling pull-down of load negative voltage.
11
COC
This input pin sets delay time of discharging overcurrent detection, and selects mode.
It is able to set delay time by connecting a condenser between VSS pin and COC pin.
Connect condenser between VSS ：Charge/Discharge control FET drive mode
COC=VDD ：Cascade connection mode
12
VSS
The input pin of the negative voltage of V1 cell. The input pin the ground of IC.
13
TH
Temperature detection pin. Detected temperature by NTC thermistor between TH-VSS pins.
14
15
16
17
18
The input pin of over current detection. Detected overcurrent by sense resistor between CS-VSS
pins.
When charge/discharge control FET drive mode, DCHG pin is discharge control output pin.
When cascade mode, DCHG pin is discharge control output pin and load connect signal input pin.
Charge/discharge control FET drive mode : Output type is CMOS.
・Normal state
: VDCHG=High
DCHG ・Discharge inhibition state : VDCHG=Low
Cascade connection mode : Output type is constant current.
・Normal state
: IDCHG=Typ.1.1uA
・Overdischarge state
: IDCHG=0A
・Temp protection state
: IDCHG=Typ.6.5uA
VLM The input pin connected to load negative voltage. Detected load connection.
When charge/discharge control FET drive mode, OV pin is charge control output pin.
When cascade mode, OV pin is charge control output pin and charger connect signal input pin.
Charge/discharge control FET drive mode : Output type is CMOS.
・Normal state
: VOV =High
OV
・Charge inhibition state : VOV=Hi-Z
Cascade connection mode : Output type is constant current.
・Normal state
: IOV=Typ.1.1uA
・Overcharge state
: IOV=0A
・Temp protection state
: IOV=Typ.6.5uA
VCM The input pin connected to charger negative voltage. Detected charger connection.
CS
19
SOC
The input pin for charge control. And, charger connect signal output pin.
20
SDC
The input pin for discharge control. And, load connect signal output pin.
Oct, 2020 Rev.0
Package dimensions
Unit:mm
VSOP-20A
Oct, 2020 Rev.0
Absolute Maximum Ratings
Parameter
Symbol
Supply voltage
V7 pin supply voltage
Rating
Unit
VDD
-0.3 to 42
V
V7
VSS-0.3 to VDD+0.3
V
VCELL
-0.3 to 6
V
VSEL,VCOC
VSS-0.3 to VDD+0.3
V
VPD
VSS-0.3 to VDD+0.3
V
VTH,VCS
VSS-0.3 to VDD+0.3
V
VDCHG
VDD-42 to VDD+10
V
VOV
VDD-42 to VDD+0.3
V
VLM pin, VCM pin supply voltage
VVLM,VVCM
VDD-42 to VDD+0.3
V
SOC pin, SDC pin supply voltage
VSOC,VSDC
VSS-0.3 to VDD+0.3
V
Tstg
-55 to 125
340
degC
Voltage between cell input pins
SEL pin , COC pin input supply voltage
PD pin supply voltage
TH pin, CS pin supply voltage
DCHG pin supply voltage
OV pin supply voltage
Storage temperature
Power Dissipation
Pd
mW
Recommended Operating Conditions
Symbol
Rating
Operating ambient temperature
Parameter
Topr
-40 to +85
Unit
degC
Operating voltage
Vop
3.5 to 31.5
V
Oct, 2020 Rev.0
Electrical characteristics
Unless otherwise specified, Topr=+25℃, VDD=24.5V, VCELLn=3.5V, RTH=10kΩ
Parameter
Symbol
SEL=VDD, CS=VLM=VCM=SOC=SDC=VSS, ROV=1MΩ
UNIT
Conditions
Min.
Typ.
Max.
Current consumption / Input current
Ave. current consumption (Normal mode)
Idd
Vcell=3.5V
-
20.0
30.0
uA
Current consumption (Power save mode)
Idd_ps
Vcell=1.8V
-
1.0
1.5
uA
V7 pin input current (Normal mode)
Iv7
Vcell=3.5V
-
0.2
0.5
uA
V1-6 pin input current (Normal mode)
Ivn
Vcell=3.5V
-0.30
-
0.30
uA
Ivn_cb
Vcell=4.5V
3.0
6.0
-
mA
Vovp
Typ+0.020
V
V1-7 pin input current (Cell balance mode)
Detection/Release voltage/temperature
Overcharge detection voltage
Vovp
Typ-0.020
Overcharge release voltage
Vovr
Typ-0.030
Vovr
Typ+0.030
V
Overdischarge detection voltage
Vuvp
Typ-0.050
Vuvp
Typ+0.050
V
Overdischarge release voltage
Vuvr
Typ-0.100
Vuvr
Typ+0.100
V
Cell balance detection voltage
Vcbd
Typ-0.025
Vcbd
Typ+0.025
V
Cell balance hysteresis voltage *5
Vcbh
Typ-0.005
Vcbh
Typ+0.005
V
Discharging overcurrent detection voltage 1
Vdocp1
Typ-10%
Vdocp1
Typ+10%
V
Discharging overcurrent detection voltage 2
Vdocp2
Typ-15%
Vdocp2
Typ+15%
V
VSCP
Typ-20%
Vscp
Typ+20%
V
Charging overcurrent detection voltage
Vcocp
Typ-10%
Vcocp
Typ+10%
V
VLM pin detection voltage
Vlm_d
1.50
2.00
2.50
V
VCM pin detection voltage
Vcm_d
-0.060
-0.030
0.000
V
Vld
1.5
3.0
4.5
mV
for discharge
control
Tthp1
Typ-5
Tthp1
Typ+5
℃
Tthr1
Typ-5
Tthr1
Typ+5
℃
for charge
control
Tthp2
Typ-5
Tthp2
Typ+5
℃
Tthr2 RNTC=10kΩ±1%,
Tthp3 B=3950±1%
Typ-5
Tthr2
Typ+5
℃
Typ-5
Tthp3
Typ+5
℃
Tthr3
Typ-5
Tthr3
Typ+5
℃
Tthp4
Typ-5
Tthp4
Typ+5
℃
Tthr4
Typ-5
Tthr4
Typ+5
℃
Short detection voltage
CS pin detection voltage for discharging
detection temp *5
High
temp
protection
release temp *5
detection temp *5
release temp *5
detection temp *5
Low temp release temp *5
protection detection temp *5
for discharge
control
release temp *5
for charge
control
Delay time
Overcharge detection delay time
tovp
※6
tovp
※6
sec
Overdischarge detection delay time
tuvp
※6
tuvp
※6
sec
Cell balance detection delay time
tcbd
※6
msec
※6
tcbd
Discharging overcurrent detection delay time 1 tdocp1 COC=0.01uF
Typ-25%
tdocp1
Typ+25% msec
Discharging overcurrent detection delay time 2 tdocp2 COC=0.01uF
Typ-25%
tdocp2
Typ+25% msec
Short detection delay time
tscp
Typ-50%
tscp
Typ+50% usec
Discharging overcurrent release delay time
tdocr
Typ-25%
tdocr
Typ+25% msec
Charging overcurrent detection delay time
tcocp
Typ-25%
tcocp
Typ+25% msec
Charging overcurrent release delay time
tcocr
Typ-25%
tcocr
Typ+25% msec
Temp protection detection delay time
tthp
Typ-25%
tthp
Typ+25% msec
Temp protection release delay time
tthr
Typ-25%
tthr
Typ+25% msec
Temp protection monitoring time
tthm
12.0
16.0
20.0
msec
Temp protection monitoring period
ttmon
2.01
2.68
3.35
msec
*5 This parameter is guaranteed by design.
*6 Since the timing when the cell voltage changes and the timing when the cell voltage is monitored deviates,
the delay time varies within the range of the spec.
Oct, 2020 Rev.0
Electrical characteristics
Unless otherwise specified, Topr=+25℃, VDD=24.5V, VCELLn=3.5V, RTH=10kΩ
Parameter
Symbol
SEL=VDD, CS=VLM=VCM=SOC=SDC=VSS, ROV=1MΩ
UNIT
Conditions
Min.
Typ.
Max.
Delay time
Power save delay time
tps
1.536
2.048
2.560
sec
Power save release delay time
tpsr
1.50
2.00
2.50
msec
V
Output pin
DCHG pin output voltage L
Vdchg_l Idchg=200uA
-
0.50
0.80
DCHG pin output voltage H
Vdchg_h Idchg=-200uA
12.0
14.5
17.5
V
DCHG pin output current L
Idchg_l COC=VDD,DCHG=-1V
0.65
1.10
1.55
uA
DCHG pin output current H
Idchg_h COC=VDD,DCHG=-1V
3.80
6.50
9.20
uA
DCHG pin leak current
Idchg_leak
DCHG pin detection voltage
Vdchg_d
OV pin output voltage H
COC=VDD,DCHG=-3V
-
0.1
uA
-1.40
-1.10
V
V
12.0
14.5
17.5
OV pin output current L
Iov_l
COC=VDD,OV=-1V
0.65
1.10
1.55
V
OV pin output current H
Iov_h COC=VDD,OV=-1V
3.80
6.50
9.20
uA
OV pin leak current
Vov_h Iov=-200uA
-1.70
Iov_leak COC=VDD,OV=-3V
OV pin detection voltage
Vov_d
PD pin output voltage L
Vpd_l
PD pin output voltage H
Vpd_h Ipd=-200uA
Ipd=200uA
-
-
0.1
uA
-1.70
-1.40
-1.10
V
-
0.50
0.80
V
12.0
14.5
17.5
V
Others
Cell voltage monitoring period
tvmon
-
71.75
-
msec
Cell voltage monitor detection delay time
tvd
-
32.00
-
msec
Cell voltage monitor release delay time
tvr
-
8.00
-
msec
SDC detection current L
Isdc_l
0.20
0.40
0.55
uA
SDC detection current H
Isdc_h
1.65
2.70
3.70
uA
SDC output voltage L
Vsdc_l
VDD-4.10
VDD-3.30
VDD-2.50
V
SDC output voltage H
Vsdc_h
VDD-0.80
VDD-0.60
VDD-0.40
V
tsdcd
1.50
2.00
2.50
msec
SDC detection delay time
SDC release delay time
tsdcr
3.00
4.00
5.00
msec
Vsdc_en
-
-
0.30
V
SOC detection current L
Isoc_L
0.20
0.40
0.55
uA
SOC detection current H
Isoc_h
1.65
2.70
3.70
uA
SOC output voltage L
Vsoc_l
VDD-4.10
VDD-3.30
VDD-2.50
V
SOC output voltage H
SDC enable voltage
Vsoc_h
VDD-0.80
VDD-0.60
VDD-0.40
V
SOC detection delay time
tsocd
1.50
2.00
2.50
msec
SOC release delay time
tsocr
3.00
4.00
5.00
msec
SOC enable voltage
Vsoc_en
-
-
0.30
V
SEL pin input voltage (4S mode)
Vsel_4s
-
-
0.50
V
SEL pin input voltage (5S mode)
Vsel_5s
0.50
-
V2+0.50
V
SEL pin input voltage (6S mode)
Vsel_6s
V2+0.50
-
VDD-0.50
V
SEL pin input voltage (7S mode)
Vsel_7s
VDD-0.50
-
-
V
SEL pin input current
-0.40
-0.20
-
uA
COC pin input voltage H
Voc_h
Isel
SEL=VSS
VDD-0.50
-
-
V
Recharge prohibited voltage
Vnorc
0.70
1.00
1.30
V
*7 This parameter stipulates each CELL voltage for which charging is prohibited when "0V charging is prohibited".
Oct, 2020 Rev.0
Typical application circuit
1) 13cells protection circuit (Current pathway : common)
CELL+
P+
MM3877(2)
RV DD2 100Ω
1
VDD
SDC
20
2
V7
SOC
19
3
V6
VCM
18
4
V5
OV
17
5
V4
VLM
16
6
V3
DCHG
15
7
V2
CS
14
SBD2
ZD2
(35V)
CV DD2
2.2uF
RV13 1kΩ
QOUT13
ROUT13
RV12 1kΩ R
100Ω
CV13
0.1uF
QOUT12
ROUT12
RV11 1kΩ R 100Ω
B12
CV12
0.1uF
V11
QOUT11
ROUT11
RV10 1kΩ R 100Ω
B11
CV11
0.1uF
V10
QOUT10
ROUT10
RV9 1kΩ R 100Ω
B10
CV10
0.1uF
V9
QOUT9
ROUT9
RV8 1kΩ R 100Ω
B9
CV9
0.1uF
V8
QOUT8
ROUT8
RB8 100Ω
CV8
0.1uF
V13
V12
B13
8
V1
TH
13
9
SEL
VSS
12
10
PD
COC
11
RGND1 1.0kΩ
NTC2 10kΩ
RPULL UP
10MΩ
MM3877(1)
RV DD1 100Ω
SBD1
RV7 1kΩ
V7
QOUT7
ROUT7
CV DD1
RV6 1kΩ RB7 100Ω 2.2uF
CV7
0.1uF
V6
QOUT6
ROUT6
RV5 1kΩ R 100Ω
B6
CV6
0.1uF
V5
QOUT5
ROUT5
RV4 1kΩ R 100Ω
B5
CV5
0.1uF
QOUT4
ROUT4
RV3 1kΩ R 100Ω
B4
CV4
0.1uF
QOUT3
ROUT3
RV2 1kΩ R 100Ω
B3
CV3
0.1uF
RV1 1kΩ R 100Ω
B2
CV2
0.1uF
RB1 100Ω
CV1
0.1uF
V4
V3
V2
QOUT2
ROUT2
V1
QOUT1
ROUT1
ZD1
(35V)
1
VDD
SDC
20
2
V7
SOC
19
3
V6
VCM
18
4
V5
OV 17
5
V4
VLM 16
6
V3
DCHG
15
7
V2
CS
14
8
V1
TH
13
9
SEL
VSS
12
10
PD
COC
11
RSD C1 1.0kΩ
D1
RSOC 1 1.0kΩ
RV MC 10MΩ
RV ML 10MΩ
D2
Qd1
RC S1 1kΩ
Qd2
NTC1 10kΩ
RD
10MΩ
CC OC
0.01uF
Q1
RSE NSE
5mΩ
CELLQPD
RDG1
100Ω
RDG2
100Ω
ROV1
3MΩ
Q3
P-
Q2
RPULL DO WN
100kΩ
These circuits are typical examples provided for reference purposes, so in actual applications, the circuit constants,
conditions and operations should be thoroughly studied. Mitsumi Electric Co., Ltd. Assumes no responsibility for
any trouble or damage as a result of the use of these circuits.
Oct, 2020 Rev.0
Typical application circuit
2) Explanation of external parts : 13cells protection circuit
Parts name
RVDD1,RVDD2,RV1-RV13
CVDD1,CVDD2,CV1-CV13
ZD1,ZD2
Roles of parts
CR low-pass filter to stabilize a supply ripple of VDD pin, V1 to V7 pins.
This resistor is used to drive an external pnp transistor during cell balance control.
Zener diode to prevent destruction of IC by surge voltage and motor back electromotive voltage.
SBD1,SBD2
RB1-RB13
This is a Schottky barrier diode to prevent the V4 pin voltage from exceeding VDD.
ROUT1-ROUT13
This resistor is the discharge resistor curing cell balance control.
QOUT1-QOUT13
PNP transistor for cell balance control.
This resistor is the base resistor of the pnp transistor for cell balance control.
RCS1,RVCM,RVLM,RSOC,RSDC,RGND1 Resistor to protect terminal.
QPD
RPULLDOWN
RSENSE
CCOC
NTC1,NTC2
QDG1,QDG2,RD,D1
ROV1
RDG1,RDG2
D2
Nch MOS FET that controls the pull-down resistor when monitoring the load connection.
This is pull-down resistor for monitoring the load connection.
Sense resistor to monitor charging/discharging current.
Capacitor to sets discharging overcurrent detection delay time.
NTC thermistor to monitor to temperature.
Parts for driving the discharge control FET.
Pull-down resistor to turn off the charge control FET.
Resistors for preventing the gate destruction due to parasitic oscillation.
This diode prevents current from flowing back to the OV pin.
Q1,Q2
Nch MOS FET to control discharging current.
Q3,Q4
RPULLUP
Nch MOS FET to control charging current.
This is pull-up resistor for monitoring the charger connection.
3) Instructions and directions for use
・ When the current pathway of charge and the discharge is separated, wiring is separated from the drain of
charge and discharge control FET.
・ If temperature protection function is repealed, make TH pin and VDD pin connection.
・ IC, QOUT1-13, and ROUT1-13 may generate heat during cell balance operation.
It is recommended to layout the VIA for heat radiation is the GND pattern of reverse (of IC) when there is the GND
pattern in the inner layer (in using multiplayer substrate).
By increasing these copper foil pattern area of PCB, power dissipation improves.
・ RVCM and RVLM each have high impedance, so place them close to the VCM and VLM pins.
・ Lay the wiring between OV and SOC, between DCHG and SDC so that parasitic capacitance is as small as possible
with other wiring.
・ The temperature detection accuracy is the specification when using a thermistor with the following characteristics.
In order to satisfy the characteristic of specification, it recommends using the following parts.
Symbol
Name
Function
Part name
Remarks
NTC1
NTC2
NTC
Thermistor
10KΩ±1%
B(25/50)=3950±1%
-
-
〇NTC resistance
・Ra = R0 * exp ( B * ( 1 / Ta - 1 / T0 ) )
Ra : NTC resistance value at ambient temperature Ta(K).
R0 : NTC resistance value at ambient temperature T0(K).
B : B constant of thermistor
Oct, 2020 Rev.0
Typical application circuit
4) 7cells protection circuit
CELL+
P+
MM3877(1)
RV DD1 100Ω
SBD
RV7 1kΩ
V7
QOUT7
ROUT7
CV D D
RV6 1kΩ R 100Ω 2.2uF
B7
CV7
0.1uF
V6
QOU T6
ROUT6
RV5 1kΩ R 100Ω
B6
CV6
0.1uF
V5
QOU T5
ROUT5
RV4 1kΩ R 100Ω
B5
CV5
0.1uF
V4
QOU T4
ROUT4
RV3 1kΩ R 100Ω
B4
CV4
0.1uF
V3
QOU T3
ROUT3
RV2 1kΩ R 100Ω
B3
CV3
0.1uF
V2
QOU T2
ROUT2
RV1 1kΩ R 100Ω
B2
CV2
0.1uF
RB1 100Ω
CV1
0.1uF
V1
QOU T1
ROUT1
ZD1
(35V)
1
VDD
SDC
2
V7
SOC 19
20
3
V6
VCM 18
4
V5
OV 17
5
V4
VLM 16
6
V3
DCHG 15
D1
RV MC 10MΩ
RPULL UP
10MΩ
RSX C 1.0kΩ
D2
RV ML 10MΩ
Qd1
RC S1 1kΩ
7
V2
CS
8
V1
TH 13
9
SEL
VSS 12
10
PD
COC 11
14
Qd2
NTC1 10kΩ
RDG1
100Ω
RD
10MΩ
CC OC
0.01uF
RSE NSE
5mΩ
CELL-
RDG2
100Ω
ROV1
3MΩ
Q1
Q3
Q2
Q4
P-
RPULL DO WN
100kΩ
QPD
5) 7cells protection circuit (Temp protection disable)
CELL+
P+
MM3877(1)
RV DD1 100Ω
SBD
RV7 1kΩ
V7
QOUT7
ROUT7
CV D D
RV6 1kΩ R 100Ω 2.2uF
B7
CV7
0.1uF
V6
QOU T6
ROUT6
RV5 1kΩ R 100Ω
B6
CV6
0.1uF
V5
QOU T5
ROUT5
RV4 1kΩ R 100Ω
B5
CV5
0.1uF
V4
QOU T4
ROUT4
RV3 1kΩ R 100Ω
B4
CV4
0.1uF
QOU T3
ROUT3
RV2 1kΩ R 100Ω
B3
CV3
0.1uF
V2
QOU T2
ROUT2
RV1 1kΩ R 100Ω
B2
CV2
0.1uF
V1
QOU T1
ROUT1
RB1 100Ω
CV1
0.1uF
V3
ZD1
(35V)
1
VDD
SDC
2
V7
SOC 19
3
V6
VCM 18
4
V5
OV 17
20
5
V4
VLM 16
6
V3
DCHG 15
7
V2
CS
8
V1
TH 13
9
SEL
VSS 12
10
PD
COC 11
D1
RV MC 10MΩ
RPULL UP
10MΩ
RSX C 1.0kΩ
D2
RV ML 10MΩ
Qd1
RC S1 1kΩ
14
Qd2
RD
10MΩ
CC OC
0.01uF
RSE NSE
5mΩ
CELLQPD
RDG1
100Ω
RDG2
100Ω
ROV1
3MΩ
Q1
Q3
Q2
Q4
P-
RPULL DO WN
100kΩ
These circuits are typical examples provided for reference purposes, so in actual applications, the circuit constants,
conditions and operations should be thoroughly studied. Mitsumi Electric Co., Ltd. Assumes no responsibility for
any trouble or damage as a result of the use of these circuits.
Oct, 2020 Rev.0
Typical application circuit
6) 6cells protection circuit
CELL+
P+
MM3877(1)
RV DD1 100Ω
SBD
CV D D
2.2uF
RV6 1kΩ
V6
QOU T6
ROUT6
RV5 1kΩ R 100Ω
B6
CV6
0.1uF
V5
QOU T5
ROUT5
RV4 1kΩ R 100Ω
B5
CV5
0.1uF
V4
QOU T4
ROUT4
RV3 1kΩ R 100Ω
B4
CV4
0.1uF
V3
QOU T3
ROUT3
RV2 1kΩ R 100Ω
B3
CV3
0.1uF
V2
QOU T2
ROUT2
RV1 1kΩ R 100Ω
B2
CV2
0.1uF
RB1 100Ω
CV1
0.1uF
V1
QOU T1
ROUT1
ZD1
(35V)
1
VDD
SDC
2
V7
SOC 19
3
V6
VCM 18
4
V5
OV 17
20
5
V4
VLM 16
6
V3
DCHG 15
D1
RV MC 10MΩ
RPULL UP
10MΩ
RSX C 1.0kΩ
D2
RV ML 10MΩ
Qd1
RC S1 1kΩ
7
V2
CS
8
V1
TH 13
9
SEL
VSS 12
10
PD
COC 11
14
Qd2
NTC1 10kΩ
RDG1
100Ω
RD
10MΩ
CC OC
0.01uF
RSE NSE
5mΩ
CELL-
RDG2
100Ω
ROV1
3MΩ
Q1
Q3
Q2
Q4
P-
RPULL DO WN
100kΩ
QPD
7) 5cells protection circuit
CELL+
P+
MM3877(1)
RV DD1 100Ω
SBD
ZD1
(35V)
CV DD
2.2uF
RV5 1kΩ
V5
QOUT5
ROUT5
RV4 1kΩ R 100Ω
B5
CV5
0.1uF
V4
QOUT4
ROUT4
RV3 1kΩ R 100Ω
B4
CV4
0.1uF
V3
QOUT3
ROUT3
RV2 1kΩ R 100Ω
B3
CV3
0.1uF
V2
QOUT2
ROUT2
RV1 1kΩ R 100Ω
B2
CV2
0.1uF
RB1 100Ω
CV1
0.1uF
V1
QOUT1
ROUT1
1
VDD
SDC
2
V7
SOC 19
3
V6
VCM 18
4
V5
OV 17
20
5
V4
VLM 16
6
V3
DCHG 15
D1
RV MC 10MΩ
RPULL UP
10MΩ
RSX C 1.0kΩ
D2
RV ML 10MΩ
Qd1
RC S1 1kΩ
7
V2
CS
8
V1
TH 13
9
SEL
VSS 12
10
PD
COC 11
14
Qd2
NTC1 10kΩ
RD
10MΩ
CC OC
0.01uF
RSE NSE
5mΩ
CELLQPD
RDG1
100Ω
RDG2
100Ω
ROV1
3MΩ
Q1
Q3
Q2
Q4
P-
RPULL DO WN
100kΩ
These circuits are typical examples provided for reference purposes, so in actual applications, the circuit constants,
conditions and operations should be thoroughly studied. Mitsumi Electric Co., Ltd. Assumes no responsibility for
any trouble or damage as a result of the use of these circuits.
Oct, 2020 Rev.0
Typical application circuit
8) 4cells protection circuit
CELL+
P+
MM3877(1)
RV DD1 100Ω
SBD
ZD1
(35V)
CV D D
2.2uF
1
VDD
SDC
2
V7
SOC 19
3
V6
VCM 18
4
V5
OV 17
RV4 1kΩ
V4
V3
V2
V1
QOUT4
ROUT4
RV3 1kΩ R 100Ω
B4
CV4
0.1uF
QOUT3
ROUT3
RV2 1kΩ R 100Ω
B3
CV3
0.1uF
QOUT2
ROUT2
RV1 1kΩ R 100Ω
B2
CV2
0.1uF
RB1 100Ω
CV1
0.1uF
QOUT1
ROUT1
RSE L 1kΩ
20
5
V4
VLM 16
6
V3
DCHG 15
7
V2
CS
8
V1
TH 13
9
SEL
VSS 12
10
PD
COC
D1
RV MC 10MΩ
RPULL UP
10MΩ
RSX C 1.0kΩ
D2
RV ML 10MΩ
Qd1
RC S1 1kΩ
14
Qd2
NTC1 10kΩ
RD
10MΩ
RDG1
100Ω
RD G2
100Ω
ROV1
3MΩ
11
CC OC
0.01uF
RSE NSE
5mΩ
CELL-
Q1
Q3
Q2
Q4
P-
RPULL DO WN
100kΩ
QPD
These circuits are typical examples provided for reference purposes, so in actual applications, the circuit constants,
conditions and operations should be thoroughly studied. Mitsumi Electric Co., Ltd. Assumes no responsibility for
any trouble or damage as a result of the use of these circuits.
Delay time characteristic
Discharging overcurrent detection delay time 1,2 are set by capacity connected to COC-VSS pins. The figure below shows
typical characteristics of MM3877C02WBE. Since it is not a compensation value, please refer to it as reference data.
Discharging overcurrent detection delay time 2
1.E+05
1.E+04
1.E+04
1.E+03
delay time [ms]
delay time [ms]
Discharging overcurrent detection delay time 1
1.E+03
1.E+02
1.E+01
1.E+00
0.0001
1.E+02
1.E+01
1.E+00
0.001
0.01
0.1
1
capacity value of COC [uF]
delay time[msec] = tdocp1 / 10^-8 * COC
1.E-01
0.0001
0.001
0.01
0.1
1
capacity value of COC [uF]
delay time[msec] = tdocp2 / 10^-8 * COC
Oct, 2020 Rev.0
Product name (MM3877***VBH)
Overcharge detection delay
time
Overdischarge detection
delay time
Cell balance detection
delay time
Discharging overcurrent
detection delay time 1
(at COC = 0.01uF)
Discharging overcurrent
detection delay time 2
(at COC = 0.01uF)
Discharging overcurrent
release delay time
Short detection delay time
Changing overcurrent
detection delay time
Charging overcurrent
release delay time
Temp protection detection
delay time
Temp protection release
delay time
Product name (MM3877***WBE)
High temp protection
detection
temperature for
High temp protection
release temperature
for discharging
High temp protection
detection
temperature for
High temp protection
release temperature
for charging
Low temp protection
detection
temperature for
Low temp protection
release temperature
for charging
Low temp protection
detection
temperature for
Low temp protection
release temperature
for discharging
Temp protection
monitoring time
Temp protection
monitoring period
Overdischarge detection
voltage
Overdischarge release
voltage
Cell balance detection
voltage
Cell balance hysteresis
voltage
Vovp
V
Vovr
V
Vuvp
V
Vuvr
V
Vcbd
V
Vcbr
V
4.250
4.100
2.750
3.000
4.200
0.010
0.100
0.200
Charging overcurrent
detection voltage
Vdocp1 Vdocp2
V
V
Short detection voltage
Discharging overcurrent
detection voltage 2
Discharging overcurrent
detection voltage 1
Overcharge release
voltage
C05
Overcharge detection
voltage
Product name (MM3877***WBE)
Lineup
Detection voltage / Release voltage
Vscp
V
Vcocp
V
0.350
-0.030
Tthp1
℃
Tthr1
℃
Tthp2
℃
Tthr2
℃
Tthp3
℃
Tthr3
℃
Tthp4
℃
Tthr4
℃
tthm
msec
ttmon
sec
C05
75
65
50
40
0
10
16.0
2.68
Temperature protection detection / release temperature
tovp
sec
tuvp
sec
tcbd
sec
tdocp1
msec
tdocp2
msec
tdocr
msec
tscp
usec
tcocp
msec
tcocr
msec
tthp
sec
tthr
msec
C05
1.024
1.024
0.256
100
10
1024
350
1024
128
2.048
100
Detection delay time / Release delay time
Oct, 2020 Rev.0
Lineup
Latch
Load remove Charger remove
0V battery charge function
Enable
Temp protection release function
Overdischarge release function *9
Latch
Charging overcurrent release function
Overdischarge hysteresis cancel
function
Enable
Discharging overcurrent release
function
Overcharge release function *8
C05
Cell balance function
Product name (MM3877***VBH)
Option function
Temp
Prohibition
*8 In the “Latch” type, IC release overcharge state by remove charger and by all cell voltages are less than or equal to
the overcharge release voltage.
*9 In the “Latch” type, IC release overdischarge state by remove load and by all cell voltages are more than or equal to
the overdischarge release voltage.
Oct, 2020 Rev.0
