IS31FL3209-QFLS4-TR

IS31FL3209 18 CHANNELS LED DRIVER; 1/24 DC SCALING WHITE BALANCE December 2017 GENERAL DESCRIPTION FEATURES IS31FL3209 is comprised of 18 constant current channels each with independent PWM control, designed for driving LEDs, PWM frequency can be 23kHz (default) or 3.45kHz. The output current of each channel can be set at up to 76mA (Max.) by an external resistor and independently scaled by a factor of 1, 23/24, 22/24, 21/22, 20/24, 19/24, 18/24, 16/24, 14/24, 12/24, 11/24, 9/24 and 7/24.The average LED current of each channel can be changed in 256 steps by changing the PWM duty cycle through an I2C interface.         The chip can be turned off by pulling the SDB pin low or by using the software shutdown feature to reduce power consumption.  IS31FL3209 is available in QFN-28 (4mm × 4mm) package. It operates from 2.7V to 5.5V over the temperature range of -40°C to +125°C.   2.7V to 5.5V supply Each channel output current up to 76mA I2C interface, automatic address increment function Four selectable I2C addresses Internal reset register Modulate LED brightness with 256 steps PWM Each channel can be controlled independently Each channel can be scaled independently by 1, 23/24, 22/24, 21/22, 20/24, 19/24, 18/24, 16/24, 14/24, 12/24, 11/24, 9/24 and 7/24 PWM frequency selectable - 23kHz (default) - 3.45kHz -40°C to +125°C temperature range QFN-28 (4mm × 4mm) package APPLICATIONS   Mobile phones and other hand-held devices for LED display LED in home appliances TYPICAL APPLICATION CIRCUIT Figure 1 Typical Application Circuit Note 1: The maximum output current is set to 76mA when REXT= 2kΩ. Please refer Page 10 for setting LED current. Note 2: A 0.1µF capacitor is necessary for passing the EFT test. Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 1 IS31FL3209 PIN CONFIGURATION Package Pin Configuration (Top View) QFN-28 PIN DESCRIPTION No. Pin Description 1 SDB Shutdown the chip when pulled low. 2 AD I2C address setting. 3 VCC Power supply. 4,11, 18,25 GND Ground. 5 R_EXT Input terminal used to connect an external resistor. This regulates the global output current. 6 SDA I2C serial data. 7 SCL I2C serial clock. 8~10 OUT1~OUT3 Output channel 1~3 for LEDs. 12~17 OUT4 ~ OUT9 Output channel 4~9 for LEDs. 19~24 OUT10 ~ OUT15 Output channel 10~15 for LEDs. 26~28 OUT16 ~ OUT18 Output channel 16~18 for LEDs. Thermal Pad Connect to GND. Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 2 IS31FL3209 ORDERING INFORMATION Industrial Range: -40°C to +125°C Order Part No. Package QTY/Reel IS31FL3209-QFLS4-TR QFN-28, Lead-free 2500 Copyright  ©  2017  Lumissil  Microsystems.  All  rights  reserved.  Lumissil Microsystems reserves  the  right  to  make  changes  to  this  specification  and  its  products  at  any  time  without  notice.  Lumissil  Microsystems  assumes  no  liability  arising  out  of  the  application  or  use  of  any  information,  products  or  services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and  before placing orders for products.  Lumissil Microsystems does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can  reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in  such applications unless Lumissil Microsystems receives written assurance to its satisfaction, that:  a.) the risk of injury or damage has been minimized;  b.) the user assume all such risks; and  c.) potential liability of Lumissil Microsystems is adequately protected under the circumstances Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 3 IS31FL3209 ABSOLUTE MAXIMUM RATINGS Supply voltage, VCC Voltage at SCL, SDA, SDB, OUT1 to OUT18 Maximum junction temperature, TJMAX Storage temperature range, TSTG Operating temperature range, TA=TJ Package thermal resistance, junction to ambient (4 layer standard test PCB based on JEDEC standard), θJA ESD (HBM) ESD (CDM) -0.3V ~ +6.0V -0.3V ~ VCC+0.3V +150°C -65°C ~ +150°C -40°C ~ +125°C 51.4°C/W ±8kV ±1kV Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Typical values are TA= 25°C, VCC= 3.6V. Symbol Parameter Condition Min. Typ. Unit 5.5 V VCC Supply voltage IMAX Maximum global output current VCC= 4.2V, VOUT= 0.8V REXT= 2kΩ, SL= “110000” (Note 1) 76 mA IOUT Output current VOUT= 0.6V REXT= 3.3kΩ, SL= “111111” 28 mA VHR Headroom voltage REXT= 3.3kΩ, IOUT= 40mA 0.4 ICC Quiescent power supply current REXT= 3.3kΩ ISD Shutdown current fOUT PWM frequency of output IOZ Output leakage current VSDB= 0V or software shutdown, VOUT= 5.5V Thermal shutdown (Note 2) 160 °C (Note 2) 20 °C 1.3 V TSHDN TSHDNHYST Hysteresis VEXT 2.7 Max. 0.6 9 V mA VSDB= 0V or software shutdown TA= 25°C, VCC= 3.6V 3 0x27= 0x00 23 kHz 0x27= 0x01 3.45 kHz 5 0.2 Output voltage of R-EXT pin μA μA Logic Electrical Characteristics (SDA, SCL, SDB) VIL Logic “0” input voltage VCC= 2.7V VIH Logic “1” input voltage VCC= 5.5V IIL Logic “0” input current VINPUT= 0V (Note 2) 5 nA IIH Logic “1” input current VINPUT= VCC (Note 2) 5 nA Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 0.4 1.4 V V 4 IS31FL3209 DIGITAL INPUT SWITCHING CHARACTERISTICS (NOTE 2) Symbol Parameter Condition Min. Typ. Max. Unit 400 kHz fSCL Serial-Clock frequency tBUF Bus free time between a STOP and a START condition 1.3 μs tHD, STA Hold time (repeated) START condition 0.6 μs tSU, STA Repeated START condition setup time 0.6 μs tSU, STO STOP condition setup time 0.6 μs tHD, DAT Data hold time tSU, DAT Data setup time 100 ns tLOW SCL clock low period 1.3 μs tHIGH SCL clock high period 0.7 μs 0.9 μs tR Rise time of both SDA and SCL signals, receiving (Note 3) 20+0.1Cb 300 ns tF Fall time of both SDA and SCL signals, receiving (Note 3) 20+0.1Cb 300 ns Note 1: The recommended minimum value of REXT is 2kΩ, or it may cause a large current. Note 2: Guaranteed by design. Note 3: Cb= total capacitance of one bus line in pF. ISINK ≤ 6mA. tR and tF measured between 0.3×VCC and 0.7×VCC. Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 5 IS31FL3209 DETAILED DESCRIPTION The 8-bit chip address is sent next, most significant bit first. Each address bit must be stable while the SCL level is high. I2C INTERFACE The IS31FL3209 uses a serial bus, which conforms to the I2C protocol, to control the chip’s functions with two wires: SCL and SDA. The IS31FL3209 has a 7-bit slave address (A7:A1), followed by the R/W bit, A0. Since IS31FL3209 only supports write operations, A0 must always be “0”. The value of bits A1 and A2 are decided by the connection of the AD pin. After the last bit of the chip address is sent, the master checks for the IS31FL3209’s acknowledge. The master releases the SDA line high (through a pull-up resistor). Then the master sends an SCL pulse. If the IS31FL3209 has received the address correctly, then it holds the SDA line low during the SCL pulse. If the SDA line is not low, then the master should send a “STOP” signal (discussed later) and abort the transfer. The complete slave address is: Table 1 Slave Address (Write Only): Bit A7:A3 A2:A1 A0 Value 11011 AD 0 Following acknowledge of IS31FL3209, the register address byte is sent, most significant bit first. IS31FL3209 must generate another acknowledge indicating that the register address has been received. AD connected to GND, AD = 00; AD connected to VCC, AD = 11; AD connected to SCL, AD = 01; AD connected to SDA, AD = 10; Then 8-bit of data byte are sent next, most significant bit first. Each data bit should be valid while the SCL level is stable high. After the data byte is sent, the IS31FL3209 must generate another acknowledge to indicate that the data was received. The SCL line is uni-directional. The SDA line is bi-directional (open-collector) with a pull-up resistor (typically 4.7kΩ). The maximum clock frequency specified by the I2C standard is 400kHz. In this discussion, the master is the microcontroller and the slave is the IS31FL3209. The “STOP” signal ends the transfer. To signal “STOP”, the SDA signal goes high while the SCL signal is high. ADDRESS AUTO INCREMENT The timing diagram for the I2C is shown in Figure 2. The SDA is latched in on the stable high level of the SCL. When there is no interface activity, the SDA line should be held high. The “START” signal is generated by lowering the SDA signal while the SCL signal is high. The start signal will alert all devices attached to the I2C bus to check the incoming address against their own chip address. Figure 2 Interface Timing Figure 3 Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 To write multiple bytes of data into IS31FL3209, load the address of the data register that the first data byte is intended for. During the IS31FL3209 acknowledge of receiving the data byte, the internal address pointer will increment by one. The next data byte sent to IS31FL3209 will be placed in the new address, and so on. The auto increment of the address will continue as long as data continues to be written to IS31FL3209 (Figure 5). Bit Transfer 6 IS31FL3209 Figure 4 Figure 5 Writing to IS31FL3209 (Typical) Writing to IS31FL3209 (Automatic Address Increment) REGISTERS DEFINITIONS Table 2 Register Function Address 00h Name Function Table Shutdown Register Set software shutdown mode 3 PWM Register 18 channels PWM duty cycle data register 4 Update Register Load PWM Register and LED Control Register’s data - LED Control Register Channel 1 to 18 enable bit and current setting 5 26h Global Control Register Set all channels enable 6 27h Output Frequency Setting Register Set all channels operating frequency 7 2Fh Reset Register Reset all registers into default value - 01h~12h 13h 14h~25h Bit D7:D1 D0 Bit D7:D0 Name - SSD Name PWM Default 0000 000 0 Default 0000 0000 The Shutdown Register sets software shutdown mode of IS31FL3209. Software Shutdown Enable Software shutdown mode Normal operation 0000 0000 0000 0000 0000 0000 0000 0000 Table 4 01h~12h PWM Register (OUT1~OUT18) Table 3 00h Shutdown Register SSD 0 1 Default The PWM Registers adjusts LED luminous intensity in 256 steps. The value of a channel’s PWM Register decides the average output current for each output, OUT1~OUT18. The average output current may be computed using the Formula (1): I OUT  I MAX 7   D[n]  2 n 256 n0 (1) Where “n” indicates the bit location in the respective PWM register. Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 7 IS31FL3209 For example: D7:D0 = 10110101, IOUT = IMAX (20+22+24+25+27)/256 The IOUT of each channel is setting by the SL bit of LED Control Register (14h~25h). Please refer to the detail information in Page 11. 13h Update Register The data sent to the PWM Registers and the LED Control Registers will be stored in temporary registers. A write operation of “0000 0000” value to the Update Register is required to update the registers (01h~12h, 14h~25h). Table 5 14h~25h LED Control Register (OUT1~OUT18) Table 6 26h Global Control Register Bit D7:D1 D0 Name - G_EN Default 0000 000 0 The Global Control Register set all channels enable. G_EN 0 1 Global LED Enable Normal operation Shutdown all LEDs Table 7 27h Output Frequency Setting Register Bit D7:D1 D0 Bit D7:D6 D5:D0 Name - OFS Name - SL Default 0000 000 0 Default 00 00 0000 The LED Control Registers store the on or off state of each LED and set the output current. SL 110000 110001 110101 110010 110110 110011 111010 111011 111111 010000 010001 010010 010011 00xxxx Output Current Setting (IOUT) 0x30 IMAX 0x31 23/24 IMAX 0x35 22/24 IMAX 0x32 21/24 IMAX 0x36 20/24 IMAX 0x33 19/24 IMAX 0x3a 18/24 IMAX 0x3e 16/24 IMAX 0x3f 14/24 IMAX 0x10 12/24 IMAX 0x11 11/24 IMAX 0x12 9/24 IMAX 0x13 7/24 IMAX 0x00 0/24 IMAX Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 The Output Frequency Setting Register selects a fixed PWM operating frequency for all output channels. OFS 0 1 Output Frequency Setting 23kHz 3.45kHz 2Fh Reset Register Once user writes “0000 0000” data to the Reset Register, IS31FL3209 will reset all registers to default value. On initial power-up, the IS31FL3209 registers are reset to their default values for a blank display. 8 IS31FL3209 FUNCTIONAL BLOCK DIAGRAM Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 9 IS31FL3209 TYPICAL APPLICATION INFORMATION PWM CONTROL Table 8 32 Gamma Steps With 256 PWM Steps The PWM Registers (01h~12h) can modulate LED brightness of 18 channels with 256 steps. For example, if the data in PWM Register is “0000 0100”, then the PWM is the fourth step. C(0) C(1) C(2) C(3) C(4) C(5) C(6) C(7) 0 1 2 4 6 10 13 18 C(8) C(9) C(10) C(11) C(12) C(13) C(14) C(15) 22 28 33 39 46 53 61 69 Writing new data continuously to the registers can modulate the brightness of the LEDs to achieve a breathing effect. C(16) C(17) C(18) C(19) C(20) C(21) C(22) C(23) 78 86 96 106 116 126 138 149 C(24) C(25) C(26) C(27) C(28) C(29) C(30) C(31) 173 186 199 212 226 240 255 REXT 161 The maximum output current of OUT1~OUT18 can be adjusted by the external resistor, REXT, as described in Formula (2). 224 192 (2) PWM Data I MAX V  x  EXT REXT 256 x= 117, VOUT= 0.8V, VEXT= 1.3V. 64 CURRENT SETTING 32 The current of each LED can be set independently by the SL bit of LED Control Register (14h~25h). The maximum global current is set by the external register REXT. For example, set REXT = 3.3kΩ then IMAX= 46mA. GAMMA CORRECTION In order to perform a better visual LED breathing effect we recommend using a gamma corrected PWM value to set the LED intensity. This results in a reduced number of steps for the LED intensity setting, but causes the change in intensity to appear more linear to the human eye. Gamma correction, also known as gamma compression or encoding, is used to encode linear luminance to match the non-linear characteristics of display. Since the IS31FL3209 can modulate the brightness of the LEDs with 256 steps, a gamma correction function can be applied when computing each subsequent LED intensity setting such that the changes in brightness matches the human eye's brightness curve. Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 128 96 The recommended minimum value of REXT is 2kΩ. When channels drive different quantity of LEDs, adjust maximum output current according to quantity of LEDs to ensure average current of each LED is the same. 160 0 0 4 8 12 16 20 24 28 32 Intensity Steps Figure 6 Gamma Correction (32 Steps) Choosing more gamma steps provides for a more continuous looking breathing effect. This is useful for very long breathing cycles. The recommended configuration is defined by the breath cycle T. When T=1s, choose 32 gamma steps, when T=2s, choose 64 gamma steps. The user must decide the final number of gamma steps not only by the LED itself, but also based on the visual performance of the finished product. Table 9 64 Gamma Steps With 256 PWM Steps C(0) C(1) C(2) C(3) C(4) C(5) C(6) C(7) 0 1 2 3 4 5 6 7 C(8) C(9) C(10) C(11) C(12) C(13) C(14) C(15) 8 10 12 14 16 18 20 22 C(16) C(17) C(18) C(19) C(20) C(21) C(22) C(23) 24 26 29 32 35 38 41 44 C(24) C(25) C(26) C(27) C(28) C(29) C(30) C(31) 47 50 53 57 61 65 69 73 C(32) C(33) C(34) C(35) C(36) C(37) C(38) C(39) 77 81 85 89 94 99 104 109 C(40) C(41) C(42) C(43) C(44) C(45) C(46) C(47) 114 119 124 129 134 140 146 152 C(48) C(49) C(50) C(51) C(52) C(53) C(54) C(55) 158 164 170 176 182 188 195 202 C(56) C(57) C(58) C(59) C(60) C(61) C(62) C(63) 209 216 223 230 237 244 251 255 10 IS31FL3209 256 PWM FREQUENCY SELECT 224 The IS31FL3209 output channels operate with a default PWM frequency of 23kHz. Because all the OUTx channels are synchronized, the DC supply will experience large instantaneous current surges when the OUTx channels turn ON. These current surges will generate an AC ripple on the power supply which cause stress to the decoupling capacitors. 160 128 96 64 32 0 0 8 16 24 32 40 48 56 64 Intensity Steps Figure 7 Gamma Correction (64 Steps) Note, the data of 32 gamma steps is the standard value and the data of 64 gamma steps is the recommended value. SHUTDOWN MODE Shutdown mode can be used as a means of reducing power consumption. During shutdown mode all registers retain their data. Software Shutdown By setting SSD bit of the Shutdown Register (00h) to “0”, the IS31FL3209 will operate in software shutdown mode. When the IS31FL3209 is in software shutdown mode, all current sources are switched off. Hardware Shutdown The chip enters hardware shutdown mode when the SDB pin is pulled low. When the AC ripple is applied to a monolithic ceramic capacitor chip (MLCC) it will expand and contract causing the PCB to flex and generate audible hum in the range of between 20Hz to 20kHz, To avoid this hum, there are many countermeasures, such as selecting the capacitor type and value which will not cause the PCB to flex and contract. An additional option for avoiding audible hum is to set the IS31FL3209’s output PWM frequency above the audible range. The Output Frequency Setting Register 27h bit D0 can be used to set the switching frequency to 23kHz (Default), which is beyond the audible range. Figure 8 below shows the variation of output PWM frequency across supply voltage and temperature. 30 Output PWM Frequency (kHz) PWM Data 192 125°C 27 85°C 24 25°C 21 -40°C 18 15 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 8 Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 VCC vs. OUTPUT PWM Frequency 11 IS31FL3209 CLASSIFICATION REFLOW PROFILES Profile Feature Pb-Free Assembly Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) Time at liquidous (tL) 217°C 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature 8 minutes max. Figure 9 Classification Profile Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 12 IS31FL3209 PACKAGE INFORMATION QFN-28 Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 13 IS31FL3209 RECOMMENDED LAND PATTERN QFN-28 Note: 1. Land pattern complies to IPC-7351. 2. All dimensions in MM. 3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since land pattern design depends on many factors unknown (eg. user’s board manufacturing specs), user must determine suitability for use. Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 14 IS31FL3209 REVISION HISTORY Revision Detail Information Date 0A Initial release 2017.09.28 A Release to final version Add ESD value 2017.11.24 Lumissil Microsystems – www.lumissil.com Rev. A, 11/24/2017 15