M451RG6AE

M451 ARM Cortex® -M4 32-bit Microcontroller NuMicro® Family M451 Series Datasheet Nuvoton is providing this document only for reference purposes of NuMicro microcontroller based system design. Nuvoton assumes no responsibility for errors or omissions. All data and specifications are subject to change without notice. For additional information or questions, please contact: Nuvoton Technology Corporation. www.nuvoton.com May. 7, 2018 Page 1 of 242 Rev.2.08 M451 SERIES DATASHEET The information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton. M451 TABLE OF CONTENTS 1 GENERAL DESCRIPTION ------------------------------------------------ 10 2 FEATURES -------------------------------------------------------------- 12 NuMicro® M451 Features .................................................................. 12 2.1 3 Abbreviations ------------------------------------------------------------- 18 4 PARTS INFORMATION LIST AND PIN CONFIGURATION ---------------- 20 4.1 NuMicro® M451 Selection Guide ......................................................... 20 4.1.1 NuMicro M451 Naming Rule ----------------------------------------------------- 20 4.1.2 NuMicro M451 Base Series Selection Guide -------------------------------------- 21 4.1.3 NuMicro M451M Series (M051 Pin Compatible) Selection Guide ------------------- 22 4.1.4 NuMicro M452 USB Series Selection Guide --------------------------------------- 23 4.1.5 NuMicro M453 CAN Series (CAN+USB) Selection Guide -------------------------- 24 4.2 ® ® ® ® ® Pin Configuration............................................................................ 25 M451 SERIES DATASHEET 4.2.1 NuMicro M451 Base Series LQFP48 Pin Diagram --------------------------------- 25 4.2.2 NuMicro M451 Base Series LQFP64 Pin Diagram --------------------------------- 26 4.2.3 NuMicro M451 Base Series LQFP100 Pin Diagram -------------------------------- 27 4.2.4 NuMicro M451M Series (M051 Pin Compatible) LQFP48 Pin Diagram-------------- 28 4.2.5 NuMicro M451M Series (M058S Pin Compatible) LQFP64 Pin Diagram ------------ 29 4.2.6 NuMicro M452 USB Series LQFP48 Pin Diagram --------------------------------- 30 4.2.7 NuMicro M452 USB Series LQFP64 Pin Diagram --------------------------------- 32 4.2.8 NuMicro M452 USB Series LQFP100 Pin Diagram -------------------------------- 34 4.2.9 NuMicro M453 CAN Series (CAN+USB) LQFP48 Pin Diagram --------------------- 35 ® ® ® ® ® ® ® ® ® 4.2.10 NuMicro M453 CAN Series (CAN+USB) LQFP64 Pin Diagram ------------------ 37 4.2.11 NuMicro M453 CAN Series (CAN+USB) LQFP100 Pin Diagram ----------------- 39 4.3 ® ® Pin Description .............................................................................. 41 4.3.1 M451 Base Series LQFP48 Pin Description ---------------------------------------- 41 4.3.2 M451 Base Series LQFP64 Pin Description ---------------------------------------- 49 4.3.3 M451 Base Series LQFP100 Pin Description --------------------------------------- 59 4.3.4 M451M Series (M051 Pin Compatible) LQFP48 Pin Description --------------------- 72 4.3.5 M451M Series (M058S Pin Compatible) LQFP64 Pin Description ------------------- 80 4.3.6 M452 USB Series LQFP48 Pin Description ---------------------------------------- 89 4.3.7 M452 USB Series LQFP64 Pin Description ---------------------------------------- 96 4.3.8 M452 USB Series LQFP100 Pin Description -------------------------------------- 105 4.3.9 M453 CAN Series(CAN+USB) LQFP48 Pin Description --------------------------- 118 4.3.10 M453 CAN Series(CAN+USB) LQFP64 Pin Description ------------------------- 126 May. 7, 2018 Page 2 of 242 Rev.2.08 M451 4.3.11 M453 CAN Series(CAN+USB) LQFP100 Pin Description ------------------------ 135 4.3.12 GPIO Multi-function Pin Summary ---------------------------------------------- 148 BLOCK DIAGRAM ------------------------------------------------------- 158 5 NuMicro® M451 Block Diagram .......................................................... 158 5.1 FUNCTIONAL DESCRIPTION ------------------------------------------- 160 6 6.1 ARM® Cortex® -M4 Core................................................................... 160 6.2 System Manager ........................................................................... 163 6.2.1 Overview ------------------------------------------------------------------------ 163 6.2.2 System Reset ------------------------------------------------------------------- 163 6.2.3 Power Modes and Wake-up Sources --------------------------------------------- 170 6.2.4 System Power Distribution ------------------------------------------------------- 172 6.2.5 System Memory Map ------------------------------------------------------------ 174 6.2.6 SRAM Memory Organization ----------------------------------------------------- 177 6.2.7 System Timer (SysTick) ---------------------------------------------------------- 180 6.2.8 Nested Vectored Interrupt Controller (NVIC) -------------------------------------- 180 6.3 Clock Controller ............................................................................ 181 Overview ------------------------------------------------------------------------ 181 6.3.2 Clock Generator ----------------------------------------------------------------- 183 6.3.3 System Clock and SysTick Clock ------------------------------------------------- 184 6.3.4 Peripherals Clock ---------------------------------------------------------------- 185 6.3.5 Power-down Mode Clock --------------------------------------------------------- 186 6.3.6 Clock Output -------------------------------------------------------------------- 186 6.4 Flash Memeory Controller (FMC) ....................................................... 188 6.4.1 Overview ------------------------------------------------------------------------ 188 6.4.2 Features ------------------------------------------------------------------------ 188 6.5 External Bus Interface (EBI) ............................................................. 189 6.5.1 Overview ------------------------------------------------------------------------ 189 6.5.2 Features ------------------------------------------------------------------------ 189 6.6 General Purpose I/O (GPIO) ............................................................. 190 6.6.1 Overview ------------------------------------------------------------------------ 190 6.6.2 Features ------------------------------------------------------------------------ 190 6.7 PDMA Controller (PDMA) ................................................................ 191 6.7.1 Overview ------------------------------------------------------------------------ 191 6.7.2 Features ------------------------------------------------------------------------ 191 6.8 Timer Controller (TMR) ................................................................... 192 May. 7, 2018 Page 3 of 242 Rev.2.08 M451 SERIES DATASHEET 6.3.1 M451 6.8.1 Overview ------------------------------------------------------------------------ 192 6.8.2 Features ------------------------------------------------------------------------ 192 6.9 PWM Generator and Capture Timer (PWM) .......................................... 193 6.9.1 Overview ------------------------------------------------------------------------ 193 6.9.2 Features ------------------------------------------------------------------------ 193 6.10 Watchdog Timer (WDT)................................................................... 195 6.10.1 Overview ---------------------------------------------------------------------- 195 6.10.2 Features ---------------------------------------------------------------------- 195 6.11 Window Watchdog Timer (WWDT) ..................................................... 196 6.11.1 Overview ---------------------------------------------------------------------- 196 6.11.2 Features ---------------------------------------------------------------------- 196 6.12 Real Time Clock (RTC) ................................................................... 197 6.12.1 Overview ---------------------------------------------------------------------- 197 6.12.2 Features ---------------------------------------------------------------------- 197 6.13 UART Interface Controller (UART) ...................................................... 198 6.13.1 Overview ---------------------------------------------------------------------- 198 6.13.2 Features ---------------------------------------------------------------------- 198 6.14 Smart Card Host Interface (SC) ......................................................... 200 Overview ---------------------------------------------------------------------- 200 6.14.1 Features ---------------------------------------------------------------------- 200 6.14.2 M451 SERIES DATASHEET 6.15 I C Serial Interface Controller (I2C) ..................................................... 201 2 6.15.1 Overview ---------------------------------------------------------------------- 201 6.15.2 Features ---------------------------------------------------------------------- 201 6.16 Serial Peripheral Interface (SPI) ......................................................... 202 6.16.1 Overview ---------------------------------------------------------------------- 202 6.16.2 Features ---------------------------------------------------------------------- 202 6.17 USB Device Controller (USBD) .......................................................... 203 6.17.1 Overview ---------------------------------------------------------------------- 203 6.17.2 Features ---------------------------------------------------------------------- 203 6.18 USB 1.1 Host Controller (USBH) ........................................................ 204 6.18.1 Overview ---------------------------------------------------------------------- 204 6.18.2 Features ---------------------------------------------------------------------- 204 6.19 USB On-The-Go (OTG) ................................................................... 205 6.19.1 Overview ---------------------------------------------------------------------- 205 6.19.2 Features ---------------------------------------------------------------------- 205 May. 7, 2018 Page 4 of 242 Rev.2.08 M451 6.20 Controller Area Network (CAN) .......................................................... 206 6.20.1 Overview ---------------------------------------------------------------------- 206 6.20.2 Features ---------------------------------------------------------------------- 206 6.21 CRC Controller (CRC) .................................................................... 207 6.21.1 Overview ---------------------------------------------------------------------- 207 6.21.2 Features ---------------------------------------------------------------------- 207 6.22 Enhanced 12-bit Analog-to-Digital Converter (EADC) ............................... 208 6.22.1 Overview ---------------------------------------------------------------------- 208 6.22.2 Features ---------------------------------------------------------------------- 208 6.23 Digital to Analog Converter (DAC) ...................................................... 209 6.23.1 Overview ---------------------------------------------------------------------- 209 6.23.2 Features ---------------------------------------------------------------------- 209 6.24 Analog Comparator Controller (ACMP) ................................................ 210 6.24.1 Overview ---------------------------------------------------------------------- 210 6.24.2 Features ---------------------------------------------------------------------- 210 7 APPLICATION CIRCUIT ------------------------------------------------- 211 8 ELECTRICAL CHARACTERISTICS -------------------------------------- 212 8.1 Absolute Maximum Ratings .............................................................. 212 8.2 DC Electrical Characteristics ............................................................. 213 8.3 AC Electrical Characteristics ............................................................. 219 External 4~24 MHz High Speed Crystal (HXT) Input Clock ------------------------- 219 8.3.2 External 4~20 MHz High Speed Crystal (HXT) Oscillator --------------------------- 219 8.3.3 22.1184 MHz Internal High Speed RC Oscillator (HIRC) --------------------------- 220 8.3.4 32.768 kHz External Low Speed Crystal (LXT) Input Clock------------------------- 221 8.3.5 32.768 kHz External Low Speed Crystal (LXT) Oscillator -------------------------- 221 8.3.6 10 kHz Internal Low Speed RC Oscillator (LIRC) ---------------------------------- 222 8.4 Analog Characteristics .................................................................... 223 8.4.1 12-bit SAR ADC ----------------------------------------------------------------- 223 8.4.2 LDO ---------------------------------------------------------------------------- 225 8.4.3 Low Voltage Reset --------------------------------------------------------------- 225 8.4.4 Brown-out Detector -------------------------------------------------------------- 225 8.4.5 Power-on Reset ----------------------------------------------------------------- 226 8.4.6 Temperature Sensor ------------------------------------------------------------- 226 8.4.7 Comparator --------------------------------------------------------------------- 227 8.4.8 12-bit DAC ---------------------------------------------------------------------- 227 May. 7, 2018 Page 5 of 242 Rev.2.08 M451 SERIES DATASHEET 8.3.1 M451 8.4.9 8.4.10 Internal Voltage Reference ------------------------------------------------------- 228 USB PHY --------------------------------------------------------------------- 228 8.5 Flash DC Electrical Characteristics ..................................................... 230 8.6 I2C Dynamic Characteristics ............................................................. 231 8.7 SPI Dynamic Characteristics ............................................................. 232 8.7.1 8.8 Dynamic Characteristics of Data Input and Output Pin ----------------------------- 232 I2S Dynamic Characteristics.............................................................. 235 PACKAGE DIMENSIONS ------------------------------------------------ 237 9 9.1 LQFP 100L (14x14x1.4 mm footprint 2.0 mm) ........................................ 237 9.2 LQFP 64L (10x10x1.4 mm footprint 2.0 mm) ......................................... 238 9.3 LQFP 64L (7x7x1.4 mm footprint 2.0 mm)............................................. 239 9.4 LQFP 48L (7x7x1.4mm2 Footprint 2.0mm) ............................................ 240 10 REVISION HISTORY ---------------------------------------------------- 241 M451 SERIES DATASHEET May. 7, 2018 Page 6 of 242 Rev.2.08 M451 List of Figures ® Figure 4.1-1 NuMicro M451 Selection Code ................................................................................ 20 ® Figure 4.2-1 NuMicro M451 Base Series LQFP 48-pin Diagram ................................................. 25 ® Figure 4.2-2 NuMicro M451 Base Series LQFP 64-pin Diagram ................................................. 26 ® Figure 4.2-3 NuMicro M451 Base Series LQFP 100-pin Diagram ............................................... 27 ® Figure 4.2-4 NuMicro M451M Base Series (Pin Compatible with M051) LQFP 48-pin Diagram 28 ® Figure 4.2-5 NuMicro M451M Base Series (Pin Compatible with M058S) LQFP 64-pin Diagram ................................................................................................................................................ 29 ® Figure 4.2-6 NuMicro M451 USB Series LQFP 48-pin Diagram (M452LG/M452LE Device Only) ................................................................................................................................................ 30 ® Figure 4.2-7 NuMicro M451 USB Series LQFP 48-pin Diagram (M452LD/M452LC Device Only) ................................................................................................................................................ 31 ® Figure 4.2-8 NuMicro M451 USB Series LQFP 64-pin Diagram (M452RG/M452RE Device Only) ................................................................................................................................................ 32 ® Figure 4.2-9 NuMicro M451 USB Series LQFP 64-pin Diagram (M452RD Device Only) ........... 33 ® Figure 4.2-10 NuMicro M451 USB Series LQFP 100-pin Diagram (M452VG/M452VE Device Only) ........................................................................................................................................ 34 ® Figure 4.2-11 NuMicro M451 CAN Series (CAN+USB) LQFP 48-pin Diagram (M453LG/M453LE Device Only)............................................................................................................................ 35 ® Figure 4.2-12 NuMicro M451 CAN Series (CAN+USB) LQFP 48-pin Diagram (M453LD/M453LC Device Only)............................................................................................................................ 36 ® Figure 4.2-13 NuMicro M451 CAN Series (CAN+USB) LQFP 64-pin Diagram (M453RG/M453RE Device Only)............................................................................................................................ 37 ® Figure 4.2-14 NuMicro M451 CAN Series (CAN+USB) LQFP 64-pin Diagram (M453RD Device Only) ........................................................................................................................................ 38 ® Figure 4.2-16 NuMicro M451 CAN Series (CAN+USB) LQFP 100-pin Diagram (M453VD Device Only) ........................................................................................................................................ 40 ® Figure 5.1-1 NuMicro M45xG/M45xE Block Diagram ................................................................ 158 ® Figure 5.1-2 NuMicro M45xD/M45xC Block Diagram ................................................................ 159 ® Figure 6.1-1 Cortex -M4 Block Diagram ...................................................................................... 160 Figure 6.2-1 System Reset Sources ............................................................................................ 164 Figure 6.2-2 nRESET Reset Waveform ....................................................................................... 167 Figure 6.2-3 Power-on Reset (POR) Waveform .......................................................................... 167 Figure 6.2-4 Low Voltage Reset (LVR) Waveform ....................................................................... 168 Figure 6.2-5 Brown-out Detector (BOD) Waveform ..................................................................... 169 Figure 6.2-6 Power Mode State Machine .................................................................................... 170 Figure 6.2-7 NuMicro® M451 Power Distribution Diagram .......................................................... 173 Figure 6.2-8 SRAM Block Diagram .............................................................................................. 177 Figure 6.2-9 SRAM Memory Organization (M45xG/M45xE) ....................................................... 178 May. 7, 2018 Page 7 of 242 Rev.2.08 M451 SERIES DATASHEET ® Figure 4.2-15 NuMicro M451 CAN Series (CAN+USB) LQFP 100-pin Diagram (M453VG/M453VE Device Only) ............................................................................................ 39 M451 Figure 6.2-10 SRAM Memory Organization (M45xD/M45xC) ..................................................... 179 Figure 6.3-1 Clock Generator Global View Diagram .................................................................... 182 Figure 6.3-2 Clock Generator Block Diagram .............................................................................. 183 Figure 6.3-3 System Clock Block Diagram .................................................................................. 184 Figure 6.3-4 HXT Stop Protect Procedure ................................................................................... 185 Figure 6.3-5 SysTick Clock Control Block Diagram ..................................................................... 185 Figure 6.3-6 Clock Source of Clock Output ................................................................................. 186 Figure 6.3-7 Clock Output Block Diagram ................................................................................... 187 Figure 8.3-1 Typical Crystal Application Circuit ........................................................................... 220 Figure 8.3-2 HIRC Accuracy vs. Temperature ............................................................................. 220 Figure 8.3-3 Typical Crystal Application Circuit ........................................................................... 222 Figure 8.4-1 Typical connection diagram using the ADC ............................................................ 224 Figure 8.4-2 Power-up Ramp Condition ...................................................................................... 226 2 Figure 8.6-1 I C Timing Diagram ................................................................................................. 231 Figure 8.7-1 SPI Master Mode Timing Diagram .......................................................................... 232 Figure 8.7-2 SPI Slave Mode Timing Diagram ............................................................................ 234 2 Figure 8.8-1 I S Master Mode Timing Diagram............................................................................ 236 2 Figure 8.8-2 I S Slave Mode Timing Diagram.............................................................................. 236 M451 SERIES DATASHEET May. 7, 2018 Page 8 of 242 Rev.2.08 M451 List of Tables Table 1-1 Key Features Support Table .......................................................................................... 10 Table 3-1 List of Abbreviations ....................................................................................................... 19 Table 4-1 M451 GPIO Multi-function Table ................................................................................. 157 Table 6-1 Reset Value of Registers ............................................................................................. 166 Table 6-2 Power Mode Difference Table ..................................................................................... 170 Table 6-3 Clocks in Power Modes ............................................................................................... 171 Table 6-4 Condition of Entering Power-down Mode Again .......................................................... 172 Table 6-5 Address Space Assignments for On-Chip Controllers ................................................. 176 ® Table 6-6 NuMicro M451 Series UART Feature ........................................................................ 199 M451 SERIES DATASHEET May. 7, 2018 Page 9 of 242 Rev.2.08 M451 1 GENERAL DESCRIPTION ® ® The M451 series includes a total of 33 ARM Cortex -M4F based products, including the M451 Base Series, M452 USB Series, M453 CAN Series, and M451M Series which is pin compatible with M051 LQFP48 and M058S LQFP64. By planning a complete product line, Nuvoton hopes to ® ® fulfill the demand for the ARM Cortex -M4F core with products at all levels and realize its customer commitment: total support for long-term competitiveness enhancement, and to fulfill their current product development demand and future innovation imagination. ® ® The M451 series embedded with the ARM Cortex -M4F core supports DSC (digital signal controller) and FPU (float point unit) and features high performance computing capability running up to 72 MHz, built-in 256/128/72/40 KB Flash ROM, 32/16 KB SRAM complying with IEC60730 and independent 4 KB in-system programming Flash ROM for developing more flexible online 2 upgrade code that support external UART, SPI, I C, CAN and USB. It also supports EBI to provide greater flexibility for external memory. The entire M451 series is provided with outstanding specifications: four 32-bit timers, dual watchdogs, and integrates plenty of peripherals such as PDMA and RTCs, five UARTs that support 16-byte FIFO, three sets of SPI controllers 2 that support quad mode, two I²C devices that support SMBus and PMBus, two sets of I S, two LINs, CAN bus, ISO-7816-3 interface, full-speed USB OTG, full-speed USB devices, 16-channel 12-bit ADC with 1 MSPS conversion rate, built-in reference voltage (VREF) for circuit generation, 12-bit DAC, two analog comparators and temperature detectors. The M451 series provides two special designs. One is high-resolution 144 MHz PWM with highspeed electromechanical control timer and resolution= 2.9V Vref2 Vref(2.048V) 1.986 2.048 2.109 V AVDD >= 2.5V Vref3 Vref(3.072V) 2.98 3.072 3.164 V AVDD >= 3.4V Vref4 Vref(4.096V) 3.973 4.096 4.219 V AVDD >= 4.5V Min. Typ. Max. Unit Test Conditions 2.0 - V - - - V - 0.2 - V |PADP-PADM| 0.8 - 2.5 V Includes VDI range 0.8 - 2.0 V - Receiver Hysteresis - 200 mV - VOL Output Low (driven) 0 - 0.3 V - VOH Output High (driven) 2.8 - 3.6 V - VCRS Output Signal Cross Voltage 1.3 - 2.0 V - RPU Pull-up Resistor 1.425 - 1.575 kΩ - ZDRV Driver Output Resistance - 10 - Ω Steady state drive* CIN Transceiver Capacitance - - 20 pF Pin to GND 8.4.10 USB PHY 8.4.10.1 Low-full-Speed DC Electrical Specifications M451 SERIES DATASHEET Symbol Parameter VIH Input High (driven) VIL Input Low VDI Differential Input Sensitivity VCM VSE Differential Common-mode Range Single-ended Receiver Threshold 0.8 *Driver output resistance doesn’t include series resistor resistance. May. 7, 2018 Page 228 of 242 Rev.2.08 M451 8.4.10.2 USB Full-Speed Driver Electrical Characteristics Symbol Parameter Min. Typ. Max. Unit Test Conditions TFR Rise Time 4 - 20 ns CL=50p TFF Fall Time 4 - 20 ns CL=50p TFRFF Rise and Fall Time Matching 90 - 111.11 % TFRFF=TFR/TFF Min. Typ. Max. Unit Test Conditions 4.0 5.0 5.5 V - 8.4.10.3 USB LDO Specification Symbol Parameter VBUS VBUS Pin Input Voltage VDD33 LDO Output Voltage - 3.3 - V - Cbp External Bypass Capacitor - 1.0 - uF - M451 SERIES DATASHEET May. 7, 2018 Page 229 of 242 Rev.2.08 M451 8.5 Flash DC Electrical Characteristics Symbol Parameter Min Typ Max Unit VFLA[2] Supply Voltage - 1.8 - V NENDUR Endurance 20,000 - - cycles[1] TRET Data Retention 100 - - year TERASE Page Erase Time 20 - ms TPROG Program Time 60 - us IDD1 Read Current - - 13.5 mA IDD2 Program Current - 10 - mA IDD3 Erase Current - 12 - mA Test Condition TA = 25 Notes: 1. Number of program/erase cycles. 2. VFLA is source from chip LDO output voltage. M451 SERIES DATASHEET May. 7, 2018 Page 230 of 242 Rev.2.08 M451 8.6 I2C Dynamic Characteristics Symbol Standard Mode[1][2] Fast Mode[1][2] Min. Max. Min. Max. Unit Parameter tLOW SCL low period 4.7 - 1.2 - uS tHIGH SCL high period 4 - 0.6 - uS tSU; STA Repeated START condition setup time 4.7 - 1.2 - uS tHD; STA START condition hold time 4 - 0.6 - uS tSU; STO STOP condition setup time 4 - 0.6 - uS tBUF Bus free time 4.7[3] - 1.2[3] - uS tSU;DAT Data setup time 250 - 100 - nS tHD;DAT Data hold time 0[4] 3.45[5] 0[4] 0.8[5] uS tr SCL/SDA rise time - 1000 20+0.1Cb 300 nS tf SCL/SDA fall time - 300 - 300 nS Cb Capacitive load for each bus line - 400 - 400 pF Notes: STOP Repeated START START STOP SDA tBUF tLOW tr SCL tHD;STA tf tHIGH tHD;DAT tSU;DAT tSU;STA tSU;STO 2 Figure 8.6-1 I C Timing Diagram May. 7, 2018 Page 231 of 242 Rev.2.08 M451 SERIES DATASHEET 1. Guaranteed by design, not tested in production. 2 2. HCLK must be higher than 2 MHz to achieve the maximum standard mode I C frequency. It must 2 be higher than 8 MHz to achieve the maximum fast mode I C frequency. 2 3. I C controller must be retriggered immediately at slave mode after receiving STOP condition. 4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the undefined region of the falling edge of SCL. 5. The maximum hold time of the Start condition has only to be met if the interface does not stretch the low period of SCL signal. M451 8.7 SPI Dynamic Characteristics 8.7.1 Dynamic Characteristics of Data Input and Output Pin SYMBOL PARAMETER MIN. TYP. MAX. UNIT SPI MASTER MODE (VDD = 4.5 V~5.5V, 30 PF LOADING CAPACITOR) tW(SCKH) tW(SCKL) SPI high and low time, peripheral clock = 20MHz tDS 22.5 - 27.5 ns Data input setup time 2 - - ns tH(MI) Data input hold time 4 - - ns tV Data output valid time - - 1 ns tH(MO) Data output hold time 0 - - ns 27.5 ns SPI MASTER MODE (VDD = 3.0~3.6 V, 30 PF LOADING CAPACITOR) tW(SCKH) tW(SCKL) SPI high and low time, peripheral clock = 20MHz tDS Data input setup time 2 ns tH(MI) Data input hold time 4 ns tV Data output valid time tH(MO) Data output hold time 22.5 - 0 - 1 ns - - ns CLKPOL=0 TXNEG=1 RXNEG=0 M451 SERIES DATASHEET SPI Clock CLKPOL=1 TXNEG=0 RXNEG=1 tV tr(SCK) tf(SCK) SPI data output (SPI_MOSI) Data Valid tDS SPI data input (SPI_MISO) Data Valid tDH Data Valid Data Valid CLKPOL=0 TXNEG=0 RXNEG=1 SPI Clock CLKPOL=1 TXNEG=1 RXNEG=0 tV SPI data output (SPI_MOSI) Data Valid tDS SPI data input (SPI_MISO) Data Valid tDH Data Valid Data Valid Figure 8.7-1 SPI Master Mode Timing Diagram May. 7, 2018 Page 232 of 242 Rev.2.08 M451 SYMBOL PARAMETER MIN. TYP. MAX. UNIT SPI SLAVE MODE (VDD = 4.5 V~5.5V, 30 PF LOADING CAPACITOR) Peripheral clock tSS Slave select setup time 3 - - tSH Slave select hold time 2 - - tDS Data input setup time 2 - - ns tH(SI) Data input hold time 5.5 - - ns ta(SO) Data output access time - - 18 ns tV Data output valid time - 18.5- 24.5 ns tH(SO) Data output hold time 6 - - ns Peripheral clock Peripheral clock SPI SLAVE MODE (VDD = 3.0 V ~ 3.6 V, 30 PF LOADING CAPACITOR) tSS Slave select setup time 3 - - tSH Slave select hold time 2 - - tDS Data input setup time 2 - - ns tH(SI) Data input hold time 6 - - ns ta(SO) Data output access time - - 24 ns tV Data output valid time - 23 30 ns tH(SO) Data output hold time 7 - - ns Peripheral clock M451 SERIES DATASHEET May. 7, 2018 Page 233 of 242 Rev.2.08 M451 SSACTPOL=1 SPI SS tSS tSH SSACTPOL=0 CLKPOL=0 TXNEG=1 RXNEG=0 SPI Clock CLKPOL=1 TXNEG=0 RXNEG=1 tV SPI data output (SPI_MISO) Data Valid Data Valid tDS SPI data input (SPI_MOSI) Data Valid SSACTPOL=1 SPI SS tDH Data Valid tSS tSH SSACTPOL=0 CLKPOL=0 TXNEG=0 RXNEG=1 SPI Clock CLKPOL=1 TXNEG=1 RXNEG=0 ta(so) tV SPI data output (SPI_MISO) Data Valid tDS M451 SERIES DATASHEET SPI data input (SPI_MOSI) Data Valid tDH Data Valid Data Valid Figure 8.7-2 SPI Slave Mode Timing Diagram May. 7, 2018 Page 234 of 242 Rev.2.08 M451 8.8 I2S Dynamic Characteristics Symbol tw(CKH) Parameter I2S clock high time 2 Min Max 42 - Unit Test Conditions Master fPCLK = MHz, data: 24 bits, audio frequency = 256 kHz tw(CKL) I S clock low time 37 - tv(WS) WS valid time 7 - th(WS) WS hold time 1 - Master mode tsu(WS) WS setup time 34 - Slave mode th(WS) WS hold time 0 - Slave mode DuCy(SCK) I2S slave input clock duty cycle 25 75 0 - Master receiver 0 - Slave receiver 0 - Master receiver 0 - tsu(SD_MR) % Slave mode Data input setup time tsu(SD_SR) th(SD_MR) Master mode ns Data input hold time th(SD_SR) Slave receiver ns tv(SD_ST) Data output valid time - 32 Slave transmitter (after enable edge) th(SD_ST) Data output hold time 16 - Slave transmitter (after enable edge) tv(SD_MT) Data output valid time - 5 Master transmitter (after enable edge) th(SD_MT) Data output hold time 0 - Master transmitter (after enable edge) M451 SERIES DATASHEET May. 7, 2018 Page 235 of 242 Rev.2.08 CK output M451 CPOL = 0 tw(CKH) CPOL = 1 tw(CKL) tv(WS) th(WS) WS output tv(SD_ST) LSB transmit(2) SDtransmit MSB transmit tsu(SD_MR) LSB receive(2) SDreceive Bitn transmit th(SD_ST) LSB transmit th(SD_MR) MSB receive Bitn receive LSB receive 2 Figure 8.8-1 I S Master Mode Timing Diagram CK Input CPOL = 0 CPOL = 1 tw(CKH) tw(CKL) th(WS) WS input tv(SD_ST) tsu(WS) M451 SERIES DATASHEET SDtransmit LSB transmit(2) MSB transmit tsu(SD_SR) SDreceive LSB receive(2) Bitn transmit th(SD_ST) LSB transmit th(SD_SR) MSB receive Bitn receive LSB receive 2 Figure 8.8-2 I S Slave Mode Timing Diagram May. 7, 2018 Page 236 of 242 Rev.2.08 M451 9 PACKAGE DIMENSIONS 9.1 LQFP 100L (14x14x1.4 mm footprint 2.0 mm) M451 SERIES DATASHEET May. 7, 2018 Page 237 of 242 Rev.2.08 M451 9.2 LQFP 64L (10x10x1.4 mm footprint 2.0 mm) M451 SERIES DATASHEET May. 7, 2018 Page 238 of 242 Rev.2.08 M451 9.3 LQFP 64L (7x7x1.4 mm footprint 2.0 mm) M451 SERIES DATASHEET May. 7, 2018 Page 239 of 242 Rev.2.08 M451 9.4 LQFP 48L (7x7x1.4mm2 Footprint 2.0mm) M451 SERIES DATASHEET May. 7, 2018 Page 240 of 242 Rev.2.08 M451 10 REVISION HISTORY Date Revision Description 2014.08.22 1.00 1. Preliminary version. 1. Updated document format. 2. Updated the VBAT pin description to “Power supply by batteries for RTC and PF.0~PF.2” in section 4.3. 2015.03.30 1.01 3. Added GPIO information for Power Distribution in section 6.2.4. 4. Revised maximum clock of HXT from 24 MHz to 20 MHz.. 5. Revised M451 selection guide in section 4.1. 2015.05.11 2.00 1. Added new part number for M45xD/M45xC and the description about the difference with M45xG/M45xE. 2. Added 6.2.2.1~6.2.2.7 and 6.2.2 to describe reset sources and power modes. 2015.05.21 2.01 2015.6.12 2.02 1. Revised M451 selection guide in section 4.1. 2. Updated System Reset description in section 6.2.2.1. 1. Added description to note that VREF, LDO_CAP and USB_VDD33_CAP need to be connected with a 1uF capacitor in section 4.3, 6.2.4 and chapter 7. 2. Added two notes of chip limitations in section 6.2.4 and chapter 7. 1. Changed “external counter input” to “external capture input” in section 4.3. 2. Added a note to indicate LQFP 64L package dimension of M451M series in section 4.1.3 2015.09.01 2.03 3. Added lists to indicate 5V-tolerance pins in section 2.1 and 6.6.2. 4. Added “EBI” column into selection guides in section 4.1. 5. Revised bank size of SRAM Memory Organization (M45xD/M45xC) from 16 KB to 8 KB in Figure 6.2-10. 2016.01.29 2.04 1. Removed Touch Key in M451 series. 2016.03.04 2.05 2. Added M451M pin 5 ADC channel 6 description in section 4.3.4. ® 3. Revised NuMicro M451 Naming Rule in section 4.1.1 1. Updated M452 Selection Guide in section 4.1.4. 2017.08.16 2.06 2. Removed EADC and DAC reference voltage from AVDD in section 6.22.2, 6.23.2 and 6.24.2. 1. Added M451M Series LQFP64 Pin Description in section 4.3.5. 2017.12.13 2.07 2. Corrected the typo in section 2.1 and Figure 6.3-7. 3. Removed Boot Loader function. 1. Revised the SWD interface in chapter 7 ® 2018.05.07 2.08 2. Added M452VE6AE and M452VG6AE in section 4.1.4 NuMicro M452 USB Series Selection Guide. ® 3. Added section 4.2.8 NuMicro M452 USB Series LQFP100 Pin Diagram and 4.3.8 M452 USB Series LQFP100 Pin Description. May. 7, 2018 Page 241 of 242 Rev.2.08 M451 SERIES DATASHEET 1. Updated general description. M451 M451 SERIES DATASHEET Important Notice Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any malfunction or failure of which may cause loss of human life, bodily injury or severe property damage. Such applications are deemed, “Insecure Usage”. Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic energy control instruments, airplane or spaceship instruments, the control or operation of dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types of safety devices, and other applications intended to support or sustain life. All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the damages and liabilities thus incurred by Nuvoton. May. 7, 2018 Page 242 of 242 Rev.2.08