0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
NSI8121N1

NSI8121N1

  • 厂商:

    NOVOSENSE(纳芯微)

  • 封装:

    SOIC8_150MIL

  • 描述:

    高可靠性双通道数字隔离器

  • 数据手册
  • 价格&库存
NSI8121N1 数据手册
NSi8120/NSi8121/NSi8122: High Reliab ility Dual-Channel Digital Isolators NOVOSENSE Datasheet (EN) 1.3 Product Overview The NSi812x devices are high reliability dualchannel digital isolator. The NSi812x device is safety certified by UL1577 support several insulation withstand voltages (3.75kVrms, 5kVrms), while providing high electromagnetic immunity and low emissions at low power consumption. The data rate of the NSi812x is up to 150Mbps, and the common-mode transient immunity (CMTI) is up to 150kV/us. The NSi812x device provides digital channel direction configuration and the default output level configuration when the input power is lost. Wide supply voltage of the NSi812x device support to connect with most digital interface directly, easy to do the level shift. High system level EMC performance enhance reliability and stability of use. AEC-Q100 (Grade 1) option is provided for 3.75kV parts. ⚫ Operation temperature: -40℃~125℃ ⚫ RoHS-compliant packages: SOIC-8 narrow body SOIC-16 wide body Safety Regulatory Approvals (pending) ⚫ ⚫ UL recognition: up to 5000VRMS for 1 minute per UL1577 CQC certification per GB4943.1-2011 ⚫ CSA component notice 5A approval IEC60950-1 standard ⚫ DIN VDE V 0884-10 (VDE V 0884-10): 200612 Applications ⚫ Industrial automation system Key Features ⚫ Isolated SPI, RS232, RS485 ⚫ Up to 5000VRMS Insulation voltage ⚫ General-purpose multichannel isolation ⚫ Date rate: DC to 150Mbps ⚫ Motor control ⚫ ⚫ ⚫ Power supply voltage: 2.5V to 5.5V AEC-Q100 Grade 1 available for SOIC-8 High CMTI: 150kV/us ⚫ Chip level ESD: HBM: ±6kV ⚫ ⚫ ⚫ High system level EMC performance: Enhanced system level ESD, EFT, Surge immunity Default output high level or low level option Isolation Barrier Life: >60 years ⚫ Low power consumption: 1.5mA/ch (1 Mbps) ⚫ Low propagation delay: 600 V DIN EN 60112 (VDE 0303-11); IEC 60112 Material Group Ⅰ 3.2. DIN VDE V 0884-10 (VDE V 0884-10) INSULATION CHARATERISTICS Description Test Condition Symbol Value SOIC-8 SOIC-16 For Rated Mains Voltage ≤ 150Vrms Ⅰto Ⅳ Ⅰto Ⅳ For Rated Mains Voltage ≤ 300Vrms Ⅰto Ⅲ Ⅰto Ⅳ For Rated Mains Voltage ≤ 400Vrms Ⅰto Ⅲ Ⅰto Ⅳ Unit Installation Classification per DIN VDE 0110 Climatic Classification 10/105/21 Pollution Degree per DIN VDE 0110, 2 10/105/21 2 Table 1 Maximum repetitive isolation voltage VIORM Novosense Confidential Page 9 565 849 Vpeak NSi8120/NSi8121/NSi8122 Input to Output Test Voltage, Method B1 V IORM × 1.875 = V pd (m) , 100% production test, V pd (m) 1059 1592 Vpeak t ini = t m = 1 sec, partial discharge < 5 pC Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 V IORM × 1.5 = V pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pC V pd (m) 848 1274 Vpeak After Input and /or Safety Test Subgroup 2 and Subgroup 3 V IORM × 1.2= V pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pC V pd (m) 678 1019 Vpeak t = 60 sec VIOTM 5300 7000 Vpeak Test method per IEC60065,1.2/50us waveform, VTEST=1.6 ×VIOSM VIOSM 6000 7000 Vpeak VIO =500V RIO >109 >109 Ω f = 1MHz CIO 0.8 0.8 pF Input capacitance CI 2 2 pF Total Power Dissipation at 25℃ Ps 1499 mW Maximum transient isolation voltage Maximum Surge Isolation Voltage Isolation resistance Isolation capacitance Safety input, output, or supply current θJA = 140 °C/W, V I = 5.5 V, T J = 150 °C, T A = 25 °C 160 Is θJA = 84 °C/W, V I = 5.5 V, T J = 150 °C, T A = 25 °C Case Temperature Ts Saftey Limiting Current (mA) mA 150 237 mA 150 ℃ 180 160 140 120 100 80 60 40 20 0 0 50 100 150 200 Case Temperature (℃) Figure 3.1 NSi8120N/NSi8121N/NSi8122N Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN V VDE V 0884-10 Novosense Confidential Page 10 Saftey Limiting Current (mA) NSi8120/NSi8121/NSi8122 250 200 150 100 50 0 0 50 100 150 200 Case Temperature (℃) Figure 3.2 NSi8120W/NSi8121W/NSi8122W Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN V VDE V 0884-10 3.3. REGULATORY INFORMATION The NSi8120N/NSi8121N/NSi8122N are approved or pending approval by the organizations listed in table. UL UL 1577 Component Recognition Program1 CSA Approved under CSA Component Acceptance Notice 5A File (pending) 1 CQC DIN V VDE V088410 (VDE V 088410):2006-122 Certified by CQC11471543-2012 400VRMS basic insulation working voltage Basic Insulation 565Vpeak, VIOSM=6000Vpeak Basic insulation at 400VRMS (565Vpeak) File (pending) File (pending) IEC60950-1 Single Protection, 3750Vrms Isolation voltage VDE GB4943.1-2011 File (pending) In accordance with UL 1577, each NSi8120N/NSi8121N/NSi8122N is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 sec. 2 In accordance with DIN V VDE V 0884-10, each NSi8120N/NSi8121N/NSi8122N is proof tested by applying an insulation test voltage ≥ 1059 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. The NSi8120W/NSi8121W/NSi8122W are approved or pending approval by the organizations listed in table. UL UL 1577 Component Recognition Program CSA Approved under CSA Component Acceptance Notice 5A VDE DIN V VDE V088410 (VDE V 088410):2006-12 CQC Certified by CQC11471543-2012 GB4943.1-2011 IEC60950-1 Double Protection, 5000Vrms Isolation voltage 780VRMS basic insulation working voltage 390VRMS Reinforced insulation working voltage File (pending) 1 File (pending) Basic Insulation 849Vpeak, VIOSM=7000Vpeak File (pending) Basic insulation at 780VRMS (1103Vpeak) Reinforced insulation at 390VRMS (552Vpeak) File (pending) In accordance with UL 1577, each NSi8120W/NSi8121W/NSi8122W is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec. 2 In accordance with DIN V VDE V 0884-10, each NSi8120W/NSi8121W/NSi8122W is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. Novosense Confidential Page 11 NSi8120/NSi8121/NSi8122 4.0 FUNCTION DESCRIPTION The NSi812x is a Dual-channel digital isolator based on a capacitive isolation barrier technique. The digital signal is modulated with RF carrier generated by the internal oscillator at the Transmitter side. Then it is transferred through the capacitive isolation barrier and demodulated at the Receiver side. The NSi812x devices are high reliability dual-channel digital isolator with AEC-Q100 qualified. The NSi812x device is safety certified by UL1577 support several insulation withstand voltages (3.75kVrms, 5kVrms), while providing high electromagnetic immunity and low emissions at low power consumption. The data rate of the NSi812x is up to 150Mbps, and the common-mode transient immunity (CMTI) is up to 150kV/us. The NSi812x device provides digital channel direction configuration and the default output level configuration when the input power is lost. Wide supply voltage of the NSi812x device support to connect with most digital interface directly, easy to do the level shift. High system level EMC performance enhance reliability and stability of use. The NSi812x has a default output status when VDDIN is unready and VDDOUT is ready as shown in Table 4.1, which helps for diagnosis when power is missing at the transmitter side. The output B follows the same status with the input A within 1us after powering up. Table 4.1 Output status vs. power status Input VDD1 status VDD2 status Output Comment H Ready Ready H Normal operation. L Ready Ready L X Unready Ready L The output follows the same status with the input within 1us after input side VDD1 is powered on. H X Ready Unready The output follows the same status with the input within 1us after output side VDD2 is powered on. X 5.0 APPLICATION NOTE 5.1. PCB LAYOUT The NSi812x requires a 0.1 µF bypass capacitor between VDD1 and GND1, VDD2 and GND2. The capacitor should be placed as close as possible to the package. Figure 5.1 to Figure 5.4 show the recommended PCB layout, make sure the space under the chip should keep free from planes, traces, pads and via. To enhance the robustness of a design, the user may also include resistors (50– 300 Ω ) in series with the inputs and outputs if the system is excessively noisy. The series resistors also improve the system reliability such as latch-up immunity. The typical output impedance of an isolator driver channel is approximately 50 Ω, ±40%. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. Figure5.1 Recommended PCB Layout — Top Layer Figure5.2 Recommended PCB Layout — Bottom Layer Novosense Confidential Page 12 NSi8120/NSi8121/NSi8122 Figure5.3 Recommended PCB Layout — Top Layer Figure5.4 Recommended PCB Layout — Bottom Layer 5.2. HIGH SPEED PERFORMANCE Figure 5.5 shows the eye diagram of NSi812x at 200Mbps data rate output. The result shows a typical measurement on the NSi812x with 350ps p-p jitter. Figure5.5 NSi812x Eye Diagram 5.3. TYPICAL SUPPLY CURRENT EQUATIONS The typical supply current of NSi812x can be calculated using below equations. IDD1 and IDD2 are typical supply currents measured in mA, f is data rate measured in Mbps, CL is the capacitive load measured in pF NSi8120: IDD1 = 0.19 *a1+1.45*b1+0.82*c1. IDD2 = 1.36+ VDD1*f* CL *c1*10-9 When a1 is the channel number of low input at side 1, b1 is the channel number of high input at side 1, c1 is the channel number of switch signal input at side 1. NSi8121/ NSi8122: IDD1 = 0.87 +1.26*b1+0.63*c1+ VDD1*f* CL *c2*10-9 IDD2 = 0.87 +1.26*b2+0.63*c2+ VDD1*f* CL *c1*10-9 When b1 is the channel number of high input at side 1, c1 is the channel number of switch signal input at side 1, b2 is the channel number of high input at side 2, c2 is the channel number of switch signal input at side 2. Novosense Confidential Page 13 NSi8120/NSi8121/NSi8122 6.0 PACKAGE INFORMATION VDD1 1 8 VDD2 VDD1 1 8 VDD2 INA 2 7 OUTA OUTA 2 7 INA INB 3 6 OUTB INB 3 6 OUTB 5 GND2 GND1 4 NSi8121 5 GND2 GND1 4 NSi8120 Figure 6.1 NSi8120N Package Figure 6.2 NSi8121N Package VDD1 1 8 VDD2 INA 2 7 OUTA OUTB 3 GND1 4 6 INB NSi8122 5 GND2 Figure 6.3 NSi8122N Package Figure 6.4 SOIC8 Package Shape and Dimension in millimeters (inches) Table6.1 NSi8120N/ NSi8121N/ NSi8122N Pin Configuration and Description NSi8120N PIN NO. NSi8121N PIN NO. NSi8122N PIN NO. SYMBOL FUNCTION 1 1 1 VDD1 Power Supply for Isolator Side 1 2 7 2 INA Logic Input A 3 3 6 INB Logic Input B 4 4 4 GND1 Ground 1, the ground reference for Isolator Side 1 Novosense Confidential Page 14 NSi8120/NSi8121/NSi8122 5 5 5 GND2 Ground 2, the ground reference for Isolator Side 2 6 6 3 OUTB Logic Output B 7 2 7 OUTA Logic Output A 8 8 8 VDD2 Power Supply for Isolator Side 2 GND1 1 16 GND2 NC 2 15 NC GND1 1 16 GND2 NC 2 15 NC VDD1 3 14 VDD2 VDD1 3 14 VDD2 INA 4 13 OUTA OUTA 4 13 INA INB 5 12 OUTB INB 5 12 OUTB NC 6 11 NC NC 6 11 NC GND1 7 10 NC GND1 7 10 NC NC 8 NSi8120 9 GND2 Figure 6.5 NSi8120W Package NC 8 NSi8121 Figure 6.6 NSi8121W Package GND1 1 16 GND2 NC 2 15 NC VDD1 3 14 VDD2 INA 4 13 OUTA OUTB 5 12 INB NC 6 11 NC GND1 7 10 NC NC 8 NSi8122 9 GND2 Figure 6.7 NSi8122W Package Novosense Confidential Page 15 9 GND2 NSi8120/NSi8121/NSi8122 Figure 6.8 WB SOIC16 Package Shape and Dimension in millimeters and (inches) Table 6.2 NSi8120W/ NSi8121W/ NSi8122W Pin Configuration and Description NSi8120W PIN NO. NSi8121W PIN NO. NSi8122W PIN NO. SYMBOL FUNCTION 1 1 1 GND1 Ground 1, the ground reference for Isolator Side 1 2 2 2 NC No Connection. 3 3 3 VDD1 Power Supply for Isolator Side 1 4 13 4 INA Logic Input A 5 5 12 INB Logic Input B 6 6 6 NC No Connection. 7 7 7 GND1 Ground 1, the ground reference for Isolator Side 1 8 8 8 NC No Connection. 9 9 9 GND2 Ground 2, the ground reference for Isolator Side 2 10 10 10 NC No Connection. 11 11 11 NC No Connection. 12 12 5 OUTB Logic Output A 13 4 13 OUTA Logic Output B 14 14 14 NC No Connection. 15 15 15 VDD2 Power Supply for Isolator Side 2 16 16 16 GND2 Ground 2, the ground reference for Isolator Side 2 Novosense Confidential Page 16 NSi8120/NSi8121/NSi8122 7.0 ORDER INFORMATION Part No. Isolation Rating(kV) NSi8120N0 NSi8120N1 NSi8121N0 NSi8121N1 NSi8122N0 NSi8122N1 NSi8120W0 NSi8120W1 NSi8121W0 NSi8121W1 NSi8122W0 NSi8122W1 NSi8120N0Q NSi8120N1Q NSi8121N0Q NSi8121N1Q NSi8122N0Q NSi8122N1Q 3.75 3.75 3.75 3.75 3.75 3.75 5 5 5 5 5 5 3.75 3.75 3.75 3.75 3.75 3.75 Number of side 1 inputs 2 2 1 1 1 1 2 2 1 1 1 1 2 2 1 1 1 1 Number of side 2 inputs 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 Max Data Rate (Mbps) 150 150 150 150 150 150 150 150 150 150 150 150 150 150 150 150 150 150 Default Output State Low High Low High Low High Low High Low High Low High Low High Low High Low High Temperature Automotive Package -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ -40 to 125℃ NO NO NO NO NO NO NO NO NO NO NO NO YES YES YES YES YES YES SOIC8 SOIC8 SOIC8 SOIC8 SOIC8 SOIC8 WB SOIC16 WB SOIC16 WB SOIC16 WB SOIC16 WB SOIC16 WB SOIC16 SOIC8 SOIC8 SOIC8 SOIC8 SOIC8 SOIC8 Part Number Rule: NSi(81)(2)(1)(N)(1)(Q) Series Number Total Channel Amount: N=N Channels N=1,2,4… N=0: I2C Part Reverse Channel Amount: N=N Channels N=0,1,2… Q = Automotive version Fail-Safe Output State: 0 = Logic Low 1 = Logic High Package Type: N= NB SOIC8 W= WB SOIC16 8.0 REVISION HISTORY Revision 1.0 1.3 Description Date 2017/11/15 2018/8/21 Novosense Confidential Page 17
NSI8121N1 价格&库存

很抱歉,暂时无法提供与“NSI8121N1”相匹配的价格&库存,您可以联系我们找货

免费人工找货
NSI8121N1

    库存:11810

    NSI8121N1
      •  国内价格
      • 129+1.88552

      库存:129

      NSI8121N1
      •  国内价格
      • 1+2.29901
      • 10+2.10901
      • 30+2.07101
      • 100+1.95701

      库存:1591