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NCA9545-DTSR

NCA9545-DTSR

  • 厂商:

    NOVOSENSE(纳芯微)

  • 封装:

    TSSOP20_6.5X4.4MM

  • 描述:

    带中断逻辑和复位的4通道I2C总线开关

  • 数据手册
  • 价格&库存
NCA9545-DTSR 数据手册
NCA9545 4-channel I2C-bus switch with interrupt logic and reset Datasheet (EN) 1.1 Product Overview  Allows Voltage-Level Translation Between 1.8-V, 2.5-V, 3.3V, and 5-V Buses The NCA9545 is a quad bidirectional translating switch controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCn/SDn channel or combination of channels can be selected, determined by the contents of the programmable control register. Four interrupt inputs (INT3–INT0), one for each of the downstream pairs, are provided. One interrupt (INT) output acts as an AND of the four interrupt inputs.  No Glitch on Power-Up An active-low reset (RESET) input allows the NCA9545 to recover from a situation in which one of the downstream I2C buses is stuck in a low state. Pulling RESET low resets the I2C state machine and causes all the channels to be deselected, as does the internal power-on reset function.  ESD Protection Exceeds JESD 22 The pass gates of the switches are constructed such that the VCC terminal can be used to limit the maximum high voltage, which will be passed by the NCA9545. This allows the use of different bus voltages on each pair, so that 1.8V, 2.5-V, or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O terminals are 5.5 V tolerant. Key Features  1-of-4 Bidirectional Translating Switches  Supports Hot Insertion  Low Standby Current  Operating Power-Supply Voltage Range of 2.3 V to 5.5 V  5.5 V Tolerant Inputs  0 to 400-kHz Clock Frequency  Latch-Up Performance Exceeds 100 mA per JESD 78 – 2000-V Human-Body Model (A114-A) – 1000-V Charged-Device Model (C101) Applications  Servers  Routers (Telecom Switching Equipment)  Factory Automation  Products With I2C Slave Address Conflicts (e.g. Multiple, Identical Temp Sensors) Device Information Part Number NCA9545_DTSR Package TSSOP20 Body Size 6.5mm*4.5mm  I2C Bus and SMBus Compatible  Four Active-Low Interrupt Inputs  Active-Low Interrupt Output  Active-Low Reset Input  Two Address Terminals, Allowing up to Four Devices on the I2C Bus  Channel Selection via I2C Bus, in Any Combination  Power-Up With All Switch Channels Deselected  Low RON Switches Functional Block Diagrams A0 1 20 VCC A1 2 19 SDA 3 18 SCL INT0 4 17 INT RESET SD0 5 NCA9545 16 SC3 SC0 6 15 SD3 INT1 7 14 INT3 SD1 8 13 SC2 SC1 9 12 SD2 GND 10 11 INT2 Figure 1. NCA9545 Block Diagram NCA9545 Datasheet (EN) 1.1 Index 1. PIN CONFIGURATION AND FUNCTIONS ............................................................................................................................... 3 2. ABSOLUTE MAXIMUM RATINGS .......................................................................................................................................... 4 3. RECOMMENDED OPERATING CONDITIONS ......................................................................................................................... 4 4. THERMAL INFORMATION .................................................................................................................................................... 4 5. SPECIFICATIONS................................................................................................................................................................... 5 5.1. 5.2. 5.3. ELECTRICAL CHARACTERISTICS .......................................................................................................................................... 5 DYNAMIC CHARACTERISTICS ............................................................................................................................................ 6 PARAMETER MEASUREMENT INFORMATION ........................................................................................................................ 7 6. DETAILED DESCRIPTION ....................................................................................................................................................... 9 6.1. 6.2. 6.3. 6.4. 6.5. 6.6. 6.7. 6.8. 6.9. 6.10. 6.11. 6.12. 6.13. OVERVIEW ................................................................................................................................................................... 9 FUNCTIONAL BLOCK DIAGRAM ......................................................................................................................................... 9 FEATURE DESCRIPTION.................................................................................................................................................. 10 DEVICE FUNCTIONAL MODES ......................................................................................................................................... 10 RESET INPUT ............................................................................................................................................................. 10 POWER-ON RESET ....................................................................................................................................................... 10 PROGRAMMING .......................................................................................................................................................... 10 I2C INTERFACE ............................................................................................................................................................ 10 CONTROL REGISTER ..................................................................................................................................................... 12 DEVICE ADDRESS ..................................................................................................................................................... 12 CONTROL REGISTER DESCRIPTION ................................................................................................................................ 12 CONTROL REGISTER DEFINITION .................................................................................................................................. 12 INTERRUPT HANDLING .............................................................................................................................................. 13 7. APPLICATION AND IMPLEMENTATION ............................................................................................................................... 13 7.1. 7.2. 7.3. 7.4. TYPICAL APPLICATION................................................................................................................................................... 13 DESIGN REQUIREMENTS ................................................................................................................................................ 14 DETAILED DESIGN PROCEDURE ....................................................................................................................................... 14 NCA9545 APPLICATION CURVES .................................................................................................................................... 15 8. LAYOUT ............................................................................................................................................................................. 15 8.1. LAYOUT GUIDELINES..................................................................................................................................................... 15 9. PACKAGE INFORMATION ................................................................................................................................................... 16 10. ORDER INFORMATION ..................................................................................................................................................... 16 11. DOCUMENTATION SUPPORT ........................................................................................................................................... 16 12. TAPE AND REEL INFORMATION ........................................................................................................................................ 17 13. REVISION HISTORY .......................................................................................................................................................... 18 Copyright © 2019, NOVOSENSE Page 2 NCA9545 Datasheet (EN) 1.1 1. Pin Configuration and Functions A0 1 20 VCC A1 2 19 SDA 3 18 SCL INT0 4 17 INT RESET SD0 5 NCA9545 16 SC3 SC0 6 15 SD3 INT1 7 14 INT3 SD1 8 13 SC2 SC1 9 12 SD2 GND 10 11 INT2 Figure 1.1 NCA9545 Package Table 1.1 Pin Configuration and Description Symbol Pin Description A0 1 Address input 0. Connect directly to VCC or ground. A1 2 Address input 1. Connect directly to VCC or ground. RESET 3 Active-low reset input. Connect to VCC or VDPUM1 through a pull-up resistor if not used. INT0 4 Active-low interrupt input 0. Connect to VDPU01 through a pull-up resistor. SD0 5 Serial data 0. Connect to VDPU01 through a pul-up resistor. SC0 6 Serial clock 0. Connect to VDPU01 through a pull-up resistor. INT1 7 Active-low interrupt input 1. Connect to VDPU11 through a pull-up resistor. SD1 8 Serial data 1. Connect to VDPU11 through a pull-up resistor. SC1 9 Serial clock 1. Connect to VDPU11 through a pull-up resistor. GND 10 Ground INT2 11 Active-low interrupt input 2. Connect to VDPU21 through a pull-up resistor. SD2 12 Serial data 2. Connect to VDPU21 through a pull-up resistor. SC2 13 Serial clock 2. Connect to VDPU21 through a pull-up resistor. INT3 14 Active-low interrupt input 3. Connect to VDPU31 through a pull-up resistor. SD3 15 Serial data 3. Connect to VDPU31 through a pull-up resistor. SC3 16 Serial clock 3. Connect to VDPU31 through a pull-up resistor. INT 17 Active-low interrupt output. Connect to VDPUM1 through a pull-up resistor. SCL 18 Serial clock line. Connect to VDPUM1 through a pull-up resistor. SDA 19 Serial data line. Connect to VDPUM1 through a pull-up resistor. VCC 20 Supply power VDPUX is the pull-up reference voltage for the associated data line. VDPUM is the master I2C master reference voltage and VDPU0–VDPU3 are the slave channel reference voltages. 1 Copyright © 2019, NOVOSENSE Page 3 NCA9545 Datasheet (EN) 1.1 2. Absolute Maximum Ratings Parameters Symbol Min Max VCC -0.5 7 V VI/VO -0.5 7 V Supply Voltage Input/output Voltage Unit Input current II ±25 mA Output current IO ±25 mA Continuous current through VCC or GND ICC ±100 mA Operating Temperature Topr -40 85 ℃ Storage Temperature Tstg -40 150 ℃ HBM ±2000 V CDM ±1000 V Conditions VO
NCA9545-DTSR 价格&库存

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NCA9545-DTSR
  •  国内价格
  • 1+2.85600
  • 10+2.65200
  • 30+2.61120
  • 100+2.48880

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