TP1961-TR

TP1961/TP1962/TP1964 7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators     Features  Ultra-Fast, 7ns Propagation Delay  Ideal for +3V and +5V Single-Supply Applications  Offset Voltage: ± 10.0 mV Maximum  Rail to Rail Input and Output  7.5mV Internal Hysteresis for Clean Switching  Push-Pull, CMOS/TTL Compatible Output  Input Common-Mode Range Extends 300 mV  No Phase Reversal for Overdriven Inputs  Shut-down Function (TP1961N Only)  Supply Voltage: 2.5V to 5.5V  Green, Space-Saving SOT23-5 Package Available Applications  High-speed Line or Digital Line Receivers  High Speed Sampling Circuits  Peak and Zero-crossing Detectors  Threshold Detectors/Discriminators  Sensing at Ground or Supply Line  Logic Level Shifting or Translation  Window Comparators  IR Receivers  Clock and Data Signal Restoration  Telecom, Portable Communications Description The TP1961/TP1962/TP1964 are low-power, ultra-high-speed comparators with internal hysteresis. These devices are optimized for single +3V or +5V operation. The input common-mode range extends 300mV beyond the rail, and the outputs can sink or source 4mA to within 80mV of GND and VCC. Propagation delay is 7ns (50mV overdrive), while supply current is 1mA per comparator. The internal input hysteresis eliminates output switching due to internal input noise voltage, reducing current draw. The push-pull output supports rail-to-rail output swing, and interfaces with CMOS/TTL logic. The output toggle frequency can reach a typical of 50 MHz while limiting supply current surges and dynamic power consumption during switching. The TP1961 single comparators are available in shout-down function, and the tiny SOT23 package for space-conservative designs. All devices are specified for the temperature range of –40°C to +125°C. 3PEAK and the 3PEAK logo are registered trademarks of 3PEAK INCORPORATED. All other trademarks are the property of their respective owners. Pin Configuration (Top View) The TP1961 Comparator in IR Receivers www.3peakic.com.cn 1  TP1961/TP1962/TP1964 7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators     Revision History Table 1. Date Revision Notes 2020/3/20  Rev.B.5  Update thermal information  www.3peakic.com.cn 2  TP1961/ TP1962/TP1964          7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators Order Information Model Name TP1961 TP1962 TP1964 Order Number Package Transport Media, Quantity Marking Information TP1961-TR 5-Pin SOT23 Tape and Reel, 3000 961 TP1961-CR 5-Pin SC70 Tape and Reel, 3000 961 TP1962-SR 8-Pin SOIC Tape and Reel, 4000 TP1962 TP1962-VR 8-Pin MSOP Tape and Reel, 3000 TP1962 TP1962-FR 8-Pin DFN Tape and Reel, 3000 962 TP1964-SR 14-Pin SOIC Tape and Reel, 2500 TP1964 TP1964-TR 14-Pin TSSOP Tape and Reel, 3000 TP1964 Absolute Maximum Ratings Note 1 Supply Voltage: V+ – V–....................................7.0V – + Input Voltage............................. V – 0.3 to V + 0.3 Operating Temperature Range.......–40°C to 125°C Maximum Junction Temperature................... 150°C Note 2 ..........................±20mA Storage Temperature Range.......... –65°C to 150°C Output Current: OUT.................................... ±160mA Lead Temperature (Soldering, 10 sec) ......... 260°C Input Current: +IN, –IN, Output Short-Circuit Duration Note 3…............. Infinite Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the power supply, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads. ESD, Electrostatic Discharge Protection Symbol 3      Parameter Condition Minimum Level Unit HBM Human Body Model ESD ANSI/ESDA/JEDEC JS-001 2 kV CDM Charged Device Model ESD ANSI/ESDA/JEDEC JS-002 1 kV www.3peakic.com.cn TP1961/ TP1962/TP1964          7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators Thermal Information Package Type θJA θJC Unit 5-Pin SOT23 89.1 52.0 ℃/W Electrical Characteristics The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 27°C. VDD = +2.5V to +5.5V, VIN+ = VDD, VIN- = 1.2V, RPU=10kΩ, CL =15pF. SYMB OL PARAMETER VDD Supply Voltage VOS VOS TC VHYST Input Offset Voltage Input Offset Voltage Drift Input Hysteresis Voltage Input Capacitance PSRR Note 1 CIN VCM VCM = 1.2V Note 1 Input Bias Current Input Offset Current Input Resistance MIN ● Note 1 IB IOS RIN CMRR CONDITIONS Common Mode Rejection Ratio Common-mode Input Voltage Range Power Supply Rejection Ratio High-Level Output Voltage VOL Low-Level Output Voltage ISC tR Output Short-Circuit Current Quiescent Current per Comparator Rising Time tF Falling Time IQ TPD+ TPDTPDSKEW Propagation Delay (Low-to-High)Note2 Propagation Delay (High-to-Low) Note2 Propagation Delay Skew 2.5 -10 ±2 MAX UNIT S 5.5 V +10 mV VCM = 1.2V 0.3 μV/°C VCM = 1.2V 7.5 mV VCM = 1.2V pA pA GΩ Differential Common Mode 6 4 > 100 2.7 1 VCM = VSS to VDD 110 dB IOUT=0.4mA, VID = 500 mV IOUT=-4mA, VID = 500 mV IOUT=-0.4mA, VID = 500 mV Sink or source current Overdrive=100mV, =1.2V VIN- Overdrive=100mV, =1.2V VIN- Overdrive=100mV, =1.2V VIN- ● ● VDD-0.3 5 VDD-0.1 5 pF VDD+0. 1 VSS-0.1 IOUT=4mA, VID = 500 mV VOH TYP V 110 dB VDD-0.2 V VDD-0.0 5 80 250 mV 10 100 mV 100 mA 2.4 mA 1 ns 1 ns 7 19 ns 7 19 ns 0.4 ns Note 1: The input offset voltage is the average of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. Note 2: Propagation Delay Skew is defined as: tPD-SKEW = tPD+ - tPD-. 4  www.3peakic.com.cn          TP1961/ TP1962/TP1964 7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators Typical Performance Characteristics VS = 5V, CL = 10pF, and VCM = VS/2, TA = 25°C, unless otherwise specified. Propagation Delay (tPD+) Propagation Delay (tPD+) Propagation Delay (tPD) 5      www.3peakic.com.cn TP1961/ TP1962/TP1964          7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators Pin Functions –IN: Inverting Input of the Comparator. Voltage range of this pin can go from V– – 0.3V to V+ + 0.3V. +IN: Non-Inverting Input of Comparator. This pin has the same voltage range as –IN. V+ (VDD): Positive Power Supply. Typically the voltage is from 2.5V to 5.5V. Split supplies are possible as long as the voltage between V+ and V– is between 2.5V and 5.5V. A bypass capacitor of 0.1μF as close to the part as possible should be used between power supply pins or between supply pins and ground. N/C: No Connection. V– (VSS): Negative Power Supply. It is normally tied to ground. It can also be tied to a voltage other than ground as long as the voltage between V+ and V– is from 2.5V to 5.5V. If it is not connected to ground, bypass it with a capacitor of 0.1μF as close to the part as possible. OUT: Comparator Output. The voltage range extends to within millivolts of each supply rail. Operation The TP1961/TP1962/TP1964 single-supply comparators feature internal hysteresis, ultra-high speed operation, and low power consumption. Their outputs are guaranteed to pull within 0.52V of either rail without external pull-up or pull-down circuitry. Beyond the Rails 6  input voltage range and low-voltage, single supply operation make these devices ideal for portable equipment. These comparators all interface directly to CMOS logic. www.3peakic.com.cn TP1961/ TP1962/TP1964          7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators Applications Information Inputs The TP196x comparator family uses CMOS transistors at the input which prevent phase inversion when the input pins exceed the supply voltages. Figure 1 shows an input voltage exceeding both supplies with no resulting phase inversion. 6 Input Voltage Vout Voltage (mV) 4 2 0 Output Voltage VDD =5V -2 Time (100μs/div) Figure 1. Comparator Response to Input Voltage The electrostatic discharge (ESD) protection input structure of two back-to-back diodes and 1kΩ series resistors are used to limit the differential input voltage applied to the precision input of the comparator by clamping input voltages that exceed supply voltages, as shown in Figure 2. Large differential voltages exceeding the supply voltage should be avoided to prevent damage to the input stage. +In -In 1KΩ 1KΩ Core Chip Figure 2. Equivalent Input Structure Internal Hysteresis Most high-speed comparators oscillate in the linear region because of noise or undesired parasitic feedback. This tends to occur when the voltage on one input is at or equal to the voltage on the other input. To counter the parasitic effects and noise, the TP196x implements internal hysteresis. 7      www.3peakic.com.cn TP1961/ TP1962/TP1964          7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators The hysteresis in a comparator creates two trip points: one for the rising input voltage and one for the falling input voltage. The difference between the trip points is the hysteresis. When the comparator’s input voltages are equal, the hysteresis effectively causes one comparator input voltage to move quickly past the other, thus taking the input out of the region where oscillation occurs. Figure 3 illustrates the case where IN- is fixed and IN+ is varied. If the inputs were reversed, the figure would look the same, except the output would be inverted. Vi Vtr Hysteresis Band Vin- Vtf Vhyst=Vtr-Vtf Vtr+Vtf Vos= 2 -VinTime VDD Vi Vtr Vtf Time VDD 0 Vhyst=Vtr-Vtf Vtr+Vtf Vos= 2 -Vin- Hysteresis Band Vin- 0 Non-Inverting Comparator Output Inverting Comparator Output Figure 3. Comparator’s hysteresis and offset External Hysteresis Greater flexibility in selecting hysteresis is achieved by using external resistors. Hysteresis reduces output chattering when one input is slowly moving past the other. It also helps in systems where it is best not to cycle between high and low states too frequently (e.g., air conditioner thermostatic control). Output chatter also increases the dynamic supply current. Non-Inverting Comparator with Hysteresis A non-inverting comparator with hysteresis requires a two-resistor network, as shown in Figure 4 and a voltage reference (Vr) at the inverting input. Figure 4. Non-Inverting Configuration with Hysteresis When Vi is low, the output is also low. For the output to switch from low to high, Vi must rise up to Vtr. When Vi is high, the output is also high. In order for the comparator to switch back to a low state, Vi must equal Vtf before the non-inverting input V+ is again equal to Vr. Vr  R2 R1  R 2 Vtr Vr  (VDD  Vtf ) Vtr  8  R1  Vtf R1  R 2 R1  R 2 Vr R2 www.3peakic.com.cn          TP1961/ TP1962/TP1964 7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators Vtf  R1  R 2 R Vr  1 VDD R2 R2 Vhyst  Vtr  Vtf  R1 VDD R2 Inverting Comparator with Hysteresis The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator supply voltage (VDD), as shown in Figure 5. Figure 5. Inverting Configuration with Hysteresis When Vi is greater than V+, the output voltage is low. In this case, the three network resistors can be presented as paralleled resistor R2 || R3 in series with R1. When Vi at the inverting input is less than V+, the output voltage is high. The three network resistors can be represented as R1 ||R3 in series with R2. R2 Vtr  Vtf  R1 || R 3  R 2 VDD R 2 || R3 VDD R 2 || R3  R1 Vhyst  Vtr  Vtf  R1 || R 2 R1 || R 2  R3 VDD Low Input Bias Current The TP196x family is a CMOS comparator family and features very low input bias current in pA range. The low input bias current allows the comparators to be used in applications with high resistance sources. Care must be taken to minimize PCB Surface Leakage. See below section on “PCB Surface Leakage” for more details. PCB Surface Leakage 9      www.3peakic.com.cn TP1961/ TP1962/TP1964          7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012Ω. A 5V difference would cause 5pA of current to flow, which is greater than the TP196x’s input bias current at +27°C (±6pA, typical). It is recommended to use multi-layer PCB layout and route the comparator’s -IN and +IN signal under the PCB surface. The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 6 for Inverting configuration application. 1. For Non-Inverting Configuration: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the same reference as the comparator. 2. For Inverting Configuration: a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the comparator (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface. Figure 6. Example Guard Ring Layout for Inverting Comparator Ground Sensing and Rail to Rail Output The TP196x family implements a rail-to-rail topology that is capable of swinging to within 10mV of either rail. Since the inputs can go 300mV beyond either rail, the comparator can easily perform ‘true ground’ sensing. The maximum output current is a function of total supply voltage. As the supply voltage of the comparator increases, the output current capability also increases. Attention must be paid to keep the junction temperature of the IC below 150°C when the output is in continuous short-circuit condition. The output of the amplifier has reverse-biased ESD diodes connected to each supply. The output should not be forced more than 0.5V beyond either supply, otherwise current will flow through these diodes. ESD The TP196x family has reverse-biased ESD protection diodes on all inputs and output. Input and output pins can not be biased more than 300mV beyond either supply rail. Power Supply Layout and Bypass The TP196x family’s power supply pin should have a local bypass capacitor (i.e., 0.01μF to 0.1μF) within 2mm for good high frequency performance. It can also use a bulk capacitor (i.e., 1μF or larger) within 100mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. Good ground layout improves performance by decreasing the amount of stray capacitance and noise at the comparator’s inputs and outputs. To decrease stray capacitance, minimize PCB lengths and resistor leads, and place external components as close to the comparator’ pins as possible. Proper Board Layout The TP196x family is a series of fast-switching, high-speed comparator and requires high-speed layout considerations. For best results, the following layout guidelines should be followed: 1. Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane. 2. Place a decoupling capacitor (0.1μF ceramic, surface-mount capacitor) as close as possible to supply. 10  www.3peakic.com.cn TP1961/ TP1962/TP1964          7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators 3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback around the comparator. Keep inputs away from the output. 4. Solder the device directly to the PCB rather than using a socket. 5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less) placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some degradation to propagation delay when the impedance is low. The topside ground plane should be placed between the output and inputs. 6. The ground pin ground trace should run under the device up to the bypass capacitor, thus shielding the inputs from the outputs. Typical Applications IR Receiver The TP1961 is an ideal candidate to be used as an infrared receiver shown in Figure . The infrared photo diode creates a current relative to the amount of infrared light present. The current creates a voltage across RD. When this voltage level cross the voltage applied by the voltage divider to the inverting input, the output transitions. Optional Ro provides additional hysteresis for noise immunity. VDD Ro R1 TP1961 Vo R2 RD Figure 7. IR Receiver Relaxation Oscillator A relaxation oscillator using TP1961 is shown in Figure . Resistors R1 and R2 set the bias point at the comparator's inverting input. The period of oscillator is set by the time constant of R4 and C1. The maximum frequency is limited by the large signal propagation delay of the comparator. TP1961’s low propagation delay guarantees the high frequency oscillation. If the inverted input (VC1) is lower than the non-inverting input (VA), the output is high which charges C1 through R4 until VC1 is equal to VA. The value of VA at this point is VA1  VDD  R 2 R 1 || R 3  R 2 At this point the comparator switches pulling down the output to the negative rail. The value of VA at this point is VA2  VDD  R 2 || R 3 R 1  R 2 || R 3 If R1=R2=R3, then VA1=2VDD /3, and VA2= VDD/3 11      www.3peakic.com.cn TP1961/ TP1962/TP1964          7ns, 1/2/4, Ultra-High-Speed, +3V/+5V, Beyond-the-Rails Comparators The capacitor C1 now discharges through R4, and the voltage VC decreases till it is equal to VA2, at which point the comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes to discharge C1 from 2VDD/3 to VDD/3. Hence the frequency is: Freq  1 2  ln2  R 4  C1 VDD R3 VO R1 VA VC1 TP1961 t Vo VC1 R2 C1 R4 2/3VDD 1/3VDD R1=R2=R3 t Figure 8. Relaxation Oscillator Windowed Comparator Figure shows one approach to designing a windowed comparator using a single TP1962 chip. Choose different thresholds by changing the values of R1, R2, and R3. OutA provides an active-low undervoltage indication, and OutB gives an active-low overvoltage indication. ANDing the two outputs provides an active-high, power-good signal. When input voltage Vi reaches the overvoltage threshold VOH, the OutB gets low. Once Vi falls to the undervoltage threshold VUH, the OutA gets low. When VUH