NSi8100/NSi8101: High Reliability Bidire
ctional I2C Isolators
NOVOSENSE
Datasheet (EN) 1.6
Safety Regulatory Approvals (pending)
Product Overview
The NSi810x devices are high reliability
bidirectional isolators that are compatible with
I2C interface. The NSi810x devices are AECQ100 qualified. The NSi810x devices are safety
certified by UL1577 support several insulation
withstand voltages (3.75kVrms, 5kVrms), while
providing high electromagnetic immunity and
low emissions at low power consumption. The
I2C clock of the NSi810x is up to 2MHz, and the
common-mode transient immunity (CMTI) is up
to 150kV/us. Wide supply voltage of the NSi810x
device support to connect with most digital
interface directly, easy to do the level shift. High
system level EMC performance enhance
reliability and stability of use.
Key Features
Up to 5000VRMS Insulation voltage
I C Clock rate: up to 2MHz
Power supply voltage: 2.5V to 5.5V
AEC-Q100 Grade 1 qualified
Suitable for hot swap applications
High CMTI: 150kV/us
Chip level ESD: HBM: ±6kV
UL recognition: up to 5000VRMS for 1 minute
per UL1577
CQC certification per GB4943.1-2011
CSA component notice 5A approval
IEC60950-1 standard
DIN V VDE V 0884-10(VDE V 0884-10):
2006-12
Applications
Power over Ethernet
Isolated I2C, SMBus, or PMBus interface
I2C level shifting
Battery Management
Functional Block Diagrams
2
8 VDD2
VDD1 1
8 VDD2
7 SDA2
SDA1 2
7 SDA2
SCL1 3
6 SCL2
SCL1 3
6 SCL2
GND1 4
5 GND2
GND1 4
NSi8100N
GND1 1
NC 2
High system level EMC performance:
Enhanced system level ESD, EFT, Surge
immunity
Isolation Barrier Life: >60 years
Operation temperature: -40℃~125℃
RoHS-compliant packages:
SOIC-8 narrow body
SOIC-16 wide body
VDD1 1
SDA1 2
16 GND2
GND11
16 GND2
15 NC
NC 2
15 NC
14 VDD2
VDD1 3
13 NC
NC 4
5 GND2
NSi8101N
14 VDD2
VDD1 3
13 NC
NC 4
SDA1 5
12 SDA2
SDA1 5
12 SDA2
SCL1 6
11 SCL2
SCL1 6
11 SCL2
GND1 7
NC 8
NSi8100W
10 NC
GND17
9
NC 8
GND2
10 NC
9
NSi8101W
Figure1. NSi810x Functional Block Diagram
Novosense Confidential Page 1
GND2
NSi8100/NSi8101
Index
1.0
ABSOLUTE MAXIMUM RATINGS .............................................................................................................................. 3
2.0
SPECIFICATIONS ........................................................................................................................................................... 3
2.1.
2.2.
2.3.
3.0
3.1.
3.2.
3.3.
ELECTRICAL CHARACTERISTICS........................................................................................................................................ 3
TYPICAL PERFORMANCE CHARACTERISTICS............................................................................................................. 7
PARAMETER MEASUREMENT INFORMATION ..................................................................................................................... 8
HIGH VOLTAGE FEATURE DESCRIPTION .............................................................................................................. 8
INSULATION AND SAFETY RELATED SPECIFICATIONS ......................................................................................................... 8
DIN VDE V 0884-10 (VDE V 0884-10) INSULATION CHARATERISTICS ............................................................................... 9
REGULATORY INFORMATION ........................................................................................................................................... 10
4.0
FUNCTION DESCRIPTION ..........................................................................................................................................11
5.0
APPLICATION NOTE ................................................................................................................................................... 12
5.1.
PCB LAYOUT ................................................................................................................................................................. 12
6.0
PACKAGE INFORMATION ......................................................................................................................................... 13
7.0
ORDER INFORMATION .............................................................................................................................................. 15
8.0
REVISION HISTORY .................................................................................................................................................... 15
Novosense Confidential Page 2
NSi8100/NSi8101
1.0 ABSOLUTE MAXIMUM RATINGS
Parameters
Symbol
Min
Power Supply Voltage
VDD1,
VDD2
-0.5
6.5
V
Maximum Input
Voltage
SDA1, SDA2,
SCL1, SCL2
-0.4
VDD+0.41
V
Maximum Input Pulse
Voltage
SDA1, SDA2,
SCL1, SCL2
-0.8
VDD+0.8
V
Common-Mode
Transients
CMTI
Output current
Io
Typ
Max
±150
-15
Comments
Pulse width
should be less
than 100ns, and
the duty cycle
should be less
than 10%
kV/us
15
mA
5.3
kV
Maximum Surge
Isolation Voltage
VIOSM
Operating Temperature
Topr
-40
125
℃
Storage Temperature
Tstg
-40
150
℃
HBM
±6000
V
CDM
±2000
V
Electrostatic discharge
1
Unit
The maximum voltage must not exceed 6.5V.
2.0 SPECIFICATIONS
2.1. ELECTRICAL CHARACTERISTICS
(VDD1=2.5V~5.5V, VDD2=2.5V~5.5V, Ta=-40℃ to 125℃. Unless otherwise noted, Typical values are at VDD1 = 5V,
VDD2 = 5V, Ta = 25℃)
Parameters
Symbol
Power on Reset
VDDPOR
Min
Typ
Max
Unit
Comments
2.2
V
POR threshold as during
power-up
VDD HYS
0.1
V
POR threshold Hysteresis
Start Up Time after POR
trbs
40
usec
Common Mode Transient
Immunity
CMTI
±100
VILT1
400
±150
kV/us
Side 1 Logic Level
Input Threshold
VIHT1
mV
600
mV
Novosense Confidential Page 3
Input Threshold at rising
edge
NSi8100/NSi8101
VIT_HYS1
100
Low Level Output Voltage
VOL1
650
Low-level output voltage to
high-level input voltage
threshold difference
ΔVOIT1
70
800
mV
Input Threshold
Hysteresis
mV
IOL ≤ 4mA
mV
Side 2 Logic Level
Input Threshold
VILT2
1.6
V
Input Threshold at rising
edge
VIT_HYS2
0.4
V
Input Threshold
Hysteresis
High Level Input Voltage
VIH2
2.0
V
Low Level Input Voltage
VIL2
0.8
V
Low Level Output Voltage
VOL
0.5
V
IOL ≤ 30mA
(VDD1=5V±10%, VDD2=5V±10%, Ta=-40℃ to 125℃. Unless otherwise noted, Typical values are at VDD1 = 5V, VDD2
= 5V, Ta = 25℃)
Parameters
Symbol
Min
Typ
Max
Unit
Comments
IDD1(Q0)
5.10
7.5
mA
All Input 0V
IDD2(Q0)
3.96
5.7
mA
IDD1(Q1)
2.52
3.6
mA
IDD2(Q1)
1.78
2.5
mA
IDD1(2M)
3.83
5.7
mA
All Input with 2MHz,
IDD2(2M)
2.78
4.2
mA
CL=15pF
IDD1(Q0)
2.85
4.2
mA
All Input 0V
IDD2(Q0)
2.66
4
mA
IDD1(Q1)
2.42
3.6
mA
IDD2(Q1)
1.57
2.4
mA
IDD1(2M)
2.89
4.3
mA
All Input with 2MHz,
IDD2(2M)
2.64
4
mA
CL=15pF
2
MHz
NSi8100
All Input at supply
Supply current
NSi8101
Clock rate
Propagation Delay
DR
t PLH12
0
24.8
37.2
ns
All Input at supply
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
Novosense Confidential Page 4
NSi8100/NSi8101
t PHL12
32.8
49.2
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
t PLH21
24
36
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
t PHL21
38
57
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
Pulse Width Distortion
Falling Time
PWD12
8
12
ns
|t PHL12 – t PLH12 |
PWD21
14
21
ns
|t PHL21 – t PLH21 |
tf1
10.6
15.9
ns
CL = 30pF
tf2
22.8
34.2
ns
CL = 300pF
(VDD1=3.3V±10%, VDD2=3.3V±10%, Ta=-40℃ to 125℃. Unless otherwise noted, Typical values are at VDD1 = 3.3V,
VDD2 = 3.3V, Ta = 25℃)
Parameters
Symbol
Min
Typ
Max
Unit
Comments
IDD1(Q0)
4.96
7.4
mA
All Input 0V
IDD2(Q0)
3.85
5.6
mA
IDD1(Q1)
2.40
3.5
mA
IDD2(Q1)
1.68
2.4
mA
IDD1(2M)
3.69
5.6
mA
All Input with 2MHz,
IDD2(2M)
2.67
4.2
mA
CL=15pF
IDD1(Q0)
2.79
4.2
mA
All Input 0V
IDD2(Q0)
2.58
3.9
mA
IDD1(Q1)
2.60
3.9
mA
IDD2(Q1)
1.50
2.3
mA
IDD1(2M)
2.65
4
mA
All Input with 2MHz,
IDD2(2M)
2.40
3.6
mA
CL=15pF
2
MHz
NSi8100
All Input at supply
Supply current
NSi8101
Clock rate
Propagation Delay
DR
t PLH12
0
29
43.5
ns
All Input at supply
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
Novosense Confidential Page 5
NSi8100/NSi8101
t PHL12
39.8
59.7
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
t PLH21
30
45
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
t PHL21
61
91.5
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
Pulse Width Distortion
Falling Time
PWD12
10.8
16.2
ns
|t PHL12 – t PLH12 |
PWD21
31
46.5
ns
|t PHL21 – t PLH21 |
tf1
15.6
23.4
ns
CL = 30pF
tf2
32
48
ns
CL = 300pF
(VDD1=2.5V±10%, VDD2=2.5V±10%, Ta=-40℃ to 125℃. Unless otherwise noted, Typical values are at VDD1 = 2.5V,
VDD2 = 2.5V, Ta = 25℃)
Parameters
Symbol
Min
Typ
Max
Unit
Comments
IDD1(Q0)
4.89
7.3
mA
All Input 0V
IDD2(Q0)
3.79
5.5
mA
IDD1(Q1)
2.34
3.4
mA
IDD2(Q1)
1.63
2.3
mA
IDD1(2M)
3.61
5.4
mA
All Input with 2MHz,
IDD2(2M)
2.59
4
mA
CL=15pF
IDD1(Q0)
2.75
4
mA
All Input 0V
IDD2(Q0)
2.54
3.8
mA
IDD1(Q1)
2.57
3.9
mA
IDD2(Q1)
1.47
2.2
mA
IDD1(2M)
2.57
3.9
mA
All Input with 2MHz,
IDD2(2M)
2.29
3.5
mA
CL=15pF
2
MHz
NSi8100
All Input at supply
Supply current
NSi8101
Clock rate
Propagation Delay
DR
t PLH12
0
33
49.5
ns
All Input at supply
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
Novosense Confidential Page 6
NSi8100/NSi8101
t PHL12
52
78
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
t PLH21
47
70.5
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
t PHL21
100
150
ns
See figure 2.6,
R1=1500Ω，R2=500Ω,
NO LOAD
Pulse Width Distortion
PWD12
19
28.5
ns
|t PHL12 – t PLH12 |
PWD21
53
79.5
ns
|t PHL21 – t PLH21 |
tf1
22
33
ns
CL = 30pF
tf2
36
54
ns
CL = 300pF
Falling Time
Tplh1
40
30
20
2.5
3.3
5
10
0
-40
25
Tphl1
100
Propagation Delay(ns)
Propagation Delay(ns)
2.2. TYPICAL PERFORMANCE CHARACTERISTICS
125
50
2.5
3.3
5
0
150
-40
Temperature(°C)
Propagation Delay(ns)
Propagation Delay(ns)
40
2.5
3.3
5
0
-40
25
125
150
Figure 2.2 Falling Edge Propagation Delay Vs Temp
Tplh2
20
125
Temperature(°C)
Figure 2.1 Rising Edge Propagation Delay Vs Temp
60
25
150
Tphl2
150
100
2.5
3.3
5
50
0
-40
Temperature(°C)
25
125
150
Temperature(°C)
Figure 2.3 Rising Edge Propagation Delay Vs Temp
Figure 2.4 Falling Edge Propagation Delay Vs Temp
Novosense Confidential Page 7
NSi8100/NSi8101
Tf1
30
20
2.5
3.3
5
10
0
-40
25
Tf2
60
Falling time(ns)
Falling time(ns)
40
40
2.5
3.3
5
20
0
125
150
-40
25
Temperature(°C)
125
Temperature(°C)
Figure 2.5 falling time(@27pF) Vs Temp
Figure 2.6 Falling time(@300pF) Vs Temp
2.3. PARAMETER MEASUREMENT INFORMATION
VDD2
VDD1
Input
Generator
SDA1
or SCL1
SDA2
or SCL2
CL2
CL1
Figure 2.6 Switching Characteristic Test Circuit and Voltage Waveforms
VDD1
VDD2
IN
OUT
Battery
VO
DC
CL
GND2
GND1
VCM
Figure 2.7 Common-Mode Transient Immunity Test Circuit
3.0 HIGH VOLTAGE FEATURE DESCRIPTION
3.1. INSULATION AND SAFETY RELATED SPECIFICATIONS
Parameters
Symbol
Value
Novosense Confidential Page 8
Unit
Comments
150
NSi8100/NSi8101
SOIC-8
SOIC-16
Minimum External Air Gap
(Clearance)
L(I01)
4.0
7.8
mm
Shortest terminal-to-terminal
distance through air
Minimum External Tracking
(Creepage)
L(I02)
4.0
7.8
mm
Shortest terminal-to-terminal
distance across the package
surface
Minimum internal gap
DTI
20
um
Distance through insulation
Tracking Resistance(Comparative
Tracking Index)
CTI
>600
V
DIN EN 60112 (VDE 0303-11);
IEC 60112
Ⅰ
Material Group
3.2. DIN VDE V 0884-10 (VDE V 0884-10) INSULATION CHARATERISTICS
Description
Test Condition
Symbol
Value
SOIC-8
SOIC-16
For Rated Mains Voltage ≤ 150Vrms
Ⅰto Ⅳ
Ⅰto Ⅳ
For Rated Mains Voltage ≤ 300Vrms
Ⅰto Ⅲ
Ⅰto Ⅳ
For Rated Mains Voltage ≤ 400Vrms
Ⅰto Ⅲ
Ⅰto Ⅳ
Unit
Installation Classification per DIN VDE 0110
Climatic Classification
10/105/21
Pollution Degree per DIN VDE 0110, Table 1
2
Maximum repetitive isolation voltage
Input to Output Test Voltage, Method B1
V IORM × 1. 5 = V pd (m) ,
100% production test,
10/105/21
2
VIORM
565
800
Vpeak
V pd (m)
847
1200
Vpeak
t ini = t m = 1 sec, partial
discharge < 5 pC
Input to Output Test Voltage, Method A
After Environmental Tests Subgroup 1
V IORM × 1.2 = V pd (m) , t ini =
60 sec, t m = 10 sec, partial
discharge < 5 pC
V pd (m)
678
960
Vpeak
After Input and /or Safety Test Subgroup 2
and Subgroup 3
V IORM × 1.2= V pd (m) , t ini =
60 sec, t m = 10 sec, partial
discharge < 5 pC
V pd (m)
678
960
Vpeak
t = 60 sec
VIOTM
5300
7000
Vpeak
Test method per
IEC60065,1.2/50us
waveform, VTEST=1.6
×VIOSM
VIOSM
5384
5384
Vpeak
VIO =500V
RIO
>109
>109
Ω
Maximum transient isolation voltage
Maximum Surge Isolation Voltage
Isolation resistance
Novosense Confidential Page 9
NSi8100/NSi8101
Isolation capacitance
f = 1MHz
CIO
0.6
Input capacitance
CI
2
Total Power Dissipation at 25℃
Ps
θJA = 140 °C/W, V I = 5.5
V, T J = 150 °C, T A = 25 °C
Safety input, output, or supply current
pF
2
pF
1499
mW
mA
160
Is
θJA = 84 °C/W, V I = 5.5 V,
T J = 150 °C, T A = 25 °C
Case Temperature
Ts
Saftey Limiting Current (mA)
0.6
150
237
mA
150
℃
180
160
140
120
100
80
60
40
20
0
0
50
100
150
200
Case Temperature (℃)
Saftey Limiting Current (mA)
Figure 3.1 NSi8100N/NSi8101N Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN V
VDE V 0884-10
250
200
150
100
50
0
0
50
100
150
200
Case Temperature (℃)
Figure 3.2 NSi8100W/NSi8101W Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN V
VDE V 0884-10
3.3. REGULATORY INFORMATION
The NSi8100N/NSi8101N are approved or pending approval by the organizations listed in table.
UL
UL 1577 Component
Recognition Program1
CSA
Approved under CSA Component
Acceptance Notice 5A
VDE
DIN V VDE V088410 (VDE V 0884-
Novosense Confidential Page 10
CQC
Certified by CQC11471543-2012
NSi8100/NSi8101
Single Protection,
3750Vrms Isolation
voltage
IEC60950-1
10):2006-122
400VRMS basic insulation working
voltage
Basic Insulation
565Vpeak,
VIOSM=6000Vpeak
File (pending)
File (pending)
File (E500602)
1
GB4943.1-2011
Basic insulation at
400VRMS (565Vpeak)
File (pending)
In accordance with UL 1577, each NSi8100N/NSi8101N is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 sec.
2
In accordance with DIN V VDE V 0884-10, each NSi8100N/NSi8101N is proof tested by applying an insulation test voltage ≥ 1059 V peak for 1 sec (partial
discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
The NSi8100W/NSi8101W are approved or pending approval by the organizations listed in table.
UL
CSA
UL 1577 Component
Recognition Program
Approved under CSA
Component Acceptance Notice
5A
VDE
DIN V VDE V088410 (VDE V 088410):2006-12
CQC
Certified by CQC11471543-2012
GB4943.1-2011
IEC60950-1
Single Protection, 5000Vrms
Isolation voltage
800VRMS basic insulation
working voltage
400VRMS Reinforced insulation
working voltage
File (pending)
1
File (pending)
Basic Insulation
800Vpeak,
VIOSM=5384Vpeak
File (pending)
Basic insulation at
800VRMS (1131Vpeak)
Reinforced insulation at
400VRMS (565Vpeak)
File (pending)
In accordance with UL 1577, each NSi8100W/NSi8101W is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec.
2
In accordance with DIN V VDE V 0884-10, each NSi8100W/NSi8101W is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial
discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
4.0 FUNCTION DESCRIPTION
The NSi810x is a bidirectional isolator based on a capacitive isolation barrier technique. The NSi810x devices are compatible with I2C
interface. Internally, the I2C interface is split into two unidirectional channels communicating in opposing directions via a dedicate
capacitive isolation channel for each. The digital signal is modulated with RF carrier generated by the internal oscillator at the
Transmitter side. Then it is transferred through the capacitive isolation barrier and demodulated at the Receiver side.
The NSi8100 devices are high reliability dual-channel bidirectional isolators for clock and data lines while NSi8101 has a
bidirectional data and a unidirectional clock channel. The NSi8100 is suitable for multi-master application while NSi8101 is useful in
a single master application.
The Side 2 logic levels of NSi810x are standard I2C value, and the maximum load for side 2 is ≤ 400pF. So multiple NSi810x devices
connected to a bus by their Side 2 pins can communicate with each other and with other I 2C compatible devices.
The Side 1 logic levels of NSi810x are not standard value. The output low level of NSi810x is 650mV, while low-level output voltage
to high-level input voltage threshold is 50mV. This prevents an output logic low at Side 1 being transmitted back to Side 2 and pulling
down the I2C bus.
The NSi810x devices are AEC-Q100 qualified. The NSi810x device is safety certified by UL1577 support several insulation withstand
voltages (3.75kVrms, 5kVrms), while providing high electromagnetic immunity and low emissions at low power consumption. The
I2C clock of the NSi810x is up to 2MHz, and the common-mode transient immunity (CMTI) is up to 150kV/us. Wide supply voltage
of the NSi810x device support to connect with most digital interface directly, easy to do the level shift. High system level EMC
performance enhance reliability and stability of use.
The Table 4.1 shows the functional of NSi810x.The NSi810x is high impedance output when VDDIN is unready and VDDOUT is
ready as shown in.
Table 4.1 Output status vs. power status
Input
VDD1
VDD2
Output
Comment
Novosense Confidential Page 11
NSi8100/NSi8101
status
status
H
Ready
Ready
Z
L
Ready
Ready
L
X
Unready
Ready
Z
The output follows the same status with the input within 60us after input
side VDD1 is powered on.
X
Ready
Unready
X
The output follows the same status with the input within 60us after output
side VDD2 is powered on.
Normal operation.
5.0 APPLICATION NOTE
5.1. PCB LAYOUT
The NSi810x requires a 0.1 µF bypass capacitor between VDD1 and GND1, VDD2 and GND2. The capacitor should be placed as
close as possible to the package. Figure 5.1 to Figure 5.4 show the recommended PCB layout, make sure the space under the chip
should keep free from planes, traces, pads and via. The pull-up resistors required for both Side 1 and Side 2 buses. And the value of
the resistors depend on the number of I2C devices on the bus.
Figure5.1 Recommended PCB Layout — Top Layer
Figure5.2 Recommended PCB Layout — Bottom Layer
Figure5.3 Recommended PCB Layout — Top Layer
Figure5.4 Recommended PCB Layout — Bottom Layer
Novosense Confidential Page 12
NSi8100/NSi8101
6.0 PACKAGE INFORMATION
VDD1 1
8 VDD2
VDD1 1
8 VDD2
SDA1 2
7 SDA2
SDA1 2
7 SDA2
SCL1 3
6 SCL2
SCL1 3
6 SCL2
GND1 4
5 GND2
GND1 4
5 GND2
NSi8100N
NSi8101N
Figure 6.1 NSi8100N/NSi8101N Package
Figure 6.3 SOIC8 Package Shape and Dimension
Dimensions shown in millimeters and (inches)
Table6.1 NSi8100N/ NSi8101N Pin Configuration and Description
NSi8100N
PIN NO.
NSi8101N
PIN NO.
SYMBOL
FUNCTION
1
1
VDD1
Power Supply for Isolator Side 1
2
2
SDA1
Serial data input /output, Side 1
3
3
SCL1
Serial clock input /output, Side 1
4
4
GND1
Ground 1, the ground reference for Isolator Side 1
5
5
GND2
Ground 2, the ground reference for Isolator Side 2
6
6
SCL2
Serial clock input /output, Side 2
7
7
SDA2
Serial data input /output, Side 2
8
8
VDD2
Power Supply for Isolator Side 2
Novosense Confidential Page 13
NSi8100/NSi8101
GND1 1
NC 2
16 GND2
GND11
16 GND2
15 NC
NC 2
15 NC
14 VDD2
VDD1 3
13 NC
NC 4
14 VDD2
VDD1 3
13 NC
NC 4
SDA1 5
12 SDA2
SDA1 5
12 SDA2
SCL1 6
11 SCL2
SCL1 6
11 SCL2
GND1 7
NC 8
10 NC
GND17
10 NC
9
NC 8
9
GND2
NSi8100W
NSi8101W
Figure 6.2 NSi8100W/ NSi8101W Package
Figure 6.6 SOIC16 Package Shape and Dimension
Dimensions shown in millimeters and (inches)
Table6.2 NSi8100W/ NSi8101W Pin Configuration and Description
NSi8100W
PIN NO.
NSi8101W
PIN NO.
SYMBOL
FUNCTION
1
1
GND1
Ground 1, the ground reference for Isolator Side 1
2
2
NC
No Connection.
3
3
VDD1
Power Supply for Isolator Side 1
4
4
NC
No Connection.
5
5
SDA1
Serial data input /output, Side 1
6
6
SCL1
Serial clock input /output, Side 1
7
7
GND1
Ground 1, the ground reference for Isolator Side 1
Novosense Confidential Page 14
GND2
NSi8100/NSi8101
8
8
NC
No Connection.
9
9
GND2
Ground 2, the ground reference for Isolator Side 2
10
10
NC
No Connection.
11
11
SCL2
Serial clock input /output, Side 1
12
12
SDA2
Serial data input /output, Side 1
13
13
NC
No Connection.
14
14
VDD2
Power Supply for Isolator Side 2
15
15
NC
No Connection.
16
16
GND2
Ground 2, the ground reference for Isolator Side 2
7.0 ORDER INFORMATION
Part No.
Isolation
Rating(kV)
Number
Number
Max Clock
Temperature
Automotive Package
of side 1
of side 2
Rate (MHz)
inputs
inputs
NSi8100N
3.75
2
2
2
NO
SOIC8
-40 to 125℃
NSi8100NQ
3.75
2
2
2
YES
SOIC8
-40 to 125℃
NSi8101N
3.75
2
1
2
NO
SOIC8
-40 to 125℃
NSi8101NQ
3.75
2
1
2
YES
SOIC8
-40 to 125℃
NSi8100W
5
2
2
2
NO
WB SOIC16
-40 to 125℃
NSi8101W
5
2
1
2
NO
WB SOIC16
-40 to 125℃
NOTE: All packages are RoHS-compliant with peak reflow temperatures of 260 °C according to the JEDEC industry
standard classifications and peak solder temperatures.
All devices are AEC-Q100 qualified.
8.0 REVISION HISTORY
Revision
1.0
1.1
1.2
1.3
1.4
1.5
1.6
Description
Original
Change to Ordering information
Add maximum operation current specification.
Change block diagram
Change “Start Up Time after POR” specification to 40us
Add “Maximum Input Pulse Voltage”
Change to Ordering information
Novosense Confidential Page 15
Date
2017/11/15
2018/3/26
2018/6/20
2018/7/28
2018/8/25
2018/10/9
2018/12/20
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