Application Note: SY8501
High Efficiency 500kHz, 1.0A 100V Input
Synchronous Step Down Regulator
Preliminary Specification
General Description
Features
SY8501 develops high efficiency synchronous stepdown DC-DC converter capable of delivering 1.0A
current. The SY8501 operates over a wide input
voltage range from 7V to 100V and integrate main
switch and synchronous switch with very low RDS(ON)
to minimize the conduction loss.
• low RDS(ON) for internal switches (top/bottom):
500mΩ/240mΩ
• 7-100V input voltage range
• 1A output current capability
• Adjustable switching frequency
• Instant PWM architecture to achieve fast transient
responses.
• 2ms internal softstart limits the inrush current
• Precious +/-2% 1.2V reference
• RoHS Compliant and Halogen Free
• Compact SO8E package
The device adopts the instant PWM architecture to
achieve fast transient responses for high step down
applications.
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Ordering Information
SY8501 □(□□
□□)□
□□ □
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Applications
Ordering Number
SY8501FCC
Package type
SO8E
Note
--
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Typical Applications
• Non-Isolated Telecommunication Buck Regulator
• Secondary High Voltage Post Regulator
• Automotive Systems
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Tempera ture Code
Packa ge Code
Optiona l Spec Code
Figure 1. Schematic Diagram
AN_SY8501 Rev. 0.1A
Figure 2. Efficiency
Silergy Corp. Confidential- Prepared for Customer Use Only
1
AN_SY8501
Pinout (top view)
NC
1
IN
2
EN
3
RON
4
GND
Exposed
Pad
8
LX
7
BS
6
VCC
5
FB
(SO8E)
Top Mark: AMAxyz for SY8501FCC (Device code: AMA, x=year code, y=week code, z= lot number code)
4
5
VCC
BS
6
7
LX
GND
8
Exposed Pad
Not connected.
Input pin. Decouple this pin to GND with a low ESR ceramic cap.
Enable control. The device has an accurate 1.2V rising threshold. This pin can also
be used to program the Vin turn on voltage with resistor divider.
Connect a resistor from this pin to IN to set the top switch ON time.
Output Feedback Pin. Connect this pin to the center point of the output resistor
divider (as shown in Figure 1) to program the output voltage:
Vout=1.2*(1+R1/R2)
Supply input of internal LDO.
Boot-Strap Pin. Supply high side gate driver. Decouple this pin to LX pin with
0.1uF ceramic cap.
Inductor pin. Connect this pin to the switching node of inductor
Ground pin.
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RON
FB
Pin Description
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Pin Number
1
2
3
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Pin Name
NC
IN
EN
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage -------------------------------------------------------------------------------------------------------- 110V
EN, LX----------------------------------------------------------------------------------------------------------------- VIN + 0.3V
BS -------------------------------------------------------------------------------------------------------------------------- LX + 6V
FB, RON Voltage -------------------------------------------------------------------------------------------------------------- 6V
VCC ----------------------------------------------------------------------------------------------------------------------------- 30V
Power Dissipation, PD @ TA = 25°C SO8E ----------------------------------------------------------------------------- 3.3W
Package Thermal Resistance (Note 2)
θ JA --------------------------------------------------------------------------------------------------------------- 30°C/W
θ JC --------------------------------------------------------------------------------------------------------------- 10°C/W
Junction Temperature Range ---------------------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------------------- 260°C
Storage Temperature Range ------------------------------------------------------------------------------------ -65°C to 150°C
Recommended Operating Conditions (Note 3)
Supply Input Voltage ------------------------------------------------------------------------------------------------- 7V to 100V
Junction Temperature Range ------------------------------------------------------------------------------------ -40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------- -40°C to 85°C
AN_SY8501 Rev. 0.1A
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2
AN_SY8501
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Block Diagram
AN_SY8501 Rev. 0.1A
Silergy Corp. Confidential- Prepared for Customer Use Only
3
AN_SY8501
Electrical Characteristics
(VIN = 48V, VOUT = 12V, L = 47uH, COUT = 10uF, TA = 25°C, IOUT = 1A unless otherwise specified)
Parameter
Input Voltage Range
Quiescent Current
Shutdown Current
Feedback Reference
Voltage
FB Input Current
Top FET RON
Bottom FET RON
Top FET peak Current
Limit
Bottom FET Valley
Current Limit
EN Rising Threshold
EN Falling Threshold
Input UVLO Rising
Threshold
Input UVLO Hysteresis
Programmable Switching
Frequency Range
Min ON Time
Min OFF Time
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis
Symbol
VIN
IQ
ISHDN
VREF
Test Conditions
Min
7
IOUT=0, VFB=VREF*105%
EN=0
1.176
IFB
RDS(ON)1
RDS(ON)2
ILIM,Top
VFB=3.3V
Typ
5
1.2
-50
Max
100
400
10
1.224
Unit
V
µA
µA
V
50
nA
mΩ
mΩ
A
500
240
1.8
ILIM,Bottom
1
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VENH
VENL
VUVLO
VHYS
FS
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550
Fs ( KHz ) =
Ron ( MΩ)
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0.8
6
TSD
1.2
6.5
7
V
V
V
1000
V
kHz
0.5
200
120
350
150
ns
ns
°C
15
°C
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Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
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Note 2: θ JA is measured in the natural convection at TA = 25°C on a low effective 4-layer thermal conductivity
test board of JEDEC 51-3 thermal measurement standard. Paddle of SO8E packages is the case position for θ JC
measurement.
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Note 3: The device is not guaranteed to function outside its operating conditions.
AN_SY8501 Rev. 0.1A
Silergy Corp. Confidential- Prepared for Customer Use Only
4
AN_SY8501
Typical Performance Characteristics
Efficiency vs. Load Current
Efficiency vs. Load Current
100
100
90
90
80
80
70
70
60
60
50
50
40
40
VIN=18V, VOUT=12V
30
20
VIN=7V, VOUT=5V
30
VIN=24V, VOUT=5V
20
VIN=48V, VOUT=12V
10
VIN=100V, VOUT=12V
VIN=24V, VOUT=12V
VIN=48V, VOUT=5V
10
VIN=100V, VOUT=5V
0
0
0.01
0.1
0.001
1
0.01
1
Load Current (A)
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Load Current (A)
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Load Regulation
Load Regulation
12.1
5.02
12.0
4.98
4.96
VIN=7V, VOUT=5V
4.94
en
VIN=24V, VOUT=5V
VIN=48V, VOUT=5V
4.92
4.90
0.2
0.4
0.6
0.8
1
11.9
11.8
VIN=18V, VOUT=12V
11.7
VIN=24V, VOUT=12V
11.6
VIN=100V, VOUT=12V
VIN=48V, VOUT=12V
11.5
0
1.2
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VIN=100V, VOUT=5V
Output Voltage (V)
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5.00
0.2
Load Current (A)
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4.98
0.6
0.8
1
1.2
Line Regulation
12.1
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5.00
0.4
Load Current (A)
Line Regulation
5.02
12.0
11.9
11.8
4.96
IOUT=0A, VOUT=5V
4.94
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Output Voltage (V)
0.1
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0.001
IOUT=0A, VOUT=12V
11.7
IOUT=0.1A, VOUT=5V
IOUT=0.1A, VOUT=12V
IOUT=1A, VOUT=5V
4.92
IOUT=1A, VOUT=12V
11.6
4.90
11.5
7
27
47
67
87
Input Voltage (V)
AN_SY8501 Rev. 0.1A
107
18
38
58
78
98
118
Input Voltage (V)
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5
AN_SY8501
Output Ripple
Output Ripple
(VIN=24V, VOUT=5V, IO=1A)
(VIN=48V, VOUT=5V, IO=1A)
∆VOUT
10mV/div
∆VOUT
10mV/div
VLX
20V/div
VLX
50V/div
IL
1A/div
IL
Time (2µs/div)
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Time (2µs/div)
1A/div
Output Ripple
Output Ripple
20mV/div
VLX
20V/div
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∆VOUT
(VIN=48V, VOUT=12V, IO=1A)
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(VIN=24V, VOUT=12V, IO=1A)
1A/div
20mV/div
VLX
50V/div
IL
1A/div
Time (2µs/div)
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Time (2µs/div)
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∆VOUT
AN_SY8501 Rev. 0.1A
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6
AN_SY8501
Load Transient
(VIN=48V, VOUT=12V, IO=0.25 ~ 0.75A)
0.2V/div
∆VOUT
IO
0.5A/div
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Time (400µs/div)
Shutdown from VIN
VIN
20V/div
VOUT
5V/div
VLX
10V/div
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1A/div
Time (4ms/div)
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(VIN=24V, VOUT=5V, IO=1A)
Startup from VIN
50V/div
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VIN
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(VIN=48V, VOUT=5V, IO=1A)
VOUT
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VLX
IL
5V/div
50V/div
1A/div
Time (4ms/div)
AN_SY8501 Rev. 0.1A
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7
AN_SY8501
Shutdown from VIN
(VIN=24V, VOUT=12V, IO=1A)
VIN
20V/div
VOUT
10V/div
VLX
20V/div
IL
1A/div
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Time (10ms/div)
Startup from VIN
50V/div
VOUT
10V/div
VLX
50V/div
IL
1A/div
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Time (10ms/div)
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VIN
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(VIN=48V, VOUT=12V, IO=1A)
Startup from Enable
VEN
20V/div
5V/div
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VOUT
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(VIN=24V, VOUT=5V, IO=1A)
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VLX
IL
20V/div
1A/div
Time (2ms/div)
AN_SY8501 Rev. 0.1A
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AN_SY8501
Startup from Enable
(VIN=48V, VOUT=5V, IO=1A)
VEN
VOUT
20V/div
5V/div
VLX
50V/div
IL
1A/div
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Time (2ms/div)
Startup from Enable
20V/div
VOUT
10V/div
20V/div
IL
1A/div
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Time (2ms/div)
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VLX
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VEN
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(VIN=24V, VOUT=12V, IO=1A)
Startup from Enable
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(VIN=48V, VOUT=12V, IO=1A)
20V/div
VOUT
10V/div
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VEN
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VLX
IL
50V/div
1A/div
Time (2ms/div)
AN_SY8501 Rev. 0.1A
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9
AN_SY8501
VOUT
Short Circuit Protection
Short Circuit Protection
(VIN=48V, VOUT=5V, IO=0A)
(VIN=48V, VOUT=5V, IO=1A)
5V/div
VOUT
IL
1A/div
1A/div
Time (200µs/div)
Time (200µs/div)
Short Circuit Protection
Short Circuit Protection
(VIN=48V, VOUT=12V, IO=0A)
(VIN=48V, VOUT=12V, IO=1A)
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5V/div
VOUT
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VOUT
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IL
5V/div
IL
1A/div
1A/div
Time (200µs/div)
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Time (200µs/div)
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5V/div
AN_SY8501 Rev. 0.1A
Silergy Corp. Confidential- Prepared for Customer Use Only
10
AN_SY8501
Operation Description
The SY8501 operates over a wide input voltage range
from 7V to 100V and integrates main switch and
synchronous switch with very low RDS(ON) to
minimize the conduction loss. This regulator adopts
the instant PWM architecture with an internal ripple
control scheme using an on-time inversely
proportional to VIN to achieve fast transient responses
for high voltage step down applications. This
architecture requires no loop compensation. In
addition, it operates at pseudo-constant frequency
under continuous conduction mode to minimize the
size of inductor and capacitor.
This regulator is well suited for 48 Volt telecom and
the new 42V automotive power bus ranges.
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Output Voltage Program.
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Choose R1and R2 to program the proper output
voltage. To minimize the power consumption under
light loads,
it is desirable to choose large resistance values for
both R1 and R2.
Vout
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VFB is typical 1.2V.
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FB
Vout
FS × I OUT _ MAX × 40%
Where Fs is the switching frequency and IOUT_MAX is
the maximum load current.
The SY8501 regulator IC is quite tolerant of different
ripple current amplitude. Consequently, the final
choice of inductance can be slightly off the
calculation value without significantly impacting the
performance.
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2) The saturation current rating of the inductor must
be selected greater than the peak inductor current
under full load conditions.
I SAT _ MIN > I OUT _ MAX +
VOUT × (1 − VOUT / VIN _ MAX )
FS × L2 × 2
3) The DCR of the inductor and the core loss at the
switching frequency must be low enough to achieve
the desired efficiency requirement. It is desirable to
choose an inductor with smaller DCR to achieve a
good overall efficiency.
Input Capacitor CIN:
The ripple current through input capacitor is
calculated as：
ICIN _ RMS = IOUT _ MAX × D (1 − D)
The capacitance of input capacitor is calculated as:
R1
I
×V
× (VIN − VOUT )
C IN = OUT OUT
∆VIN × FS ×η × VIN 2
R2
∆VIN
GND
Output Inductor L:
There are several considerations in choosing this
inductor.
AN_SY8501 Rev. 0.1A
VOUT × (1 − VOUT / VIN _ MAX )
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Because of the high integration in the SY8501 IC, the
application circuit based on this regulator IC is rather
simple. Only on-timer resistor RON, feedback
resistors (R1 and R2), input capacitor CIN, output
capacitor COUT and output inductor L need to be
selected for the targeted applications specifications.
R1
= (1 +
) × VFB
R2
L2 =
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Applications Information
1) Choose the inductance to provide the desired
ripple current. It is suggested to choose the ripple
current to be about 40% of the maximum output
current. The inductance is calculated as:
is desired input voltage ripple
To minimize the potential noise problem, place a
typical X5R or better grade ceramic capacitor really
close to the IN and GND pins. Care should be taken
to minimize the loop area formed by CIN, and
IN/GND pins. In this case, a 1uF low ESR ceramic
capacitor is recommended.
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AN_SY8501
Output Capacitor COUT:
The output capacitor is selected to handle the output
ripple noise requirements. Both steady state ripple
and transient requirements must be taken into
consideration when selecting this capacitor. It is
recommended to use X5R or better grade ceramic
capacitor greater than 10uF capacitance.
On Time
The on-time for the SY8501 is determined by the RON
resistor, and is inversely proportional to the input
voltage, resulting in a nearly constant frequency as
VIN is varied over its range.
Enable Operation
Pulling the EN pin low will shut down the device.
During shut mode, the SY8501 shutdown current drops
to lower than 10uA. Driving the EN pin high will turn
on the IC again.
Input UVLO can be programmed by EN rising threshold.
Minimum VUVLO value need larger than 6.5V
R
VUVLO (V ) = (1 + 4 ) × Vth
R5
Vth is EN rising threshold voltage, typical is 1.2V
Frequency vs. Ron Resistor:
11× VO (V ) + 500
Ron ( M Ω)
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Internal LDO Regulator
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Notice: Final switch frequency is not only effected by
component tolerant but also minimum off and on
time limit.
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Fs (kHz ) =
The SY8501 has a built-in soft-start to control the
rise rate of the output voltage and limit the input
current surge during IC start-up. The typical soft-start
time is 2ms.
Load Transient Considerations:
The SY8501 regulator IC adopts the instant PWM
architecture to achieve good stability and fast
transient responses. Adding a Cff ceramic cap in
parallel with R1 is recommended.
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The SY8501 consists of two internal LDOs for
4V_VDD from IN pin and VCC pin. Upon power up,
the LDO regulator from IN sources current into the
capacitor on internal 4V_VDD. When the voltage on
the 4V_VDD reaches the under-voltage lockout
threshold voltage, the buck switch is enabled. After
soft start done and VCC pin voltage is larger than
4.2V, the VCC side LDO is enabled and IN side
LDO is disabled. A 0.1uF ceramic capacitor is
recommended for CVCC at most applications.
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In applications，the input pin (IN) can be connected
directly to the line voltages up to 100 Volts, where
power dissipation in the VCC regulator is a concern,
an auxiliary voltage can be connected to the VCC pin
via a diode. Setting the auxiliary voltage to 4.5 -28V
will shut off the internal regulator from IN, reducing
internal power dissipation.
External Boot-strap Cap
This capacitor provides the gate driver voltage for
internal high side MOSEFET. A 100nF low ESR
ceramic capacitor connected between BS pin and LX
pin is recommended.
Over Current Protection
Soft Start
AN_SY8501 Rev. 0.1A
SY8501 provides cycle-by-cycle over current
limiting on both high side MOSFET and low-side
MOSFET. Under over current condition, if the output
voltage drops below 33% of set-point, the device will
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12
AN_SY8501
fold back valley current limit to 0.5x typical value.
4) The PCB copper area associated with LX pin must
be minimized to avoid the potential noise problem.
Layout Design:
The layout design of SY8501 is very important for
proper operation. Following are the tips for good
PCB layout.
1) It is desirable to maximize the PCB copper area
connecting to GND pin to achieve the best thermal
and noise performance. If the board space allowed, a
ground plane is highly desirable.
2) CIN must be close to Pin IN and GND. The loop
area formed by CIN and GND must be minimized.
6) If the system chip interfacing with the EN pin has a
high impedance state at shutdown mode and the IN pin
is connected directly to a power source such as a Li-Ion
battery, it is desirable to add a pull down 1Mohm
resistor between the EN and GND pins to prevent the
noise from falsely turning on the regulator at shutdown
mode.
COUT
CBS
D1
CVCC
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3) CVCC should be placed close to VCC pin and GND
pin.
5) The feedback components RUP and RDOWN, and the
trace connecting to the FB pin must NOT be adjacent
to the LX net on the PCB layout to avoid the noise
problem.
AN_SY8501 Rev. 0.1A
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13
AN_SY8501
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5.80 - 6.20
6.10
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3.80 - 4.00
SO8-E Package Outline & PCB layout
0.60 - 0.85
00.00 - 0.25
1.30 - 1.60
0.25 base
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-8
4.80 - 5.00
1.27 (TYP)
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0
45°
0.25 - 0.50
0.18 - 0.25
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Recommended Pad Layout
0.30 – 0.50
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Notes:
All dimension in MM
All dimension don’t not include mold flash & metal burr
AN_SY8501 Rev. 0.1A
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14
AN_SY8501
Taping & Reel Specification
1. Taping orientation
SOP8-EP
3.9/4.1
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11.7/12.3
1.45/1.55
Feeding direction
Package
types
Tape width
(mm)
Pocket
pitch(mm)
Reel size
(Inch)
Reel
width(mm)
Trailer
length(mm)
Leader length
(mm)
Qty per
reel
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2. Carrier Tape & Reel specification for packages
12
8
13"
12.4
400
400
2500
SOP8E
3. Others: NA
AN_SY8501 Rev. 0.1A
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