ASNT5153-KMC

Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ASNT5153-KMC DC-56Gbps Broadband Digital 2:1 Multiplexer/Selector Ideal for use as a high isolation selector switch or as a high speed 2-to-1 serializer  Ideal for high speed proof-of-concept prototyping  Fully differential CML input interface  Fully differential CML output interface with 600mV single-ended swing  Analog input clock common mode voltage control  Single +3.3V or -3.3V power supply  Power consumption: 500mW  Fabricated in SiGe for high performance, yield, and reliability  Custom CQFP 24-pin package vcc vee  vcc Exhibits low jitter and limited temperature variation over industrial temperature range d1n  d1p High speed broadband 2:1 Multiplexer/Selector (MUX) vcc  dcp vcc vcc d0p qp ASNT5153 vcc vcc d0n qn vcc vcc Rev. 1.2.2 1 vcc cn vcc cp vcc vee dcn May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com DESCRIPTION d1p d1n 50 50 50 50 d0p qp 2:1 MUX Core d0n 50 qn 50 1K 1K dcp dcn 50 50 cp cn Fig. 1. Functional Block Diagram The temperature stable and broadband ASNT5153-KMC SiGe IC can be utilized as either a high isolation selector switch or a high speed 2:1 serializer and is intended for use in high-speed measurement / test equipment. When employed as a selector switch, the IC can route one of its differential data input signals d0p/d0n or d1p/d1n to its differential output qp/qn while effectively blocking the other data input. Selection of a specific data input is achieved through appropriate external DC biasing of the selector signal inputs cp/cn. The logic is shown in Table 1. Table 1. Truth Table c d0 d1 out 0 X 0 0 0 X 1 1 1 0 X 0 1 1 X 1 As a 2:1 serializer, the IC can receive high speed input data signals into d0p/d0n and d1p/d1n and effectively multiplex them into a double frequency rate NRZ output data signal by using a high speed input clock signal on its selector signal inputs cp/cn. The signals should be aligned as shown in Fig. 2. To ensure both maximum timing margins and low output signal jitter, limit the amount of jitter on the input signals (D0, D1, and C) to only a few picoseconds. Rev. 1.2.2 2 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com Fig. 2. Input Signal Timing Diagram The common-mode voltage levels of the input clock signals can be adjusted using the analog control inputs dcp/dcn. The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLY CONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. The differential DC signaling mode is recommended for optimal performance. POWER SUPPLY CONFIGURATION The part can operate with either negative supply (vcc = 0.0V = ground and vee = −3.3V), or positive supply (vcc = +3.3V and vee = 0.0V = ground). In case of the positive supply, all I/Os need AC termination when connected to any devices with 50Ohm termination to ground. All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V. ABSOLUTE MAXIMUM RATINGS Caution: Exceeding the absolute maximum ratings shown in Table 2 may cause damage to this product and/or lead to reduced reliability. Functional performance is specified over the recommended operating conditions for power supply and temperature only. AC and DC device characteristics at or beyond the absolute maximum ratings are not assumed or implied. All max voltage limits are referenced to ground. Rev. 1.2.2 3 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com Table 2. Absolute Maximum Ratings Parameter Supply Voltage (vee) Power Consumption RF Input Voltage Swing (SE) Case Temperature Storage Temperature Operational Humidity Storage Humidity Min -40 10 10 Max -3.6 0.55 1.0 +90 +100 98 98 Units V W V ºC ºC % % TERMINAL FUNCTIONS TERMINAL Name No. Type d0p d0n d1p d1n cp cn dcp dcn qp qn Name vcc vee Rev. 1.2.2 DESCRIPTION High-Speed I/Os 21 CML Differential data input signals with internal SE 50Ohm termination to input vcc 23 17 CML Differential data input signals with internal SE 50Ohm termination to input vcc 15 3 CML Differential clock input signals with internal SE 50Ohm termination input to vcc 5 19 Analog cp common mode control voltage inputs cn common mode control voltage 7 11 CML Differential data output signals with internal SE 50Ohm termination output to vcc. Also require external SE 50Ohm termination to vcc 9 Supply and Termination Voltages Description Pin Number Positive power supply 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24 (+3.3V or 0) Negative power supply 1, 13 (0V or -3.3V) 4 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ELECTRICAL CHARACTERISTICS PARAMETER vee vcc Ivee Power consumption Junction temperature Data rate Frequency Data rate Swing CM Voltage Level Frequency Swing CM Voltage Level Duty cycle Data rate Frequency Data rate Logic “1” level Logic “0” level Rise/Fall times Output Jitter Input Signal Range MIN TYP MAX UNIT COMMENTS General Parameters -3.1 -3.3 -3.5 V ±6% 0.0 V External ground 152 mA 500 mW -25 50 125 °C HS Input Data (d0p/d0n, d1p/d1n) DC 40 Gbps When used as a selector DC 20 GHz When used as a selector DC 28 Gbps When used as a multiplexer 50 800 mV Differential or SE, p-p vcc-0.8 vcc V Must match for both inputs HS Input Clock (cp/cn) DC 28 GHz 50 800 mV Differential or SE, p-p vcc-0.8 vcc V Must match for both inputs 45 50 55 % HS Output Data (qp/qn) DC 40 Gbps When used as a selector DC 20 GHz When used as a selector DC 56 Gbps When used as a multiplexer V vcc vcc-0.6 V With external 50Ohm DC termination 5 7 9 ps 20%-80% 1 ps Peak-to-peak Common Mode Control Ports (dcp/dcn) -3.3 0.0 V PACKAGE INFORMATION The chip die is housed in a custom 24-pin CQFP package shown in Fig. 3. The package provides a center heat slug located on its back side to be used for heat dissipation. ADSANTEC recommends for this section to be soldered to the vcc plain, which is ground for a negative supply, or power for a positive supply. The part’s identification label is ASNT5153-KMC. The first 8 characters of the name before the dash identify the bare die including general circuit family, fabrication technology, specific circuit type, and part version while the 3 characters after the dash represent the package’s manufacturer, type, and pin out count. Rev. 1.2.2 5 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten substances. Fig. 3. CQFP 24-Pin Package Drawing (All Dimensions in mm) Rev. 1.2.2 6 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com REVISION HISTORY Revision 1.2.2 1.1.2 1.1.1 Date 05-2020 07-2019 02-2019 1.0.1 04-2015 Rev. 1.2.2 Changes Updated Package Information Updated Letterhead Added truth table Revised package information section First release 7 May 2020