S-5742 B Series
www.ablic.com
www.ablicinc.com
125°C OPERATION
HIGH-WITHSTAND VOLTAGE HIGH-SPEED
BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
© ABLIC Inc., 2016-2017
This IC, developed by CMOS technology, is a bipolar Hall effect latch IC with high-withstand voltage, high-speed detection
and high-accuracy magnetic characteristics.
The output voltage changes when this IC detects the intensity level of magnetic flux density and a polarity change. Using
this IC with a magnet makes it possible to detect the rotation status in various devices.
This IC includes an output current limit circuit.
This IC is available in various systems by using the insertion TO-92S package.
Due to its high-accuracy magnetic characteristics, this IC can make operation's dispersion in the system combined with
magnet smaller.
ABLIC Inc. offers a "magnetic simulation service" that provides the ideal combination of magnets and our Hall ICs for
customer systems. Our magnetism simulation service will reduce prototype production, development period and
development costs. In addition, it will contribute to optimization of parts to realize high cost performance.
For more information regarding our magnetism simulation service, contact our sales office.
Features
Pole detection:
*1
Output logic :
*1
Output form :
Magnetic sensitivity*1:
Chopping frequency:
Output delay time:
Power supply voltage range:
Built-in regulator
Built-in output current limit circuit
Operation temperature range:
Lead-free (Sn 100%), halogen-free
Bipolar latch
VOUT = "L" at S pole detection
VOUT = "H" at S pole detection
Nch open-drain output
Nch driver built-in pull-up resistor
BOP = 1.8 mT typ.
BOP = 3.0 mT typ.
BOP = 6.0 mT typ.
fC = 500 kHz typ.
tD = 8.0 s typ.
VDD = 3.5 V to 26.0 V
Ta = 40C to 125C
*1. The option can be selected.
Applications
Home appliance
DC brushless motor
Housing equipment
Industrial equipment
Packages
TO-92S (Straight)
TO-92S (Forming)
1
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Block Diagrams
1.
Nch open-drain output product
VDD
OUT
Regulator
Chopping
stabilized
amplifier
*1
Output current limit circuit
VSS
*1. Parasitic diode
Figure 1
2.
Nch driver built-in pull-up resistor product
VDD
OUT
Regulator
Chopping
stabilized
amplifier
Output current limit circuit
VSS
*1. Parasitic diode
Figure 2
2
*1
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Product Name Structure
1.
Product name
S-5742
x B x x B - Y3 x x U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Pin shape
2: Straight
3: Forming
Packing specifications
B: Bulk (500 pcs / bag)
Z: Tape and ammo (2000 pcs / case)
Package abbreviation
Y3: TO-92S
Operation temperature
B: Ta = 40°C to 125°C
Magnetic sensitivity
0: BOP = 1.8 mT typ.
1: BOP = 3.0 mT typ.
2: BOP = 6.0 mT typ.
Output logic
L: VOUT = "L" at S pole detection
H: VOUT = "H" at S pole detection
Pole detection
B: Bipolar latch
Output form
N: Nch open-drain output
R: Nch driver built-in pull-up resistor
2.
Packages
Table 1
Package Name
Bulk
TO-92S (Straight)
Tape and ammo
Bulk
TO-92S (Forming)
Tape and ammo
Package Drawing Codes
Dimension
YB003-A-P-SD
YB003-B-P-SD
Tape
YC003-A-C-SD
YC003-B-C-SD
Ammo Packing
YC003-A-Z-SD
YC003-B-Z-SD
3
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
3.
Product name list
3. 1
TO-92S (Straight)
Table 2
Product Name*1
Pole
Detection
Output Form
Output logic
S-5742NBL0B-Y3n2U
Nch open-drain output
Bipolar latch
S-5742NBL1B-Y3n2U
Nch open-drain output
Bipolar latch
S-5742NBL2B-Y3n2U
Nch open-drain output
Bipolar latch
S-5742NBH0B-Y3n2U Nch open-drain output
Bipolar latch
S-5742NBH1B-Y3n2U Nch open-drain output
Bipolar latch
S-5742NBH2B-Y3n2U Nch open-drain output
Bipolar latch
S-5742RBL0B-Y3n2U
Nch driver built-in pull-up resistor Bipolar latch
S-5742RBL1B-Y3n2U
Nch driver built-in pull-up resistor Bipolar latch
S-5742RBL2B-Y3n2U
Nch driver built-in pull-up resistor Bipolar latch
S-5742RBH0B-Y3n2U Nch driver built-in pull-up resistor Bipolar latch
S-5742RBH1B-Y3n2U Nch driver built-in pull-up resistor Bipolar latch
S-5742RBH2B-Y3n2U Nch driver built-in pull-up resistor Bipolar latch
*1. "n" changes according to the packing specification as follows.
B: Bulk, Z: Tape and ammo
VOUT = "L" at S pole detection
VOUT = "L" at S pole detection
VOUT = "L" at S pole detection
VOUT = "H" at S pole detection
VOUT = "H" at S pole detection
VOUT = "H" at S pole detection
VOUT = "L" at S pole detection
VOUT = "L" at S pole detection
VOUT = "L" at S pole detection
VOUT = "H" at S pole detection
VOUT = "H" at S pole detection
VOUT = "H" at S pole detection
Magnetic
Sensitivity
(BOP)
1.8 mT typ.
3.0 mT typ.
6.0 mT typ.
1.8 mT typ.
3.0 mT typ.
6.0 mT typ.
1.8 mT typ.
3.0 mT typ.
6.0 mT typ.
1.8 mT typ.
3.0 mT typ.
6.0 mT typ.
Remark Please contact our sales office for products other than the above.
3. 2
TO-92S (Forming)
Table 3
Magnetic
Sensitivity
(BOP)
S-5742NBL1B-Y3n3U
Nch open-drain output
Bipolar latch VOUT = "L" at S pole detection 3.0 mT typ.
S-5742NBL2B-Y3n3U
Nch open-drain output
Bipolar latch VOUT = "L" at S pole detection 6.0 mT typ.
S-5742RBH1B-Y3n3U Nch driver built-in pull-up resistor Bipolar latch VOUT = "H" at S pole detection 3.0 mT typ.
*1. "n" changes according to the packing specification as follows.
B: Bulk, Z: Tape and ammo
Product Name*1
Pole
Detection
Output Form
Output logic
Remark Please contact our sales office for products other than the above.
Pin Configuration
1.
TO-92S
Table 4
Pin No.
Bottom view
1
2
3
Figure 3
4
Symbol
Description
1
VDD
Power supply pin
2
VSS
GND pin
3
OUT
Output pin
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Absolute Maximum Ratings
Table 5
Item
Symbol
Power supply voltage
VDD
Output current
IOUT
Output voltage
Nch open-drain output product
Nch driver built-in pull-up resistor product
Operation ambient temperature
Storage temperature
VOUT
(Ta = 25C unless otherwise specified)
Absolute Maximum Rating
Unit
VSS 0.3 to VSS 28.0
20
V
mA
VSS 0.3 to VSS 28.0
V
VSS 0.3 to VDD 0.3
V
Topr
40 to 125
C
Tstg
40 to 150
C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Thermal Resistance Value
Table 6
Item
Junction-to-ambient thermal resistance
*1. When not mounted on board
Remark
Symbol
JA
Condition
TO-92S
Min.
Typ.
153*1
Max.
Unit
C/W
Refer to " Power Dissipation" for details.
5
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Electrical Characteristics
Item
Table 7
(Ta = 25C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
Test
Condition
Min. Typ. Max. Unit
Circuit
Symbol
Power supply voltage
VDD
Current consumption
IDD
Output voltage
VOUT
Output drop voltage
VD
Leakage current
ILEAK
Nch open-drain output product
Average value
Nch driver built-in pull-up resistor product
Average value, VOUT = "H"
Nch open-drain output product
Output transistor Nch, VOUT = "L", IOUT = 10 mA
Nch driver built-in pull-up resistor product
Output transistor Nch, VOUT = "L", IOUT = 10 mA
Nch driver built-in pull-up resistor product
VOUT = "H", VD = VDD VOUT
Nch open-drain output product
Output transistor Nch, VOUT = "H" = 26.0 V
3.5
12.0
26.0
V
3.0
4.0
mA
1
3.0
4.0
mA
1
0.4
V
2
0.5
V
2
20
mV
2
10
A
3
Output limit current
IOM
VOUT = 12.0 V
22
70
mA
3
Output delay time
Chopping frequency
Start up time
tD
fC
tPON
8.0
500
20
s
kHz
s
4
2.0
s
5
Output rise time
tR
Nch open-drain output product
C = 20 pF, R = 820
Nch driver built-in pull-up resistor product
C = 20 pF
C = 20 pF, R = 820
6.0
s
5
2.0
13
5
7
10
s
Nch driver built-in pull-up resistor product
k
Output fall time
Pull-up resistor
tF
RL
S pole
BOP
0
Magnetic flux density
applied to this IC (B)
BRP
N pole
tD
tD
tF
Output voltage (VOUT)
(Product with VOUT = "L"
at S pole detection)
tR
90%
10%
tD
tD
tR
90%
Output voltage (VOUT)
(Product with VOUT = "H"
at S pole detection)
10%
Figure 4
6
Operation Timing
tF
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Magnetic Characteristics
1.
Product with BOP = 1.8 mT typ.
Table 8
(Ta = 25C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
Item
Operation point*1
S pole
Release point*2
N pole
*3
Hysteresis width
2.
Symbol
BOP
BRP
BHYS
Condition
BHYS = BOP BRP
Min.
0.3
3.3
Typ.
1.8
1.8
3.6
Max.
3.3
0.3
Unit
mT
mT
mT
Test Circuit
4
4
4
Product with BOP = 3.0 mT typ.
Table 9
(Ta = 25C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
Item
Operation point*1
S pole
Release point*2
N pole
Hysteresis width*3
3.
Symbol
BOP
BRP
BHYS
Condition
BHYS = BOP BRP
Min.
1.5
4.5
Typ.
3.0
3.0
6.0
Max.
4.5
1.5
Unit
mT
mT
mT
Test Circuit
4
4
4
Product with BOP = 6.0 mT typ.
Table 10
(Ta = 25C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Test Circuit
*1
Operation point
3.0
6.0
9.0
mT
4
S pole
BOP
Release point*2
9.0
6.0
3.0
mT
4
N pole
BRP
Hysteresis width*3
BHYS = BOP BRP
12.0
mT
4
BHYS
*1. BOP: Operation point
BOP is the value of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux density applied
to this IC by the magnet (S pole) is increased (by moving the magnet closer).
VOUT retains the status until a magnetic flux density of the N pole higher than BRP is applied.
*2. BRP: Release point
BRP is the value of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux density applied
to this IC by the magnet (N pole) is increased (by moving the magnet closer).
VOUT retains the status until a magnetic flux density of the S pole higher than BOP is applied.
*3. BHYS: Hysteresis width
BHYS is the difference of magnetic flux density between BOP and BRP.
Remark
The unit of magnetic flux density mT can be converted by using the formula 1 mT = 10 Gauss.
7
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Test Circuits
A
*1
VDD
R
820
S-5742
B Series OUT
VSS
*1.
Resistor (R) is unnecessary for Nch driver built-in pull-up resistor product.
Figure 5
Test Circuit 1
VDD
S-5742
B Series OUT
VSS
Figure 6
A
V
Test Circuit 2
VDD
S-5742
B Series OUT
VSS
A
V
Figure 7 Test Circuit 3
*1
VDD
R
820
S-5742
B Series OUT
VSS
*1.
Resistor (R) is unnecessary for Nch driver built-in pull-up resistor product.
Figure 8
8
V
Test Circuit 4
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
*1
VDD
S-5742 OUT
B Series
VSS
*1.
R
820
C
20 pF
V
Resistor (R) is unnecessary for Nch driver built-in pull-up resistor product.
Figure 9
Test Circuit 5
Standard Circuit
*1
VDD
CIN
0.1 F
*1.
R
820
S-5742
B Series OUT
VSS
Resistor (R) is unnecessary for Nch driver built-in pull-up resistor product.
Figure 10
Caution The above connection diagram and constant will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constant.
9
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Operation
1.
Direction of applied magnetic flux
This IC detects the magnetic flux density which is vertical to the marking surface.
Figure 11 shows the direction in which magnetic flux is being applied.
N
S
Marking surface
Figure 11
2.
Position of Hall sensor
Figure 12 shows the position of Hall sensor.
The center of this Hall sensor is located in the area indicated by a circle, which is in the center of a package as
described below.
The center of Hall sensor;
in this 0.3 mm
Figure 12
10
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
3.
Basic operation
This IC changes the output voltage (VOUT) according to the level of the magnetic flux density and a polarity change (N
pole or S pole) applied by a magnet.
3. 1
Product with VOUT = "L" at S pole detection
When the magnetic flux density of the S pole perpendicular to the marking surface exceeds the operation point
(BOP) after the S pole of a magnet is moved closer to the marking surface of this IC, VOUT changes from "H" to "L".
When the N pole of a magnet is moved closer to the marking surface of this IC and the magnetic flux density of the
N pole is higher than the release point (BRP), VOUT changes from "L" to "H". In case of BRP B BOP, VOUT retains
the status. Figure 13 shows the relationship between the magnetic flux density and VOUT.
VOUT
BHYS
H
L
N pole
0
BRP
BOP
S pole
Magnetic flux density (B)
Figure 13
3. 2
Product with VOUT = "H" at S pole detection
When the magnetic flux density of the S pole perpendicular to the marking surface exceeds BOP after the S pole of a
magnet is moved closer to the marking surface of this IC, V OUT changes from "L" to "H". When the
N pole of a magnet is moved closer to the marking surface of this IC and the magnetic flux density of the N pole is
higher than BRP, VOUT changes from "H" to "L". In case of BRP B BOP, VOUT retains the status.
Figure 14 shows the relationship between the magnetic flux density and VOUT.
VOUT
BHYS
H
L
N pole
BRP
0
BOP
S pole
Magnetic flux density (B)
Figure 14
11
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
4. Timing chart
Figure 15 shows the operation timing at power-on.
The initial output voltage at rising of power supply voltage (VDD) is either "H" or "L".
In case of B BOP (operation point) or B BRP (release point) at the time when the start up time (tPON) is passed after
rising of VDD, this IC outputs VOUT according to the applied magnetic flux density.
In case of BRP B BOP at the time when tPON is passed after rising of VDD, this IC maintains the initial output voltage.
Product with VOUT = "L" at S pole detection
Product with VOUT = "H" at S pole detection
Power supply voltage
(VDD)
Power supply voltage
(VDD)
tPON
tPON
Output voltage (VOUT)
(B BOP)
"H" / "L"
"L"
Output voltage (VOUT)
(B BOP)
"H" / "L"
"H"
Output voltage (VOUT)
(B BRP)
"H" / "L"
"H"
Output voltage (VOUT)
(B BRP)
"H" / "L"
"L"
Output voltage (VOUT)
(BRP B BOP)
"H" / "L"
Latching
Output voltage (VOUT)
(BRP B BOP)
"H" / "L"
Figure 15
12
Latching
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Precautions
If the impedance of the power supply is high, the IC may malfunction due to a supply voltage drop caused by feedthrough current. Take care with the pattern wiring to ensure that the impedance of the power supply is low.
Note that the IC may malfunction if the power supply voltage rapidly changes. When the IC is used under the
environment where the power supply voltage rapidly changes, it is recommended to judge the output voltage of the IC
by reading it multiple times.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
Although this IC has a built-in output current limit circuit, it may suffer physical damage such as product deterioration
under the environment where the absolute maximum ratings are exceeded.
The application conditions for the power supply voltage, the pull-up voltage, and the pull-up resistor should not exceed
the power dissipation.
Large stress on this IC may affect on the magnetic characteristics. Avoid large stress which is caused by the handling
during or after mounting the IC on a board.
ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
13
125C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.2.1_02
S-5742 B Series
Power Dissipation
TO-92S
Tj = 150C max.
Power dissipation (PD) [W]
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
150
Ambient temperature (Ta) [C]
Power Dissipation (PD)
0.82 W (when not mounted on board)
14
175
1.62max.
4.1max.
Marked side
0.55max.
0.65max.
0.51max.
0.48max.
1.27
No. YB003-A-P-SD-1.0
TITLE
TO92S-C-PKG Dimensions
YB003-A-P-SD-1.0
No.
ANGLE
UNIT
mm
ABLIC Inc.
12.7±0.3
1.0max.
Marked side
Marked side
Marked side
1#pin
1.0max.
1.0max.
Marked side
3#pin
1.45max.
ø4.0±0.2
6.35±0.3
12.7±0.2
Marked side
Marked side
Marked side
Feed direction
No. YC003-A-C-SD-1.1
TITLE
TO92S-E-Radial Tape
No.
YC003-A-C-SD-1.1
ANGLE
UNIT
mm
ABLIC Inc.
Spacer(Sponge)
310
15
35
Side spacer placed in front side
157
320
Space more than 4 strokes
162
333
43
No. YC003-A-Z-SD-1.0
TITLE
TO92S-E-Ammo Packing
YC003-A-Z-SD-1.0
No.
ANGLE
UNIT
QTY.
mm
ABLIC Inc.
2,000
1.62max.
4.1max.
Marked side
0.55max.
0.65max.
0.48max.
0.51max.
2.5±0.3
1.27
No. YB003-B-P-SD-1.0
TITLE
TO92S-D-PKG Dimensions
YB003-B-P-SD-1.0
No.
ANGLE
UNIT
mm
ABLIC Inc.
12.7±0.3
1.0max.
Marked side
Marked side
Marked side
1#pin
1.0max.
1.0max.
Marked side
3#pin
1.45max.
ø4.0±0.2
6.35±0.3
12.7±0.2
Marked side
Marked side
Marked side
Feed direction
No. YC003-B-C-SD-1.1
TITLE
TO92S-F-Radial Tape
No.
YC003-B-C-SD-1.1
ANGLE
UNIT
mm
ABLIC Inc.
Spacer(Sponge)
310
15
35
Side spacer placed in front side
157
320
Space more than 4 strokes
162
333
43
No. YC003-B-Z-SD-1.0
TITLE
TO92S-F-Ammo Packing
YC003-B-Z-SD-1.0
No.
ANGLE
UNIT
QTY.
mm
ABLIC Inc.
2,000
Disclaimers (Handling Precautions)
1.
All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2.
The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4.
Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5.
Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6.
When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7.
The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8.
The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9.
In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
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