LV5217GP-TE-L-E

Ordering number : ENA0833A LV5217GP Bi-CMOS IC 3ch LED Driver http://onsemi.com Overview This LV5217GP is 3-channel LED driver for cell phones. Each LED driver current can be adjusted by I2C bus. LV5217GP can perform various illumination effects with a full-color LED display. Features • Three color LED driver circuits. • The LED current can be switched independently in 7-bit units (0.31 to 25.48mA). • Independent on/off control of the three LED drivers (independent control of the 3 RGB colors). • Each LED drive current level can be adjusted independently over the I2C bus. • Miniature package. • Thermal shutdown circuit. Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage 1 VCC max 6.0 V Supply voltage 2 VDD max 6.0 V VINB 6.0 V Maximum output current IO max 30.0 mA STBY pin voltage VSTBY 6.0 V Allowable power dissipation Pd max Maximum input current 0.55 W Operating temperature Topr Mounted on the specified board * -30 to +75 °C Storage temperature Tstg -40 to +125 °C The specified board * : 50mm × 40mm × 0.8mm glass epoxy (4-layer circuit board). Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 August, 2013 O0610 SY/52307 MS PC 20070412-S00010 No.A0833-1/12 LV5217GP Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage 1 VCC 3.0 to 4.5 V Supply voltage 2 VDD 1.6 to 3.0 V Electrical Characteristics Ta = 25°C, VCC = 3.7V, VDD = 1.8V, RT = 56kΩ, Unless otherwise specified. Parameter Symbol Ratings Conditions min Unit typ max Overall Characteristics Current drain 1 ICC1 STBY = L *1 Current drain 2 ICC2 STBY = H, LED ON= L *1 0.7 5 μA 2 mA With the default serial data settings High-level input voltage 1 VINH1 Serial data signals, LEDON pin VDD×0.8 Low-level input voltage 1 VINL1 Serial data signals, LEDON pin 0 High-level input voltage 2 VINH2 STBY pin 1.4 Low-level input voltage 2 VINL2 STBY pin 0 V VDD×0.2 V 0.2 V V LED Driver Block Minimum output current IMIN When the serial data is 0000001, VO = 0.5V 0.0 0.2 1.0 mA Maximum output current LED current value accuracy IMAX When the serial data is 1111111, VO = 0.5V 23.0 25.4 28.0 mA IDIF When current value is set to 4mA (0010011) -8 8 Differential linearity error % DLE *2 -2 2 LSB LED pin saturation voltage VLED At the maximum current setting Leakage current ILEAK Drivers : off, VO = 5V 0.3 V 1 μA VO : LED pin voltage. *1. The sum of the VCC and VDD current drain values. *2. Differential linearity error : The difference between the actual and ideal amounts when one low-order bit value is added. Package Dimensions unit : mm (typ) 3318 Pd max – Ta TOP VIEW SIDE VIEW BOTTOM VIEW (0.125) (0.13) 2.6 16 0.4 2.6 (C0.116) 2 1 0.5 LASER MARKED INDEX (0.55) Allowable power dissipation, Pd max – W 0.6 0.55 0.5 0.4 0.3 0.28 0.2 0.1 0 – 30 – 20 SIDE VIEW Specified board : 50×40×0.8mm3 glass epoxy 0 20 40 60 80 100 0.25 (0.035) 0.8 Ambient temperature, Ta – °C SANYO : VCT16(2.6X2.6) No.A0833-2/12 LV5217GP Block Diagram VDD 12 VBAT NC11 11 STBY 13 RLED GLED BLED NC10 10 SCL1 9 Interface level shifters 8 SDAI 7 VCC 14 Serial bus interface 15 6 NC6 16 5 NC5 IREF 1 2 TEST 3 GND RT 4 LEDON 56kΩ Note 1 : The TEST pin must be tied to ground. Pin Functions Pin No. Pin name 1 TEST Test signal input: This pin must be connected to ground. Function 2 GND Ground 3 RT 4 LEDON 5 NC5 Reference current setting resistor connection External LED control pin No connection 6 NC6 No connection 7 VCC Circuit system power supply 8 SDAI Serial data signal input 9 SCLI Serial clock signal input 10 NC10 No connection 11 NC11 No connection 12 VDD Power supply for logic system 13 STBY Standby mode control 14 RLED Red LED driver output 15 GLED Green LED driver output 16 BLED Blue LED driver output No.A0833-3/12 LV5217GP Pin Functions Pin No. 4 Symbol LEDON Description Equivalent circuit Control inputs for the three external colored LEDs. VCC When an RSW, GSW, or BSW bit in the serial data VDD is set to 1, the corresponding LED will be on when the voltage applied to the corresponding pin is high, and off when the voltage applied is low. LEDON 10kΩ GND 8 SDAI 9 SCLI I2C signal inputs VCC VDD Each input 10kΩ GND 3 RT Reference current setting resistor connection. A reference current is created by connecting an VCC external resistor between this pin and ground. The 30pF pin voltage is roughly 1.2V. The LED driver current can be changed by changing this current value. RT 35kΩ 10kΩ GND 14 RLED Driver outputs for the three color LEDs. 15 GLED Feedback is applied to control the current flowing in 16 BLED the output transistors to be the set value. Each of the driver output current levels can be set VCC RLED independently with the serial data. 5Ω GND Continued on next page. No.A0833-4/12 LV5217GP Continued from preceding page. Pin No. 1 Symbol TEST Description Test signal input. This pin must be connected to ground. Equivalent circuit VCC 50kΩ TEST 50.5Ω 50kΩ GND 13 STBY Standby mode pin. The LV5217GP goes to standby mode when the VCC VDD STBY pin is at the low level. STBY 10kΩ GND 7 VCC 12 VDD Circuit system power supply Power supply for Logic 3 GND Ground No.A0833-5/12 LV5217GP Power Supply Application 1. Either bring up VCC and VDD at the same time, or bring up VCC first then VDD. 2. Then, set the serial data. (After the serial data has been set, a period of about 2μs is required as the startup time for the IC internal circuits.) 3. Finally, clear the STBY pin states. Serial Data Map Register address A7 A6 A5 A4 A3 Data A2 A1 A0 D7 D6 D5 D4 RSW 0 0 0 0 0 0 0 0 0 0 0 0 GSW 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 D2 D1 D0 0 0 0 0 0 0 0 G[6:0] 0 0 0 0 0 0 0 0 0 0 BSW 0 D3 R[6:0] 0 B[6:0] Upper row : Register name, Lower row : default value Serial Data Mode Settings R mode 0 0 0 0 0 0 0 0 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0 0 0 1 0 D7 D6 D5 D4 D3 D2 D1 D0 LEDR output setting D7 RSW 0 OFF (default) 1 ON G mode 0 0 0 0 LEDR output setting D7 GSW 0 OFF (default) 1 ON B mode 0 0 0 0 LEDR output setting D7 BSW 0 OFF (default) 1 ON No.A0833-6/12 LV5217GP D6-D0 current setting (Common to R, G and B) D6 D5 D4 D3 D2 D1 D0 Current [mA] 0 0 0 0 0 0 0 0.1 (Default) *1 0 0 0 0 0 0 1 0.31 0 0 0 0 0 1 0 0.52 0 0 0 0 0 1 1 0.72 0 0 0 0 1 0 0 0.93 0 0 0 0 1 0 1 1.13 0 0 0 0 1 1 0 1.34 0 0 0 0 1 1 1 1.54 0 0 0 1 0 0 0 1.74 0 0 0 1 0 0 1 1.94 0 0 0 1 0 1 0 2.14 0 0 0 1 0 1 1 2.34 0 0 0 1 1 0 0 2.54 0 0 0 1 1 0 1 2.74 0 0 0 1 1 1 0 2.95 0 0 0 1 1 1 1 3.15 0 0 1 0 0 0 0 3.35 0 0 1 0 0 0 1 3.46 0 0 1 0 0 1 0 3.76 0 0 1 0 0 1 1 3.97 0 0 1 0 1 0 0 4.17 0 0 1 0 1 0 1 4.37 0 0 1 0 1 1 0 4.57 0 0 1 0 1 1 1 4.76 0 0 1 1 0 0 0 4.97 0 0 1 1 0 0 1 5.17 0 0 1 1 0 1 0 5.37 0 0 1 1 0 1 1 5.57 0 0 1 1 1 0 0 5.78 0 0 1 1 1 0 1 5.98 0 0 1 1 1 1 0 6.18 0 0 1 1 1 1 1 6.39 0 1 0 0 0 0 0 6.60 0 1 0 0 0 0 1 6.80 0 1 0 0 0 1 0 6.99 0 1 0 0 0 1 1 7.19 0 1 0 0 1 0 0 7.39 0 1 0 0 1 0 1 7.60 0 1 0 0 1 1 0 7.80 0 1 0 0 1 1 1 7.99 0 1 0 1 0 0 0 8.19 0 1 0 1 0 0 1 8.40 0 1 0 1 0 1 0 8.60 0 1 0 1 0 1 1 8.80 0 1 0 1 1 0 0 9.00 0 1 0 1 1 0 1 9.20 0 1 0 1 1 1 0 9.40 0 1 0 1 1 1 1 9.60 0 1 1 0 0 0 0 9.80 0 1 1 0 0 0 1 10.00 0 1 1 0 0 1 0 10.20 0 1 1 0 0 1 1 10.40 0 1 1 0 1 0 0 10.60 0 1 1 0 1 0 1 10.80 Continued on next page. No.A0833-7/12 LV5217GP Continued from preceding page. D6 D5 D4 D3 D2 D1 D0 Current [mA] 0 1 1 0 1 1 0 11.00 0 1 1 0 1 1 1 11.20 0 1 1 1 0 0 0 11.40 0 1 1 1 0 0 1 11.60 0 1 1 1 0 1 0 11.80 0 1 1 1 0 1 1 12.00 0 1 1 1 1 0 0 12.20 0 1 1 1 1 0 1 12.40 0 1 1 1 1 1 0 12.60 0 1 1 1 1 1 1 12.80 1 0 0 0 0 0 0 12.99 1 0 0 0 0 0 1 13.19 1 0 0 0 0 1 0 13.39 1 0 0 0 0 1 1 13.59 1 0 0 0 1 0 0 13.79 1 0 0 0 1 0 1 13.98 1 0 0 0 1 1 0 14.18 1 0 0 0 1 1 1 14.38 1 0 0 1 0 0 0 14.58 1 0 0 1 0 0 1 14.78 1 0 0 1 0 1 0 14.97 1 0 0 1 0 1 1 15.17 1 0 0 1 1 0 0 15.37 1 0 0 1 1 0 1 15.57 1 0 0 1 1 1 0 15.77 1 0 0 1 1 1 1 15.96 1 0 1 0 0 0 0 16.16 1 0 1 0 0 0 1 16.36 1 0 1 0 0 1 0 16.56 1 0 1 0 0 1 1 16.76 1 0 1 0 1 0 0 16.96 1 0 1 0 1 0 1 17.15 1 0 1 0 1 1 0 17.35 1 0 1 0 1 1 1 17.55 1 0 1 1 0 0 0 17.75 1 0 1 1 0 0 1 17.95 1 0 1 1 0 1 0 18.15 1 0 1 1 0 1 1 18.34 1 0 1 1 1 0 0 18.54 1 0 1 1 1 0 1 18.74 1 0 1 1 1 1 0 18.94 1 0 1 1 1 1 1 19.14 1 1 0 0 0 0 0 19.33 1 1 0 0 0 0 1 19.53 1 1 0 0 0 1 0 19.73 1 1 0 0 0 1 1 19.93 1 1 0 0 1 0 0 20.13 1 1 0 0 1 0 1 20.32 1 1 0 0 1 1 0 20.52 1 1 0 0 1 1 1 20.72 1 1 0 1 0 0 0 20.92 1 1 0 1 0 0 1 21.12 1 1 0 1 0 1 0 21.31 1 1 0 1 0 1 1 21.51 1 1 0 1 1 0 0 21.71 Continued on next page. No.A0833-8/12 LV5217GP Continued from preceding page. D6 D5 D4 D3 D2 D1 D0 Current [mA] 1 1 0 1 1 0 1 21.91 1 1 0 1 1 1 0 22.11 1 1 0 1 1 1 1 22.30 1 1 1 0 0 0 0 22.50 1 1 1 0 0 0 1 22.70 1 1 1 0 0 1 0 22.90 1 1 1 0 0 1 1 23.10 1 1 1 0 1 0 0 23.29 1 1 1 0 1 0 1 23.49 1 1 1 0 1 1 0 23.69 1 1 1 0 1 1 1 23.89 1 1 1 1 0 0 0 24.09 1 1 1 1 0 0 1 24.29 1 1 1 1 0 1 0 24.48 1 1 1 1 0 1 1 24.68 1 1 1 1 1 0 0 24.88 1 1 1 1 1 0 1 25.08 1 1 1 1 1 1 0 25.28 1 1 1 1 1 1 1 25.48 * Note 1 : There is significant current variance, so care should be taken for use. The current value can be set when D7 is “0.” No.A0833-9/12 LV5217GP Serial Bus Communication Specifications I2C serial transfer timing conditions twH SCL th1 twL th2 tbuf SDA th1 ts2 ts1 ts3 Resend start condition Start condition ton Stop condition tof Input waveform condition Standard mode Parameter symbol Conditions min typ SCL clock frequency Data setup time ts1 The SCL setup time from the SDA rising edge 4.7 ts2 The SDA setup time from the SCL rising edge 250 ns ts3 The SCL setup time from the SDA rising edge 4.0 μs th1 The SCL hold time from the SDA falling edge 4.0 μs th2 The SDA hold time from the SCL falling edge 0 μs twL SCL low period pulse width 4.7 μs twH SCL high period pulse width 4.0 ton SCL, SDA (input) rising time 1000 ns tof SCL, SDA (input) falling time 300 ns tbuf Time between STOP and TART conditions Pulse width Input waveform conditions Bus free time 100 unit fscl Data hold time 0 max SCL clock frequency kHz μs μs μs 4.7 High-speed mode Parameter Symbol Conditions min typ SCL clock frequency Data setup time ts1 The SCL setup time from the SDA rising edge 0.6 ts2 The SDA setup time from the SCL rising edge 100 ns ts3 The SCL setup time from the SDA rising edge 0.6 μs th1 The SCL hold time from the SDA falling edge 0.6 μs th2 The SDA hold time from the SCL falling edge 0 μs twL SCL low period pulse width 1.3 μs twH SCL high period pulse width 0.6 ton SCL, SDA (input) rising time 300 ns tof SCL, SDA (input) falling time 300 ns tbuf Time between STOP condition and TART condition Pulse width Input waveform conditions Bus free time 1.3 400 unit fscl Data hold time 0 max SCL clock frequency kHz μs μs μs No.A0833-10/12 LV5217GP I2C bus transmission method START condition and STOP condition When transferring data over an I2C bus, SDA must basically be held in certain states while SCL is High, as shown in the figure below. SCL SDA ts2 th2 Both SCL and SDA are high when not performing data transfer. When both SCL and SDA are high, changing SDA from high to low generates the START condition and starts access. Changing SDA from low to high while SCL is high generates the STOP condition and ends access. Start condition Stop condition th1 th3 SCL SDA Data transfer and confirmation response After the START condition is generated, data is transferred one byte (8 bits) at a time. Data can be transferred continuously for any number of bytes. The ACK signal is sent from the receiving to the transmitting side each time 8 bits of data are transferred. The transmitting side releases the SDA line immediately after the SCL clock pulse corresponding to the 8th data transfer bit as it falls to Low, and the receiving side then sends the ACK signal by setting SDA Low. After the receiving side sends the ACK signal, if the next byte transfer is still in receive mode, the receiving side releases the SDA line at the falling edge of the 9th SCL clock. The I2C bus does not have a CE signal, so instead a 7-bit slave address is assigned to each device. The first byte of each transfer is assigned to this 7-bit slave address and a command (R/W) indicating the transfer direction of the following data. Note that only Write mode is valid for this IC. The 7-bit address is transferred in order from the MSB, and the 8th bit is Low to indicate Write mode. The LV5217GP slave address is prescribed as “1110101.” Start M S B Slave address L S B W A C K M S B Register address L S B A C K M S B Data L S B A C K Stop SCL SDA 1 1 1 0 1 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 No.A0833-11/12 LV5217GP ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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