SN74LS641DWR2

SN74LS640, SN74LS641, SN74LS642, SN74LS645 Octal Bus Transceivers These octal bus transceivers are designed for asynchronous two-way communication between data buses. Control function implementation minimizes external timing requirements. These circuits allow data transmission from the A bus to B or from the B bus to A bus depending upon the logic level of the direction control (DIR) input. Enable input (G) can disable the device so that the buses are effectively isolated. DEVICE LS640 LS641 LS642 LS645 OUTPUT 3-State Open-Collector Open-Collector 3-State http://onsemi.com LOW POWER SCHOTTKY LOGIC Inverting True Inverting True MARKING DIAGRAMS SN74LS64xN AWLYYWW FUNCTION TABLE CONTROL INPUTS 1 20 1 OPERATION G DIR LS640 LS642 LS641 LS645 L L B data to A bus B data to A bus L H A data to B bus A data to B bus H X Isolation Isolation PDIP−20 N SUFFIX CASE 738 LS64y AWLYYWW 20 H = HIGH Level, L = LOW Level, X = Irrelevant 1 1 GUARANTEED OPERATING RANGES (SN74LS640, SN74LS645) Symbol VCC Parameter Supply Voltage TA Operating Ambient Temperature Range IOH Output Current − High IOL Min Typ Max Unit 4.75 5.0 5.25 V 0 25 70 °C −3.0 mA −15 mA 24 mA Output Current − Low GUARANTEED OPERATING RANGES (SN74LS641, SN74LS642) Symbol VCC Parameter Supply Voltage Min Typ Max Unit 4.75 5.0 5.25 V 0 25 70 °C TA Operating Ambient Temperature Range VOH Output Voltage − High 5.5 V IOL Output Current − Low 24 mA SOIC−20 DW SUFFIX CASE 751D 74LS64y AWLYWW 20 1 1 1 SOEIAJ−20 M SUFFIX CASE 967 x = 0, 1, 2, or 5 y = 0, 1, or 2 A = Assembly Location WL = Wafer Lot Y, YY= Year WW = Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 11 1 Publication Order Number: SN74LS640/D SN74LS640, SN74LS641, SN74LS642, SN74LS645 CONNECTION DIAGRAMS DIP (TOP VIEW) ENABLE B1 G 20 19 18 B2 B3 B4 B5 B6 B7 B8 17 16 15 14 13 12 11 1 DIR 4 A3 5 A4 6 A5 7 A6 8 A7 9 A8 10 GND VCC 2 A1 3 A2 ENABLE VCC G B1 20 19 18 B2 B3 B4 B5 B6 B7 B8 17 16 15 14 13 12 11 1 DIR 4 A3 5 A4 6 A5 7 A6 8 A7 9 A8 10 GND Figure 1. SN74LS640 SN74LS642 2 A1 3 A2 Figure 2. SN74LS641 SN74LS645 http://onsemi.com 2 SN74LS640, SN74LS641, SN74LS642, SN74LS645 SN74LS640 • SN74LS645 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage VOH Min Parameter Typ Max 2.0 0.6 −0.65 2.4 Output HIGH Voltage −1.5 3.4 2.0 Unit Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs V VCC = MIN, IIN = − 18 mA V VCC = MIN, IOH = 3.0 mA V VCC = MIN, IOH = MAX 0.25 0.4 V IOL = 12 mA 0.35 0.5 V IOL = 24 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VOL Output LOW Voltage IOZH Output Off Current HIGH 20 μA VCC = MAX, VOUT = 2.7 V IOZL Output Off Current LOW −400 μA VCC = MAX, VOUT = 0.4 V IIH Input HIGH Current A or B, DIR or G 20 μA VCC = MAX, VIN = 2.7 V DIR or G 0.1 mA VCC = MAX, VIN = 7.0 V A or B 0.1 mA VCC = MAX, VIN = 5.5 V −0.4 mA VCC = MAX, VIN = 0.4 V −225 mA VCC = MAX mA VCC = MAX IIL Input LOW Current IOS Output Short Circuit Current (Note 1) ICC −40 Power Supply Current Total Output HIGH 70 Total, Output LOW 90 95 Total at HIGH Z 1. Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) Limits LS640 Min LS645 Typ Max Min Typ Max Unit 6.0 8.0 10 15 8.0 11 15 15 ns tPLH tPHL Parameter Propagation Delay A to B tPLH tPHL Propagation Delay B to A 6.0 8.0 10 15 8.0 11 15 15 ns tPZL tPZH Output Enable Time G, DIR to A 31 23 40 40 31 26 40 40 ns tPZL tPZH Output Enable Time G, DIR to B 31 23 40 40 31 26 40 40 ns tPLZ tPHZ Output Disable Time G, DIR to A 15 15 25 25 15 15 25 25 ns tPLZ tPHZ Output Disable Time G, DIR to B 15 15 25 25 15 15 25 25 ns Symbol http://onsemi.com 3 Test Conditions CL = 45 pF, RL = 667 Ω CL = 5.0 pF SN74LS640, SN74LS641, SN74LS642, SN74LS645 SN74LS641 • SN74LS642 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage IOH Output HIGH Current VOL Output LOW Voltage IIH Input HIGH Current IIL Input LOW Current ICC Min Parameter Typ Max Unit Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs −1.5 V VCC = MIN, IIN = − 18 mA 100 μA VCC = MIN, VOH = MAX 0.25 0.4 V IOL = 12 mA 0.35 0.5 V IOL = 24 mA 20 μA VCC = MAX, VIN = 2.7 V −0.1 mA VCC = MAX, VIN = 7.0 V −0.4 mA VCC = MAX, VIN = 0.4 V mA VCC = MAX 2.0 0.6 −0.65 Power Supply Current Total, Output HIGH 70 Total, Output LOW 90 Total at HIGH Z 95 VCC = VCC MIN, VIN = VIL or VIH per Truth Table AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) Limits LS641 Symbol Parameter Min LS642 Typ Max Min Typ Max Unit tPLH tPHL Propagation Delay, A to B 17 16 25 25 19 14 25 25 ns tPLH tPHL Propagation Delay, B to A 17 16 25 25 19 14 25 25 ns tPLH tPHL Propagation Delay, G, DIR to A 23 34 40 50 26 43 40 60 ns tPLH tPHL Propagation Delay, G, DIR to B 25 37 40 50 28 39 40 60 ns http://onsemi.com 4 Test Conditions CL = 45 pF, RL = 667 Ω SN74LS640, SN74LS641, SN74LS642, SN74LS645 DEVICE ORDERING INFORMATION Device Order Number Package Type Tape and Reel Size PDIP−20 1440 Units/Box SN74LS640DW SOIC−WIDE 2500/Tape and Reel SN74LS640DWR2 SOIC−WIDE 2500/Tape and Reel SN74LS640M SOEIAJ−20 See Note 2 SN74LS640MEL SOEIAJ−20 See Note 2 PDIP−20 1440 Units/Box SN74LS641DW SOIC−WIDE 2500/Tape and Reel SN74LS641DWR2 SOIC−WIDE 2500/Tape and Reel SN74LS641M SOEIAJ−20 See Note 2 SN74LS641MEL SOEIAJ−20 See Note 2 PDIP−20 1440 Units/Box SN74LS642DW SOIC−WIDE 2500/Tape and Reel SN74LS642DWR2 SOIC−WIDE 2500/Tape and Reel SN74LS642M SOEIAJ−20 See Note 2 SN74LS642MEL SOEIAJ−20 See Note 2 PDIP−20 1440 Units/Box SN74LS640N SN74LS641N SN74LS642N SN74LS645N 2. For ordering information on the EIAJ version of the SOIC package, please contact your local ON Semiconductor representative. http://onsemi.com 5 SN74LS640, SN74LS641, SN74LS642, SN74LS645 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 738−03 ISSUE E −A− 20 11 1 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. B L C −T− K SEATING PLANE G M N E F D J 0.25 (0.010) 20 PL 0.25 (0.010) 20 PL M T A M http://onsemi.com 6 M T B M DIM A B C D E F G J K L M N INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01 SN74LS640, SN74LS641, SN74LS642, SN74LS645 PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751D−05 ISSUE F A 20 q X 45 _ 1 10 20X B B 0.25 M T A S B S A L 0.25 E h H M 10X NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 18X e A1 SEATING PLANE C T http://onsemi.com 7 DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ SN74LS640, SN74LS641, SN74LS642, SN74LS645 PACKAGE DIMENSIONS M SUFFIX SOEIAJ PACKAGE CASE 967−01 ISSUE O 20 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 11 Q1 E HE 1 M_ L 10 DETAIL P Z D e VIEW P A A1 b 0.13 (0.005) c M 0.10 (0.004) DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 0.81 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.032 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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