ASNT2123-KMM

Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ASNT2123-KMM DC-64Gbps Broadband Digital DDR 1:4 Demultiplexer  Single +3.3V or -3.3V power supply  Power consumption: 1.16W  Fabricated in SiGe for high performance, yield, and reliability  Custom CQFP 44-pin package vee vcc Quarter-rate clock output vcc  c4op Half-rate clock input (DDR mode) vcc  c4on Differential CML I/O data and clock buffers vcc  q0p Exhibits low jitter and limited temperature variation over industrial temperature range vcc  q0n High speed broadband 1:4 Demultiplexer (DMUX) vcc  vcc vee vcc q1p vcc n/c vcc vcc q1n dp ASNT2123-KMM ASNT2123 vcc vcc q2p dn vcc vcc q2n n/c vcc vcc vee Rev. 1.6.2 1 vcc cen vcc cep vcc q3n vcc q3p vcc vee vcc vcc May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com DESCRIPTION vcc q0p q0n q1p q1n vcc dp dn q2p q2n q3p q3n vcc cep cen DIV c4op c4on Fig. 1. Functional Block Diagram ASNT2123-KMM is a low power and high-speed digital 1-to-4 deserializer-demultiplexer (DMUX) that functions seamlessly over data rates (fbit) ranging from DC to its maximum speed. The main function of the part shown in Fig. 1 is to demultiplex an incoming high speed serial differential CML data bit stream dp/dn running at a bit rate of fbit into 4 parallel data channels q0p/q0n, q1p/q1n, q2p/q2n, q3p/q3n running at a bit rate of fbit/4. Differential or single-ended half-rate clock cep/cen must be provided by an external source for the part to function properly. The parallel words and clock divided-by-4 c4op/c4on are transmitted through CML output interfaces. The clock and data outputs are phase-matched to each other resulting in a very little relative skew over the operating temperature range of the device. The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLY CONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. The differential DC signaling mode is recommended for optimal performance. POWER SUPPLY CONFIGURATION The part can operate with either negative supply (vcc = 0.0V = ground and vee = −3.3V), or positive supply (vcc = +3.3V and vee = 0.0V = ground). In case of the positive supply, all I/Os need AC termination when connected to any devices with 50Ohm termination to ground. Different PCB layouts will be needed for each different power supply combination. Rev. 1.6.2 2 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V. ABSOLUTE MAXIMUM RATINGS Caution: Exceeding the absolute maximum ratings shown in Table 1 may cause damage to this product and/or lead to reduced reliability. Functional performance is specified over the recommended operating conditions for power supply and temperature only. AC and DC device characteristics at or beyond the absolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced to ground. Table 1. Absolute Maximum Ratings Parameter Supply Voltage (vee) Power Consumption RF Input Voltage Swing (SE) Case Temperature Storage Temperature Operational Humidity Storage Humidity Rev. 1.6.2 Min -40 10 10 3 Max -3.6 1.3 1.0 +100 +100 98 98 Units V W V ºC ºC % % May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com TERMINAL FUNCTIONS TERMINAL Name No. Type q0p q0n q1p q1n q2p q2n q3p q3n c4op c4on cep cen dp dn Name vcc vee n/c Rev. 1.6.2 30 32 37 39 41 43 4 6 26 28 CML output CML output CML output CML output CML output DESCRIPTION Low-Speed I/Os Differential quarter-rate data outputs. Require external SE 50Ohm termination to vcc Differential quarter-rate clock outputs. Require external SE 50Ohm termination to vcc High-Speed I/Os 8 CML Differential half-rate clock input signals with internal 50Ohm input termination to vcc 10 19 CML Differential full-rate data input signals with internal 50Ohm input termination to vcc 17 Supply and Termination Voltages Description Pin Number Positive power supply 1, 3, 5, 7, 9, 11, 12, 14, 16, 18, 20, 22, 23, 25, 27, (+3.3V or 0) 29, 31, 33, 34, 36, 38, 40, 42, 44 Negative power supply 2, 13, 24, 35 (0V or -3.3V) Not connected pins 15, 21 4 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ELECTRICAL CHARACTERISTICS PARAMETER TYP MAX UNIT COMMENTS General Parameters -3.1 -3.3 -3.5 V ±6% vee 0.0 V External ground vcc Ivee 350 mA Power consumption 1160 mW Junction temperature -40 25 125 °C HS Input Data (dp/dn) Data Rate DC 40 64 Gb/s Swing 0.2 0.8 V Differential or SE, p-p CM Voltage Level vcc-0.8 vcc V Must match for both inputs Half-Rate Input Clock (cep/cen) Frequency DC 20 32 GHz Differential swing 0.2 0.8 V Differential or SE, p-p CM Voltage Level vcc-0.8 vcc V Must match for both inputs Duty Cycle 40 50 60 % LS Output Data (q0p/q0n, q1p/q1n, q2p/q2n, q3p/q3n) Data Rate DC 10 16 Gb/s Logic “1” level V vcc Logic “0” level vcc-0.44 V With external 50Ohm DC termination Output Jitter 2 ps Peak-to-peak at 10Gb/s LS Output Clock (c4op/c4on) Frequency DC 10 16 GHz Logic “1” level V vcc Logic “0” level vcc-0.4 V With external 50Ohm DC termination Duty Cycle 50 % Output Jitter 1 ps Peak-to-peak at 10GHz Rev. 1.6.2 MIN 5 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com PACKAGE INFORMATION The chip die is housed in a custom, 44-pin CQFP package shown in Fig. 2. The package provides a center heat slug located on its back side to be used for heat dissipation. ADSANTEC recommends for this section to be soldered to the vcc plain, which is ground for a negative supply, or power for a positive supply. The part’s identification label is ASNT2123-KMM. The first 8 characters of the name before the dash identify the bare die including general circuit family, fabrication technology, specific circuit type, and part version while the 3 characters after the dash represent the package’s manufacturer, type, and pin out count. This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten substances. Rev. 1.6.2 6 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com Fig. 2. CQFP 44-Pin Package Drawing (All Dimensions in mm) Rev. 1.6.2 7 May 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com REVISION HISTORY Revision 1.6.2 1.5.2 1.5.1 1.4.1 Date 05-2020 07-2019 05-2015 01-2014 1.3.1 02-2013 1.2.1 1.1.1 1.0.1 01-2013 01-2013 01-2013 Rev. 1.6.2 Changes Updated package information Updated Letterhead Updated package information Title correction Corrected electrical characteristics Title correction Corrected description Corrected electrical characteristics Updated package information Updated maximum speed Updated power and current consumption First release 8 May 2020