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MC74HC139ADTEL

MC74HC139ADTEL

  • 厂商:

    ROCHESTER(罗切斯特)

  • 封装:

    TSSOP16

  • 描述:

    DECODER/DRIVER, CMOS, PDSO16

  • 数据手册
  • 价格&库存
MC74HC139ADTEL 数据手册
MC74HC139A Dual 1-of-4 Decoder/ Demultiplexer High–Performance Silicon–Gate CMOS The MC74HC139A is identical in pinout to the LS139. The device inputs are compatible with standard CMOS outputs; with pull–up resistors, they are compatible with LSTTL outputs. This device consists of two independent 1–of–4 decoders, each of which decodes a two–bit Address to one–of–four active–low outputs. Active–low Selects are provided to facilitate the demultiplexing and cascading functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output, and utilizing the Select as a data input. • • • • • • • Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 100 FETs or 25 Equivalent Gates SELECTa 1 16 VCC A0a 2 15 SELECTb A1a 3 14 Y0a 4 13 A0b A1b Y1a 5 12 Y0b Y2a 6 11 Y1b Y3a 7 10 Y2b GND 8 9 Y3b http://onsemi.com MARKING DIAGRAMS 16 16 MC74HC139AN AWLYYWW 1 PDIP–16 N SUFFIX CASE 648 1 16 16 HC139A AWLYWW 1 SO–16 D SUFFIX CASE 751B 1 16 16 HC 139A ALYW 1 TSSOP–16 DT SUFFIX CASE 948F Figure 1. Pin Assignment A L, WL Y, YY W, WW 1 = Assembly Location = Wafer Lot = Year = Work Week FUNCTION TABLE Inputs Outputs Select A1 A0 Y0 Y1 Y2 Y3 H L L L L X L L H H X L H L H H L H H H H H L H H H H H H L H H H L H ORDERING INFORMATION Device  Semiconductor Components Industries, LLC, 2001 June, 2001 – Rev. 8 1 Shipping MC74HC139AN PDIP–16 2000/Box MC74HC139AD SOIC–16 48/Rail SOIC–16 2500/Reel MC74HC139ADR2 X = don’t care Package MC74HC139ADT TSSOP–16 96/Rail MC74HC139ADTR2 TSSOP–16 2500/Reel Publication Order Number: MC74HC139A/D MC74HC139A ADDRESS INPUTS A0a A1a 2 4 3 5 6 7 SELECTa ADDRESS INPUTS A0b A1b Y1a Y2a ACTIVE–LOW OUTPUTS Y3a PIN 16 = VCC PIN 8 = GND 1 14 12 13 11 10 9 SELECTb Y0a Y0b Y1b Y2b Y3b 15 Figure 2. Logic Diagram http://onsemi.com 2 ACTIVE–LOW OUTPUTS MC74HC139A MAXIMUM RATINGS (Note 1) Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) 0.5 to 7.0 V VIN DC Input Voltage (Referenced to GND) 1.5 to VCC 1.5 V VOUT DC Output Voltage 0.5 to VCC 0.5 V IIN DC Input Current, per Pin 20 mA IOUT DC Output Current, per Pin 25 mA ICC DC Supply Current, VCC Pin 50 mA IGND DC Ground Current per Ground Pin 50 mA TSTG Storage Temperature Range 65 to 150 C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 C TJ Junction Temperature Under Bias 150 C JA Thermal Resistance PDIP SOIC TSSOP 78 112 148 C/W PD Power Dissipation in Still Air at 85C PDIP SOIC TSSOP 750 500 450 mW MSL Moisture Sensitivity FR Flammability Rating VESD ESD Withstand Voltage Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model (Note 5) 2000 200 1000 V ILATCH–UP Latch–Up Performance Above VCC and Below GND at 85C (Note 6) 300 mA (Referenced to GND) (Note 2) Level 1 Oxygen Index: 30% – 35% UL–94–VO (0.125 in) 1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. 2. IO absolute maximum rating must be observed. 3. Tested to EIA/JESD22–A114–A. 4. Tested to EIA/JESD22–A115–A. 5. Tested to JESD22–C101–A. 6. Tested to EIA/JESD78. 7. For high frequency or heavy load considerations, see Chapter 2the ON Semiconductor High–Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ Symbol Parameter Min Max Unit VCC DC Supply Voltage (Referenced to GND) 2.0 6.0 V VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V TA Operating Temperature, All Package Types 55 125 C tr, tf Input Rise and Fall Time (Figure 3) 0 0 0 1000 500 400 ns VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 8. Unused inputs may not be left open. All inputs must be tied to a high–logic voltage level or a low–logic input voltage level. http://onsemi.com 3 MC74HC139A DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Guaranteed Limit ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎ Symbol Parameter Test Conditions V 55C to 25C 85C 125C Unit VIH Minimum High–Level Input Voltage VOUT = 0.1 V or VCC 0.1 V |IOUT|  20 A 2.0 4.5 6.0 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 V VIL Maximum Low–Level Input Voltage VOUT = 0.1 V or VCC 0.1 V |IOUT|  20 A 2.0 4.5 6.0 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 V VOH Minimum High–Level Output Voltage VIN = VIH or VIL |IOUT|  20 A 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V 4.5 6.0 3.98 5.48 3.84 5.34 3.70 5.20 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 4.5 6.0 0.26 0.26 0.33 0.33 0.40 0.40 VIN = VIH or VIL VOL Maximum Low–Level Output Voltage |IOUT|  4.0 mA |IOUT|  5.2 mA VIN = VIH or VIL |IOUT|  20 A VIN = VIH or VIL |IOUT|  4.0 mA |IOUT|  5.2 mA V IIN Maximum Input Leakage Current VIN = VCC or GND 6.0 0.1 1.0 1.0 A ICC Maximum Quiescent Supply Current (per Package) VIN = VCC or GND IOUT = 0 A 6.0 4 40 160 A 9. Information on typical parametric values can be found in the ON Semiconductor High–Speed CMOS Data Book (DL129/D). AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns) VCC Guaranteed Limit ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ Symbol Parameter V 55C to 25C 85C 125C Unit tPLH, tPHL Maximum Propagation Delay, Select to Output Y (Figures 1 and 3) 2.0 4.5 6.0 115 23 20 145 29 25 175 35 30 ns tPLH, tPHL Maximum Propagation Delay, Input A to Output Y (Figures 2 and 3) 2.0 4.5 6.0 115 23 20 145 29 25 175 35 30 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 3) 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns Cin Maximum Input Capacitance – 10 10 10 pF 10. For propagation delays with loads other than 50 pF, and information on typical parametric values, see the ON Semiconductor High–Speed CMOS Data Book (DL129/D). Typical @ 25°C, VCC = 5.0 V CPD Power Dissipation Capacitance (Per Decoder) (Note 11) 55 pF 11. Used to determine the no–load dynamic power consumption: P D = C PD V CC 2 f  I CC V CC . For load considerations, see the ON Semiconductor High–Speed CMOS Data Book (DL129/D). http://onsemi.com 4 MC74HC139A tr tf VALID VCC INPUT A GND tPHL 90% 50% 10% OUTPUT Y VALID VCC 90% 50% SELECT 10% 50% GND tPLH tPHL tPLH 50% OUTPUT Y tTLH tTHL Figure 3. Switching Waveform Figure 4. Switching Waveform TEST POINT OUTPUT DEVICE UNDER TEST CL* * Includes all probe and jig capacitance Figure 5. Test Circuit http://onsemi.com 5 MC74HC139A PIN DESCRIPTIONS ADDRESS INPUTS inputs. A high level on this input forces all outputs to a high level. A0a, A1a, A0b, A1b (Pins 2, 3, 14, 13) OUTPUTS Address inputs. These inputs, when the respective 1–of–4 decoder is enabled, determine which of its four active–low outputs is selected. Y0a – Y3a, Y0b – Y3b (Pins 4 – 7, 12, 11, 10, 9) Active–low outputs. These outputs assume a low level when addressed and the appropriate Select input is active. These outputs remain high when not addressed or the appropriate Select input is inactive. CONTROL INPUTS Selecta, Selectb (Pins 1, 15) Active–low select inputs. For a low level on this input, the outputs for that particular decoder follow the Address SELECT Y0 Y1 A0 Y2 Y3 A1 Figure 6. Expanded Logic Diagram (1/2 of Device) http://onsemi.com 6 MC74HC139A PACKAGE DIMENSIONS PDIP–16 N SUFFIX CASE 648–08 ISSUE R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. –A– 16 9 1 8 B F C DIM A B C D F G H J K L M S L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) T A M M INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0 10  0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0 10  0.51 1.01 SOIC–16 D SUFFIX CASE 751B–05 ISSUE J –A– 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 –B– 1 P 8 PL 0.25 (0.010) 8 M B S G R K F X 45  C –T– SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S http://onsemi.com 7 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0 7 0.229 0.244 0.010 0.019 MC74HC139A PACKAGE DIMENSIONS TSSOP–16 DT SUFFIX CASE 948F–01 ISSUE O 16X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S S K ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ K1 2X L/2 16 9 J1 B –U– L SECTION N–N J PIN 1 IDENT. 8 1 N 0.15 (0.006) T U S 0.25 (0.010) A –V– M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. N F DETAIL E –W– C 0.10 (0.004) –T– SEATING PLANE DETAIL E H D DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0 8 INCHES MIN MAX 0.193 0.200 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0 8 G ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800–282–9855 Toll Free USA/Canada http://onsemi.com 8 MC74HC139A/D
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