ASNT5010-KMC

Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ASNT5010-KMC DC-32Gbps D-Type Flip-Flop  87% clock phase margin for retiming of data input eye  Fully differential CML input interfaces  Fully differential CML output interface with 400mV single-ended swing  Single +3.3V or -3.3V power supply  Power consumption: 415mW  Fabricated in SiGe for high performance, yield, and reliability  Custom CQFP 24-pin package vee 6.5ps set-up/hold time capability vcc  vcc Exhibits low jitter and limited temperature variation over industrial temperature range vcc  vcc High speed broadband D-Type Flip-Flop for data retiming with full rate clock vcc  vee vcc vcc dp outp ASNT5010 ASNT5111 vcc vcc dn outn vcc vcc Rev. 2.7.2 1 vcc cn vcc cp vcc vee vee February 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com DESCRIPTION 50 50 DFF core dp dn outp outn 50 50 50 50 cp cn Fig. 1. Functional Block Diagram The temperature stable ASNT5010-KMC SiGe IC provides broadband data retiming functionality and is intended for use in high-speed measurement / test equipment. The IC shown in Fig. 1 can sample a highspeed data signal dp/dn with a full-rate external clock cp/cn to create a full-rate retimed NRZ data output outp/outn. The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLY CONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. The differential DC signaling mode is recommended for optimal performance. POWER SUPPLY CONFIGURATION The part can operate with either negative supply (vcc = 0.0V = ground and vee = −3.3V), or positive supply (vcc = +3.3V and vee = 0.0V = ground). In case of the positive supply, all I/Os need AC termination when connected to any devices with 50Ohm termination to ground. Different PCB layouts will be needed for each different power supply combination. Rev. 2.7.2 2 February 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V. ABSOLUTE MAXIMUM RATINGS Caution: Exceeding the absolute maximum ratings shown in Table 1 may cause damage to this product and/or lead to reduced reliability. Functional performance is specified over the recommended operating conditions for power supply and temperature only. AC and DC device characteristics at or beyond the absolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced to ground. Table 1. Absolute Maximum Ratings Parameter Supply Voltage (vee) Power Consumption RF Input Voltage Swing (SE) Case Temperature Storage Temperature Operational Humidity Storage Humidity Min -40 10 10 Max -3.6 0.46 1.0 +90 +100 98 98 Units V W V ºC ºC % % TERMINAL FUNCTIONS TERMINAL Name No. Type dp dn cp cp outp outn Name vcc vee Rev. 2.7.2 DESCRIPTION High-Speed I/Os Differential data inputs with internal SE 50Ohm termination to vcc Differential clock inputs with internal SE 50Ohm termination to vcc Differential data outputs with internal SE 50Ohm termination to vcc. Require external SE 50Ohm termination to vcc Supply and Termination Voltages Description Pin Number Positive power supply 2, 4, 6, 8, 10, 12, 14, 15, 16, 17, 18, 20, 22, 24 (+3.3V or 0) Negative power supply 1, 7, 13, 19 (0V or -3.3V) 21 23 3 5 11 9 CML input CML input CML output 3 February 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ELECTRICAL CHARACTERISTICS PARAMETER MIN TYP MAX UNIT COMMENTS General Parameters -3.1 -3.3 -3.5 V ±6% vee 0.0 V External ground vcc Ivee 125 mA Power consumption 415 mW Junction temperature -40 25 125 °C HS Input Data (dp/dn) Data rate DC 32 Gbps Swing 0.05 0.8 V Differential or SE, p-p CM Voltage Level vcc-0.8 vcc V Must match for both inputs Setup/Hold time 6.5 ps HS Input Clock (cp/cn) Frequency DC 32 GHz Swing 0.05 0.8 V Differential or SE, p-p CM Voltage Level vcc-0.8 vcc V Must match for both inputs Clock Phase Margin 85 87 89 % HS Output Data (outp/outn) Data rate DC 32 Gbps Latency 67 ps From Clock input to Data output Logic “1” level V vcc Logic “0” level vcc-0.4 V With external 50Ohm DC termination Clock-to-output delay 55 65 75 ps Rise/Fall times 13 ps 20%-80% Output Jitter 4 ps Peak-to-peak PACKAGE INFORMATION The chip die is housed in a custom 24-pin CQFP package shown in Fig. 2. The package provides a center heat slug located on its back side to be used for heat dissipation. ADSANTEC recommends for this section to be soldered to the vcc plain, which is ground for a negative supply, or power for a positive supply. The part’s identification label is ASNT5010-KMC. The first 8 characters of the name before the dash identify the bare die including general circuit family, fabrication technology, specific circuit type, and part version while the 3 characters after the dash represent the package’s manufacturer, type, and pin out count. This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten substances. Rev. 2.7.2 4 February 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com Fig. 2. CQFP 24-Pin Package Drawing (All Dimensions in mm) Rev. 2.7.2 5 February 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com REVISION HISTORY Revision 2.7.2 2.6.2 2.6.1 2.5.1 2.4.1 2.3.1 2.2.1 Date 02-2020 07-2019 02-2019 08-2018 08-2018 06-2018 06-2018 2.1.1 02-2013 2.0.1 01-2013 1.0 02-2008 Rev. 2.7.2 Changes Updated Package Information Updated Letterhead Added setup/hold time to Electrical Characteristics table Corrected latency specifications Added latency specifications Updated electrical characteristics Updated electrical characteristics Updated package information Revised title Revised package information Revised title Added package pin out drawing Revised functional block diagram Added power supply configuration Added absolute maximum ratings Revised terminal functions Revised electrical characteristics Added package information and mechanical drawing Format correction First release 6 February 2020