IS31FL3740
3×4 DOTS MATRIX LED DRIVER
WITH INDIVIDUAL AUTO BREATH FUNCTION
January 2018
GENERAL DESCRIPTION
FEATURES
The IS31FL3740 is a general purpose 3×4 LEDs
matrix driver with 1/12 cycle rate. The device can be
programmed via an I2C compatible interface. Each
LED can be dimmed individually with 8-bit × 8 PWM
data which allowing 1024 steps of linear dimming.
IS31FL3740 features 3 Auto Breathing Modes which
are noted as ABM-1, ABM-2 and ABM-3. For each
Auto Breathing Mode, there are 4 timing characters
which include current rising / holding / falling / off time
and 3 loop characters which include Loop-Beginning /
Loop-Ending / Loop-Times. Every LED can be
configured to be any Auto Breathing Mode or NoBreathing Mode individually.
Additionally each LED open and short state can be
detected, IS31FL3740 store the open or short
information in Open-Short Registers. The Open-Short
Registers allowing MCU to read out via I2C
compatible interface. Inform MCU whether there are
LEDs open or short and the locations of open or short
LEDs.
The IS31FL3740 operates from 2.7V to 5.5V and
features a very low shutdown and operational current.
IS31FL3740 is available in QFN-20 (5mm×5mm) and
eTSSOP-20 packages. It operates from 2.7V to 5.5V
over the temperature range of -40°C to +125°C.
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Rev. B, 01/18/2018
Supply voltage range: 2.7V to 5.5V
4 current source outputs for row control
3 switch current inputs for column scan control
Up to 12 LEDs (3×4) in dot matrix
Programmable 3×4 (4 RGBs) matrix size with deghost function
1MHz I2C-compatible interface
Selectable 3 Auto Breath Modes for each dot
Auto breath loop features interrupt pin inform
MCU auto breath loop completed
Auto breath offers128 steps gamma current,
interrupt and state lookup registers
256 steps global current setting
Individual on/off control
Individual 1024 PWM control steps
Individual Auto Breath Mode select
Individual open and short error detect function
Cascade for synchronization of chips
QFN-20 (5mm×5mm) and eTSSOP-20 packages
APPLICATIONS
Mobile phones and other hand-held devices for
LED display
Gaming device (Keyboard, Mouse etc.)
LED in white goods application
1
IS31FL3740
TYPICAL APPLICATION CIRCUIT
Figure 1 Typical Application Circuit (3×4)
Figure 2 Typical Application Circuit (RGB)
Note 1: For the mobile applications the IC should be placed far away from the mobile antenna in order to prevent the EMI.
Note 2: Electrolytic/Tantalum Capacitor may considerable for high current application to avoid audible noise interference.
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2
IS31FL3740
TYPICAL APPLICATION CIRCUIT (CONTINUED)
VBattery
ADDR
ADDR
SDA
ADDR
SCL
ADDR
VIO
100k
1k
SDA
SCL
Micro
Controller
INTB
1k
SDA
SDA
SDA
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
SCL
SCL
SCL
INTB
INTB
SDB
SDB
SDB
INTB
SDB
SDB
INTB
SDB
SDB
SDB
100k
SYNC
Master
SYNC
Slave 1
SYNC
Slave 2
SYNC
Slave 3
Figure 3 Typical Application Circuit (Four Parts Synchronization-Work)
Note 3: One part is configured as master mode, all the other 3 parts configured as slave mode. Work as master mode or slave mode specified
by Configuration Register (Function register, address 00h).Master part output master clock, and all the other parts which work as slave input
this master clock.
Note 4: The VIO should be 1.8V≤ VIO ≤VCC. And it is recommended to be equal to VOH of the micro controller. For example, if VOH=1.8V, set
VIO=1.8V is recommended.
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3
IS31FL3740
PIN CONFIGURATION
19 ADDR
18 SCL
17 SDA
CS1 7
CS2 8
PVCC 9
16 AVCC
20 INTB
Pin Configuration (Top View)
SW3 6
Package
CS3 10
QFN-20
eTSSOP-20
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4
IS31FL3740
PIN DESCRIPTION
No.
Pin
Description
1
AVCC
Power for analog circuits.
15
2
R_EXT
Input terminal used to connect an external resistor.
This regulates current source DC current value.
12
3
SYNC
Synchronize pin. It is used for more than one part
work synchronize. If it is not used please float this
pin.
17
4
SDA
I2C compatible serial data.
18
5
SCL
I2C compatible serial clock.
19
6
ADDR
I2C address setting.
QFN
eTSSOP
16
20
7
INTB
Interrupt output pin. Register F0h sets the function of
the INTB pin and active low when the interrupt event
happens. Can be NC (float) if interrupt function no
used.
1
8
SDB
Shut down the chip when pull to low.
14
9
GND
Connect to GND.
2,4,6
10,12,14
SW1~SW3
Switch pin for LED matrix scanning.
3,5
11,13
PGND
Power GND.
7,8,
10,11
15,16,
18,19
CS1~CS4
Current source.
9
17
PVCC
Power for current source.
13
20
VIO
Input logic reference voltage.
Thermal Pad Need to connect to GND pins.
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5
IS31FL3740
ORDERING INFORMATION
Industrial Range: -40°C to +125°C
Order Part No.
Package
QTY/Reel
IS31FL3740-QFLS4-TR
IS31FL3740-ZLS4-TR
QFN-20, Lead-free
eTSSOP-20, Lead-free
2500
Copyright © 2018 Lumissil Microsystems. All rights reserved. Lumissil Microsystems reserves the right to make changes to this specification and its
products at any time without notice. Lumissil Microsystems assumes no liability arising out of the application or use of any information, products or
services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and
before placing orders for products.
Lumissil Microsystems does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use
in such applications unless Lumissil Microsystems receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Lumissil Microsystems is adequately protected under the circumstances
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6
IS31FL3740
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC
Voltage at any input pin
Maximum junction temperature, TJMAX
Storage temperature range, TSTG
Operating temperature range, TA=TJ
Package thermal resistance, junction to ambient (4 layer
standard test PCB based on JEDEC standard), θJA
ESD (HBM)
ESD (CDM)
-0.3V ~+6.0V
-0.3V ~ VCC+0.3V
+150°C
-65°C ~+150°C
-40°C ~ +125°C
32.8°C/W (eTSSOP)
42.4°C/W (QFN)
±2kV
±750V
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
The following specifications apply for VCC = 3.6V, TA = 25°C, unless otherwise noted.
Symbol
Parameter
VCC
Supply voltage
ICC
Quiescent power supply current
Conditions
Min.
Typ.
2.7
VSDB= VCC, all LEDs off
Unit
5.5
V
2.17
mA
VSDB= 0V
3
VSDB= VCC, Configuration Register
written “0000 0000
3
84
mA
mA
ISD
Shutdown current
IOUT
Maximum constant current of
CS1~CS4
REXT= 20kΩ
ILED
Average current on each LED
ILED= (IOUT/2/12.75)×8
REXT= 20kΩ, GCC= 255,
All PWM= 255
26.3
Current sink headroom voltage
SW1~SW3
ISINK= 336mA (Note 1, 2)
200
VHR
Max.
μA
mV
Current source headroom voltage
ISOURCE= 84mA (Note 1)
CS1~CS4
350
tSCAN
Period of scanning
128
µs
tNOL
Non-overlap blanking time during
scan, the SWy and CSx are all off
during this time
8
µs
Logic Electrical Characteristics (SDA, SCL, ADDR, SYNC, SDB)
VIL
Logic “0” input voltage
VIO= 3.6V
GND
0.2VIO
V
VIH
Logic “1” input voltage
VIO= 3.6V
0.75VIO
VIO
V
VHYS
Input schmitt trigger hysteresis
VIO= 3.6V
VOL
Logic “0” output voltage for SYNC IOL= 8mA
VOH
Logic “1” output voltage for SYNC IOH= 8mA
0.2
V
0.4
0.75VIO
V
V
IIL
Logic “0” input current
VINPUT= 0V (Note 3)
5
nA
IIH
Logic “1” input current
VINPUT= VIO (Note 3)
5
nA
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7
IS31FL3740
DIGITAL INPUT SWITCHING CHARACTERISTICS (NOTE 3)
Symbol
Parameter
Fast Mode
Min.
Typ.
Fast Mode Plus
Typ.
Max.
Units
Max.
Min.
-
400
-
1000
kHz
fSCL
Serial-clock frequency
tBUF
Bus free time between a STOP and a START
condition
1.3
-
0.5
-
μs
tHD, STA
Hold time (repeated) START condition
0.6
-
0.26
-
μs
tSU, STA
Repeated START condition setup time
0.6
-
0.26
-
μs
tSU, STO
STOP condition setup time
0.6
-
0.26
-
μs
tHD, DAT
Data hold time
-
-
-
-
μs
tSU, DAT
Data setup time
100
-
50
-
ns
tLOW
SCL clock low period
1.3
-
0.5
-
μs
tHIGH
SCL clock high period
0.7
-
0.26
-
μs
tR
Rise time of both SDA and SCL signals,
receiving
-
300
-
120
ns
tF
Fall time of both SDA and SCL signals,
receiving
-
300
-
120
ns
Note 1: In case of REXT = 20kΩ, Global Current Control Register (PG3, 01h) written “1111 1111”, GCC = “1111 1111”.
Note 2: All LEDs are on and PWM=“1111 1111”, GCC = “1111 1111”.
Note 3: Guaranteed by design.
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8
IS31FL3740
FUNCTIONAL BLOCK DIAGRAM
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IS31FL3740
DETAILED DESCRIPTION
I2C INTERFACE
The IS31FL3740 uses a serial bus, which conforms to
the I2C protocol, to control the chip’s functions with
two wires: SCL and SDA. The IS31FL3740 has a 7-bit
slave address (A7:A1), followed by the R/W bit, A0.
Set A0 to “0” for a write command and set A0 to “1” for
a read command. The value of bits A4:A1 are decided
by the connection of the ADDR pin. The complete
slave address is:
Table 1 Slave Address:
ADDR2 ADDR1
GND
SCL
SDA
VCC
GND
SCL
SDA
VCC
A7:A5
A4:A1
101
0000
0101
1010
1111
A0
0/1
ADDR connected to GND, (A4:A1)=0000;
ADDR connected to VCC, (A4:A1)=1111;
ADDR connected to SCL, (A4:A1)=0101;
ADDR connected to SDA, (A4:A1)=1010;
The SCL line is uni-directional. The SDA line is bidirectional (open-collector) with a pull-up resistor
(typically 1kΩ). The maximum clock frequency
specified by the I2C standard is 1MHz. In this
discussion, the master is the microcontroller and the
slave is the IS31FL3740.
The timing diagram for the I2C is shown in Figure 4.
The SDA is latched in on the stable high level of the
SCL. When there is no interface activity, the SDA line
should be held high.
The “START” signal is generated by lowering the
SDAsignal while the SCL signal is high. The start
signal will alert all devices attached to the I2C bus to
check the incoming address against their own chip
address.
The 8-bit chip address is sent next, most significant bit
first. Each address bit must be stable while the SCL
level is high.
After the last bit of the chip address is sent, the master
checks for the IS31FL3740’s acknowledge. The
master releases the SDA line high (through a pull-up
resistor). Then the master sends an SCL pulse. If the
IS31FL3740 has received the address correctly, then it
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holds the SDA line low during the SCL pulse. If the
SDA line is not low, then the master should send a
“STOP” signal (discussed later) and abort the transfer.
Following acknowledge of IS31FL3740, the register
address byte is sent, most significant bit first.
IS31FL3740 must generate another acknowledge
indicating that the register address has been received.
Then 8-bit of data byte are sent next, most significant
bit first. Each data bit should be valid while the SCL
level is stable high. After the data byte is sent, the
IS31FL3740 must generate another acknowledge to
indicate that the data was received.
The “STOP” signal ends the transfer. To signal
“STOP”, the SDA signal goes high while the SCL
signal is high.
ADDRESS AUTO INCREMENT
To write multiple bytes of data into IS31FL3740, load
the address of the data register that the first data byte
is intended for. During the IS31FL3740 acknowledge
of receiving the data byte, the internal address pointer
will increment by one. The next data byte sent to
IS31FL3740 will be placed in the new address, and so
on. The auto increment of the address will continue as
long as data continues to be written to IS31FL3740
(Figure 7).
READING OPERATION
Register FEh, F1h, 18h~28h, 30h~40h of Page 0 and
11h of Page 3 can be read.
To read the FEh and F1h, after IIC start condition, the
bus master must send the IS31FL3740 device
____
address with the R/W bit set to “0”, followed by the
register address (FEh or F1h) which determines which
register is accessed. Then restart I2C, the bus master
should send the IS31FL3740 device address with the
____
R/W bit set to “1”. Data from the register defined by
the command byte is then sent from the IS31FL3740
to the master (Figure 8).
To read the 18h~28h, 30h~40h of Page 0 and 11h of
Page 3, the FDh should write with 00h before follow
the Figure 8 sequence to read the data, that means,
when you want to read 18h~28h, 30h~40h of Page 0
and 11h of Page 3, the FDh should point to Page 0 or
Page 3 first and then you can read the data.
10
IS31FL3740
Figure 4 Interface Timing
Figure 5 Bit Transfer
Figure 6 Writing to IS31FL3740 (Typical)
Figure 7 Writing to IS31FL3740 (Automatic Address Increment)
Figure 8 Reading from IS31FL3740
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IS31FL3740
REGISTER DEFINITION-1
Address
Name
Function
Table
R/W
Default
2
W
0000 0000
FDh
Command Register
Available Page 0 to Page 3 Registers
FEh
Command Register Write lock To lock/unlock Command Register
3
R/W
F0h
Interrupt Mask Register
Configure the interrupt function
4
W
F1h
Interrupt Status Register
Show the interrupt status
5
R
0000 0000
REGISTER CONTROL
Table 2 FDh Command Register (Write Only)
Data
Function
0000 0000
Point to Page 0 (PG0, LED Control Register is available)
0000 0001
Point to Page 1 (PG1, PWM Register is available)
0000 0010
Point to Page 2 (PG2, Auto Breath Mode Register is available)
0000 0011
Point to Page 3 (PG3, Function Register is available)
Others
Reserved
Note: FDh is locked when power up, need to unlock this register before write command to it. See Table 3 for detail.
The Command Register should be configured first after writing in the slave address to choose the available register. Then write data in the
choosing register. Power up default state is “0000 0000”.
For example, when write “0000 0001” in the Command Register (FDh), the data which writing after will be stored in the Auto breath mode
Register. Write new data can configure other registers.
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IS31FL3740
Table 3 FEh Command Register Write Lock
(Read/Write)
Table 5 F1h Interrupt Status Register
Bit
D7:D0
Name
CRWL
Default
0000 0000 (FDh write disable)
Bit
D7:D5
Name
-
Default
000
D4
D3
D2
ABM3 ABM2 ABM1
0
0
0
D1
D0
SB
OB
0
0
Show the interrupt status for IC.
To select the PG0~PG3, need to unlock this register
first, with the purpose to avoid mis-operation of this
register. When FEh is written with 0xC5, FDh is
allowed to modify once, after the FDh is modified the
FEh will reset to be 0x00 at once.
ABM3 Auto Breath Mode 3 Finish Bit
0
ABM3 not finish
1
ABM3 finish
ABM2 Auto Breath Mode 2 Finish Bit
0
ABM2 not finish
1
ABM2 finish
CRWL Command Register Write Lock
0x00 FDh write disable
0xC5 FDh write enable once
Table 4 F0h Interrupt Mask Register
Bit
D7:D4
D3
D2
D1
D0
Name
-
IAC
IAB
IS
IO
Default
0000
0
0
0
0
Configure the interrupt function for IC.
IAC
Auto Clear Interrupt Bit
0
Interrupt could not auto clear
1
Interrupt auto clear when INTB stay low
exceeds 8ms
IAB
0
1
Auto Breath Interrupt Bit
Disable auto breath loop finish interrupt
Enable auto breath loop finish interrupt
IS
0
1
Dot Short Interrupt Bit
Disable dot short interrupt
Enable dot short interrupt
IO
0
1
Dot Open Interrupt Bit
Disable dot open interrupt
Enable dot open interrupt
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ABM1 Auto Breath Mode 1 Finish Bit
0
ABM1 not finish
1
ABM1 finish
SB
0
1
Short Bit
No short
Short happens
OB
0
1
Open Bit
No open
Open happens
13
IS31FL3740
REGISTER DEFINITION-2
Address
Name
Function
Table
R/W
Default
PG0 (0x00): LED Control Register
00h ~ 16h LED On/Off Register
Set on or off state for each LED
7
W
18h ~ 28h LED Open Register
Store open state for each LED
8
R
30h ~ 40h LED Short Register
Store short state for each LED
9
R
Set PWM duty for LED
10
W
0000 0000
11
W
xxxx xx00
0000 0000
PG1 (0x01): PWM Register
00h~B7h
PWM Register
PG2 (0x02): Auto Breath Mode Register
00h~B7h
Auto Breath Mode Register Set operating mode of each dot
PG3 (0x03): Function Register
00h
Configuration Register
Configure the operation mode
13
W
01h
Global Current Control
Register
Set the global current
14
W
02h
Auto Breath Control
Register 1 of ABM-1
Set fade in and hold time for breath
function of ABM-1
15
W
03h
Auto Breath Control
Register 2 of ABM-1
Set the fade out and off time for breath
function of ABM-1
16
W
04h
Auto Breath Control
Register 3 of ABM-1
Set loop characters of ABM-1
17
W
05h
Auto Breath Control
Register 4 of ABM-1
Set loop characters of ABM-1
18
W
06h
Auto Breath Control
Register 1 of ABM-2
Set fade in and hold time for breath
function of ABM-2
15
W
07h
Auto Breath Control
Register 2 of ABM-2
Set the fade out and off time for breath
function of ABM-2
16
W
08h
Auto Breath Control
Register 3 of ABM-2
Set loop characters of ABM-2
17
W
09h
Auto Breath Control
Register 4 of ABM-2
Set loop characters of ABM-2
18
W
0Ah
Auto Breath Control
Register 1 of ABM-3
Set fade in and hold time for breath
function of ABM-3
15
W
0Bh
Auto Breath Control
Register 2 of ABM-3
Set the fade out and off time for breath
function of ABM-3
16
W
0Ch
Auto Breath Control
Register 3 of ABM-3
Set loop characters of ABM-3
17
W
0Dh
Auto Breath Control
Register 4 of ABM-3
Set loop characters of ABM-3
18
W
0Eh
Time Update Register
Update the setting of 02h ~ 0Dh registers
-
W
0Fh
SWy Pull-Up Resistor
Selection Register
Set the pull-up resistor for SWy
19
W
10h
CSx Pull-Down Resistor
Selection Register
Set the pull-down resistor for CSx
20
W
11h
Reset Register
Reset all register to POR state
-
R
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0000 0000
14
IS31FL3740
Table 6-1 Page 0 (PG0, 0x00): LED Control Register - On Off Register
PVCC
PWM
CS1
PWM
CS2
PWM
CS3
PWM
CS4
16
LSB
MSB
14
SW3
C
12
T5
10
0E
0C
SW2
B
0A
T3
08
06
04
SW1
A
02
T1
00
LSB
1
2
MSB
3
4
Figure 9 On Off Register
Table 7 00h ~ 16h LED On/Off Register
Bit
D7:D0
Name
CCS8 : CCS1 or CCS16 : CCS9
Default
0000 0000
The LED On/Off Registers store the on or off state of
each LED in the Matrix.
Each LED has 8 bits on and off state, need to turn
on/off them when turn on/off the LED.
For example:
When turn on LED 1-A, need to turn on
D1:D0 of 00h, 02h, 04h and 06h
CX-Y
0
1
LED State Bit
LED off
LED on
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IS31FL3740
Table 6-2 Page 0 (PG0, 0x00): LED Control Register – Open Detect Register
PVCC
PWM
CS1
PWM
CS2
PWM
CS3
PWM
CS4
LSB
MSB
SW3
C
T5
28
SW2
B
T3
20
SW1
A
T1
18
LSB
1
MSB
2
3
4
Figure 10 Open Detect Register
Table 8 18h ~ 28h LED Open Register
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
OP8
-
OP6
-
OP4
-
OP2
-
Default
0
-
0
-
0
-
0
-
The LED Open Registers store the open or normal
state of each LED in the Matrix.
OPx
0
1
LED Open Bit
LED normal
LED open
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IS31FL3740
Table 6-3 Page 0 (PG0, 0x00): LED Control Register – Short Detect Register
Figure 11 Short Detect Register
Table 9 30h ~ 40h LED Short Register
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
ST8
-
ST6
-
ST4
-
ST2
-
Default
0
-
0
-
0
-
0
-
The LED Short Registers store the short or normal
state of each LED in the Matrix.
OPx
0
1
LED Short Bit
LED normal
LED short
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IS31FL3740
Page 1 (PG1, 0x01): PWM Register
PVCC
PWM
CS1
B0
B1
PWM
CS2
B2
PWM
CS3
PWM
CS4
B3 B4 B5 B6 B7
A0 A1 A2 A3 A4 A5 A6 A7
C
90
91
92
93
94
95
96
97
80
81
82
83
84
85
86
87
70
71
72
73
74
75
76
77
60
61
62
63
64
65
66
67
50
51
52
53
54
55
56
57
40
41
42
43
44
45
46
47
30
31
32
33
34
35
36
37
20
21
22
23
24
25
26
27
B
A
1A
10
11
12
13
14
15
16
17
00
01
02
03
04
05
06
07
1
2
3
SW3
T5
SW2
T3
SW1
T1
4
Figure 12 PWM Register
Table 10 00h ~ B7h PWM Register
Bit
D7:D0
Name
PWM
Default
0000 0000
Each dot has 8 bytes to modulate the PWM duty in
1024 steps.
Each byte controls half of the IOUT and quarter of the
duty, like LED 1A (Figure 12), the current will be as
shown below:
I LED
PWM
256
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Rev. B, 01/18/2018
(1)
7
PWM D[n ] 2 n
n 0
Where Duty is the duty cycle of SWy/4,
Duty
128s
1 1
1
128s 8s 3 4 12.75
(2)
IOUT is the output current of CSx (x=1~4),
I OUT
The value of the PWM Registers decides the
average current of each LED noted ILED.
ILED computed by Formula (1):
( I OUT / 2) Duty
840 GCC
2
REXT 256
(3)
GCC is the Global Current Control register (PG3,
01h) value and REXT is the external resistor of
R_EXT pin. D[n] stands for the individual bit value, 1
or 0, in location n.
For example 1:
if 00h=0xff, 01h=0xff, 10h=0xff, 11h=0xff, 20h=0xff,
21h=0xff, 30h=0xff, 31h=0xff,GCC=0xff. REXT=20kΩ
(IOUT=84mA),
18
IS31FL3740
0 xff 8
1
( I OUT / 2)
256
12.75
26.3mA
I LED 1 A
For example 2:
if 00h=0x80, 01h=0x80, 10h=0x80, 11h=0x00,
20h=0x80, 21h=0x80, 30h=0x80, 31h=0x00,
GCC=0xff. REXT=20kΩ (IOUT=84mA),
0 x80 6
1
( I OUT / 2)
256
12.75
9.87mA
I LED1 A
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Rev. B, 01/18/2018
19
IS31FL3740
Page 2 (PG2, 0x02): Auto Breath Mode Register
PVCC
PWM
CS1
B0
PWM
CS2
B1
B2
PWM
CS3
PWM
CS4
B3 B4 B5 B6 B7
A0 A1 A2 A3 A4 A5 A6 A7
C
90
91
92
93
94
95
96
97
80
81
82
83
84
85
86
87
70
71
72
73
74
75
76
77
60
61
62
63
64
65
66
67
50
51
52
53
54
55
56
57
40
41
42
43
44
45
46
47
30
31
32
33
34
35
36
37
20
21
22
23
24
25
26
27
10
11
12
13
14
15
16
17
00
01
02
03
04
05
06
07
B
A
1
2
3
SW3
T5
SW2
T3
SW1
T1
4
Figure 13 Auto Breath Mode Selection Register
Table 11 00h ~ B7h Auto Breath Mode Register
Bit
D7:D2
D1:D0
Name
-
ABMS
Default
-
00
The Auto Breath Mode Register sets operating mode
of each dot, notice eight registers should be the
same value when you selecting the mode.
For example, if 00h=0x01, 01h=0x01, 10h=0x01,
11h=0x01,
20h=0x01,
21h=0x01,
30h=0x01,
31h=0x01, then LED 1A work as ABM-1 mode
ABMS
00
01
10
11
Auto Breath Mode Selection Bit
PWM control mode
Select Auto Breath Mode 1 (ABM-1)
Select Auto Breath Mode 2 (ABM-2)
Select Auto Breath Mode 3 (ABM-3)
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Rev. B, 01/18/2018
20
IS31FL3740
Table 12 Page 3 (PG3, 0x03): Function Register
Register
Name
Function
R/W
00h
Configuration Register
Configure the operation mode
W
01h
Global Current Control
Register
Set the global current
W
02h
Auto Breath Control
Register 1 of ABM-1
Set fade in and hold time for breath function of
ABM-1
W
03h
Auto Breath Control
Register 2 of ABM-1
Set the fade out and off time for breath function
of ABM-1
W
04h
Auto Breath Control
Register 3 of ABM-1
Set loop characters of ABM-1
W
05h
Auto Breath Control
Register 4 of ABM-1
Set loop characters of ABM-1
W
06h
Auto Breath Control
Register 1 of ABM-2
Set fade in and hold time for breath function of
ABM-2
W
07h
Auto Breath Control
Register 2 of ABM-2
Set the fade out and off time for breath function
of ABM-2
W
08h
Auto Breath Control
Register 3 of ABM-2
Set loop characters of ABM-2
W
09h
Auto Breath Control
Register 4 of ABM-2
Set loop characters of ABM-2
W
0Ah
Auto Breath Control
Register 1 of ABM-3
Set fade in and hold time for breath function of
ABM-3
W
0Bh
Auto Breath Control
Register 2 of ABM-3
Set the fade out and off time for breath function
of ABM-3
W
0Ch
Auto Breath Control
Register 3 of ABM-3
Set loop characters of ABM-3
W
0Dh
Auto Breath Control
Register 4 of ABM-3
Set loop characters of ABM-3
W
0Eh
Time Update Register
Update the setting of 02h ~ 0Dh registers
W
0Fh
SWy Pull-Up Resistor
Selection Register
Set the pull-up resistor for SWy
W
10h
CSx Pull-Down Resistor
Selection Register
Set the pull-down resistor for CSx
W
11h
Reset Register
Reset all register to POR state
R
Default
0000
0000
Table 13 00h Configuration Register
Bit
D7:D6
D5:D3
D2
D1
D0
Name
SYNC
-
OSD
B_EN
SSD
Default
00
000
0
0
0
The Configuration Register sets operating mode of
IS31FL3740.
When SYNC bits are set to “01”, the IS31FL3740 is
configured as the master clock source and the
SYNC pin will generate a clock signal distributed to
the clock slave devices. To be configured as a clock
slave device and accept an external clock input the
slave device’s SYNC bits must be set to “10”.
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When OSD set high, open/short detection will be
trigger once, the user could trigger OS detection
again by set OSD from 0 to 1.
When B_EN enable, those dots select working in
ABM-x mode will start to run the pre-established
timing. If it is disabled, all dots work in PWM mode.
Following Figure 19 to enable the Auto Breath Mode
When SSD is “0”, IS31FL3740 works in software
shutdown mode and to normal operate the SSD bit
should set to “1”.
21
IS31FL3740
SYNC
00/11
01
10
Synchronize Configuration
High Impedance
Master
Slave
OSD
0
1
Open/Short Detection Enable Bit
Disable open/short detection
Enable open/short detection
B_EN Auto Breath Enable
0
PWM Mode Enable
1
Auto Breath Mode Enable
Software Shutdown Control
Software shutdown
Normal operation
SSD
0
1
Table 14 01h Global Current Control Register
Bit
D7:D0
Name
GCCx
Default
0000 0000
The Global Current Control Register modulates all
CSx (x=1~4) DC current which is noted as IOUT in
256 steps.
IOUT is computed by the Formula (3):
840 GCC
IOUT
REXT 256
(3)
7
n 0
Where D[n] stands for the individual bit value, 1 or 0,
in location n, REXT is the external resistor of R_EXT
pin.
For example: if D7:D0=1011 0101,
20 22 24 25 27 840
256
REXT
Table 15 02h, 06h, 0Ah Auto Breath Control
Register 1 of ABM-x
Bit
D7:D5
D4:D1
D0
Name
T1
T2
-
Default
000
0000
0
Auto Breath Control Register 1 set the T1&T2 time in
Auto Breath Mode.
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T1 Setting
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
T2
0000
0001
0010
0011
0100
0101
0110
0111
1000
Others
T2 Setting
0s
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
Unavailable
Table 16 03h, 07h, 0Bh Auto Breath Control
Register 2 of ABM-x
Bit
D7:D5
D4:D1
D0
Name
T3
T4
-
Default
000
0000
0
Auto Breath Control Register 2 set the T3&T4 time in
Auto Breath Mode.
GCC D[ n] 2 n
I OUT
T1
000
001
010
011
100
101
110
111
T3
000
001
010
011
100
101
110
111
T3 Setting
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
T4
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
Others
T4 Setting
0s
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
53.76s
107.52s
Unavailable
22
IS31FL3740
Table 17 04h, 08h, 0Ch Auto Breath Control
Register 3 of ABM-x
Table 18 05h, 09h, 0Dh Auto Breath Control
Register 4 of ABM-x
Bit
D7:D6
D5:D4
D3:D0
Bit
D7:D0
Name
LE
LB
LTA
Name
LTB
Default
00
00
0000
Default
0000 0000
Total loop times= LTA ×256 + LTB.
For example, if LTA=2, LTB=100, the total loop times
is 256×2+100= 612 times.
For the counting of breathing times, do follow Figure
19 to enable the Auto Breath Mode.
If the loop start from T4,
T4->T1->T2->T3(1)->T4->T1->T2->T3(2)->T4->T1>...and so on.
If the loop not start from T4,
Tx->T3(1) ->T4->T1->T2->T3(2)->T4-> T1->...and
so on.
If the loop ends at off state(End of T3), the LED will
be off state at last. If the loop ends at on state(End
of T1), the LED will run an extra T4&T1, which are
not included in loop.
LB
00
01
10
11
Loop Beginning Time
Loop begin from T1
Loop begin from T2
Loop begin from T3
Loop begin from T4
LE
00
01
Others
Loop End Time
Loop end at off state (End of T3)
Loop end at on state (End of T1)
Unavailable
LTA
0000
0001
0010
…
1111
8-11 Bits Of Loop Times
Endless loop
1
2
…
15
Total loop times= LTA ×256 + LTB.
For example, if LTA=2, LTB=100, the total loop times
is 256×2+100= 612 times.
LTB
0000 0000
0000 0001
0000 0010
…
1111 1111
0-7 Bits Of Loop Times
Endless loop
1
2
…
255
0Eh Time Update Register (02h~0Dh)
The data sent to the time registers (02h~0Dh) will be
stored in temporary registers. A write operation of
“0000 0000” data to the Time Update Register is
required to update the registers (02h~0Dh). Please
follow Figure 19 to enable the Auto Breath Mode and
update the time parameters.
Table 19 0Fh SWy Pull-Up Resistor Selection
Register
Bit
D7:D3
D2:D0
Name
-
PUR
Default
00000
000
Set pull-up resistor for SWy.
PUR
000
001
010
011
100
101
110
111
SWy Pull-up Resistor Selection Bit
No pull-up resistor
0.5kΩ
1.0kΩ
2.0kΩ
4.0kΩ
8.0kΩ
16kΩ
32kΩ
Figure 14 Auto Breathing Function
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Rev. B, 01/18/2018
23
IS31FL3740
Table 20 10h CSx Pull-Down Resistor Selection
Register
Bit
D7:D3
D2:D0
Name
-
PDR
Default
00000
000
11h Reset Register
Once user read the Reset Register, IS31FL3740 will
reset all the IS31FL3740registers to their default
value. On initial power-up, the IS31FL3740 registers
are reset to their default values for a blank display.
Set the pull-down resistor for CSx.
PDR
000
001
010
011
100
101
110
111
CSx Pull-down Resistor Selection Bit
No pull-down resistor
0.5kΩ
1.0kΩ
2.0kΩ
4.0kΩ
8.0kΩ
16kΩ
32kΩ
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Rev. B, 01/18/2018
24
IS31FL3740
APPLICATION INFORMATION
SW1
SW2
SW3
01h
11h
21h
31h
41h
51h
61h
71h
81h
91h
A1h
B1h
01h
00h
10h
20h
30h
40h
50h
60h
70h
80h
90h
A0h
B0h
00h
07h
17h
27h
37h
47h
57h
67h
77h
87h
97h
A7h
B7h
07h
06h
16h
26h
36h
46h
56h
66h
76h
86h
96h
A6h
B6h
06h
CS1
CS4
tSCAN=128µs
tNOL=8µs
Scanning cycle T=1.632ms((128+8)×12)
De-Ghost time
PWM Duty is variable from 0/256~255/256
IOUT=(840/REXT×GCC/256)×2
(GCC=0~255)
Figure 15 Scanning Timing
SCANING TIMING
For example, in Figure 1,
As shown in Figure 15, the SW1~SW3 is turned on by
serial, LED is driven 12 by 12 within the SWy (x=1~3)
on time (SWy, y=1~3) is sink and pull low when LED
on, including the non-overlap blanking time during
scan, the duty cycle of SWy (active low, y=1~3) is:
if 00h=0xff, 01h=0xff, 10h=0xff, 11h=0xff, 20h=0xff,
21h=0xff, 30h=0xff, 31h=0xff, GCC=0xff. REXT=20kΩ
(IOUT=84mA),
Duty
128s
1 1
1
128s 8s 3 4 12.75
(2)
For example 2: in Figure 1,
Where 128μs is tSCAN, the period of scanning and 8μs
is tNOL, the non-overlap time.
EXTERNAL RESISTOR (REXT)
The output current for each CSx can be can be set by
a single external resistor, REXT, as described in
Formula (3).
IOUT
840 GCC
2
REXT 256
0 xff 8
1
( I OUT / 2)
256
12.75
26.3mA
I LED 1 A
if 00h=0x80, 01h=0x80, 10h=0x80, 11h=0x00,
20h=0x80, 21h=0x80, 30h=0x80, 31h=0x00,
GCC=0xff. REXT=20kΩ (IOUT=84mA),
0 x80 6
1
( I OUT / 2)
256
12.75
9.87mA
I LED1 A
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
(3)
GCC is Global Current Control Register (PG3, 01h)
data showing in Table 14.
LED AVERAGE CURRENT (ILED)
PWM CONTROL
As described in Formula (1), the LED average current
(ILED) is effected by 3 factors:
After setting the IOUT and GCC, the brightness of each
LEDs (LED average current (ILED)) can be modulated
with 1024 steps by PWM Register, as described in
Formula (1).
1. REXT, resistor which is connected R_EXT pin and
GND. REXT sets the current of all CSx(x=1~4) based
on Formula (3).
I LED
PWM
256
( I OUT / 2) Duty
(1)
Where PWM is PWM Registers (PG1, 00h~BFh) data
showing in Table 10.
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Rev. B, 01/18/2018
2. Global Current Control Register (PG3, 01h). This
register adjusts all CSx (x=1~4) output currents by
256 steps as shown in Formula (3).
3. PWM Registers (PG1, 00h~BFh), every LED has
an own PWM register. PWM Registers adjust
25
IS31FL3740
individual LED average current by 1024 steps as
shown in Formula (1).
GAMMA CORRECTION
In order to perform a better visual LED breathing effect
we recommend using a gamma corrected PWM value
to set the LED intensity. This results in a reduced
number of steps for the LED intensity setting, but
causes the change in intensity to appear more linear to
the human eye.
Gamma correction, also known as gamma
compression or encoding, is used to encode linear
luminance to match the non-linear characteristics of
display. Since the IS31FL3740 can modulate the
brightness of the LEDs with 1024 steps, a gamma
correction function can be applied when computing
each subsequent LED intensity setting such that the
changes in brightness matches the human eye's
brightness curve.
Table 21 32 Gamma Steps with 256 PWM Steps
C(1)
C(2)
C(3)
C(4)
C(5)
C(6)
C(2)
C(3)
C(4)
C(5)
C(6)
C(7)
0
1
2
3
4
5
6
7
C(8)
C(9)
C(10)
C(11)
C(12)
C(13)
C(14)
C(15)
8
10
12
14
16
18
20
22
C(16)
C(17)
C(18)
C(19)
C(20)
C(21)
C(22)
C(23)
24
26
29
32
35
38
41
44
C(24)
C(25)
C(26)
C(27)
C(28)
C(29)
C(30)
C(31)
47
50
53
57
61
65
69
73
C(32)
C(33)
C(34)
C(35)
C(36)
C(37)
C(38)
C(39)
77
81
85
89
94
99
104
109
C(40)
C(41)
C(42)
C(43)
C(44)
C(45)
C(46)
C(47)
114
119
124
129
134
140
146
152
C(48)
C(49)
C(50)
C(51)
C(52)
C(53)
C(54)
C(55)
158
164
170
176
182
188
195
202
C(56)
C(57)
C(58)
C(59)
C(60)
C(61)
C(62)
C(63)
209
216
223
230
237
244
251
255
C(7)
256
224
0
1
2
4
6
10
13
18
C(8)
C(9)
C(10)
C(11)
C(12)
C(13)
C(14)
C(15)
22
28
33
39
46
53
61
69
C(16)
C(17)
C(18)
C(19)
C(20)
C(21)
C(22)
C(23)
78
86
96
106
116
126
138
149
C(24)
C(25)
C(26)
C(27)
C(28)
C(29)
C(30)
C(31)
161
173
186
199
212
226
240
255
192
160
128
96
256
64
224
32
192
PWM Data
C(1)
PWM Data
C(0)
Table 22 64 Gamma Steps with 256 PWM Steps
C(0)
0
0
8
16
160
24
32
40
48
56
64
Intensity Steps
128
Figure 17 Gamma Correction (64 Steps)
96
Note: The data of 32 gamma steps is the standard value and the
data of 64 gamma steps is the recommended value.
64
OPERATING MODE
32
Each dot of IS31FL3740 has two selectable operating
modes, PWM Mode and Auto Breath Mode.
0
0
4
8
12
16
20
24
28
32
Intensity Steps
Figure 16 Gamma Correction (32 Steps)
Choosing more gamma steps provides for a more
continuous looking breathing effect. This is useful for
very long breathing cycles. The recommended
configuration is defined by the breath cycle T. When
T=1s, choose 32 gamma steps, when T=2s, choose 64
gamma steps. The user must decide the final number
of gamma steps not only by the LED itself, but also
based on the visual performance of the finished
product.
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Rev. B, 01/18/2018
PWM Mode
By setting the Auto Breath Mode Register bits of the
Page 2 (PG2, 00h~BFh) to “00”, or disable the B_EN
bit of Configure Register (PG3, 00h), the IS31FL3740
operates in PWM Mode. The brightness of each LED
can be modulated with 1024 steps by PWM registers.
For example, if the data in PWM Register is “0000
0100”, then the PWM is the fourth step.
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
26
IS31FL3740
Auto Breath Mode
By setting the B_EN bit of the Configuration Register
(PG3, 00h) to “1”, breath function enables. When set
the B_EN bit to “0”, breath function disables.
By setting the Auto Breath Mode Register bits of the
Page 2 (PG2, 00h~BFh) to “01” (ABM-1), “10” (ABM-2)
or “11” (ABM-3), the IS31FL3740 operates in Auto
Breath Mode.
IS31FL3740 has three auto breath modes, Auto Breath
Mode 1, Auto Breath Mode 2 and Auto Breath Mode 3.
Each ABM has T1, T2, T3 and T4, as shown below:
information and after at least 2 scanning cycle
(3.264ms) the MCU can get the open/short
information by reading the 18h~2fh/30h~47h, for
those dots are turned off via LED On/Off Registers
(PG0, 00h~17h), the open/short data will not get
refreshed when setting the OSD bit of the
Configuration Register (PG3, 00h) from "0" to “1”.
The Global Current Control Register (PG3, 01h) need
to set to 0x01 in order to get the right open/short data.
The detect action is one-off event and each time
before reading out the open/short information, the
OSD bit of the Configuration Register (PG3, 00h)
need to be set from "0" to “1” (clear before set
operation).
INTERRUPT CONTROL
Figure 18 Auto Breathing Function
T1/T3 is variable from 0.21s to 26.88s, T2/T4 is
variable from 0s to 26.88s, for each loop, the start
point can be T1~T4 and the stop point can be on
state(T2) and off state(T4), also the loop time can be
set to 1~212times or endless. Each LED can select
ABM-1~ABM-3 to work.
The setting of ABM-1~ABM-3(PG2, 02h~0Dh) need to
write the 0Eh in PG3 to update before effective.
IS31FL3740has an INTB pin, by setting the Interrupt
Mask Register (F0h), it can be the flag of LED open,
LED short or the finish flag of ABM-1, ABM-2, and
ABM-3.
For example, if the IO bit of the Interrupt Mask
Register (F0h) set to “1”, when LED open happens,
the INTB will pull be pulled low and the OB bit of
Interrupt Status Register (F1h) will store open status
at the same time.
The INTB pin will be pulled high after reading the
Interrupt Status Register (F1h) operation or it will be
pulled high automatically after it stays low for 8ms
(Typ.) if the IAC bit of Interrupt Mask Register (F0h) is
set to “1”. The bits of Interrupt Status Register (F1h)
will be reset to “0” after INTB pin pulled high.
SYNCHRONIZE FUNCTION
SYNC bits of the Configuration Register (PG3, 00h)
sets SYNC pin input or output synchronize clock
signal. It is used for more than one part working
synchronize. When SYNC bits are set to “01”, SYNC
pin output synchronize clock to synchronize other
parts as master. When SYNC bits are set to “10”,
SYNC pin input synchronize clock and work
synchronization with this input signal as slave. When
SYNC bits are set to “00/11”, SYNC pin is high
impedance, and synchronize function is disabled.
SYNC bit default state is “00” and SYNC pin is high
impedance when power up.
Figure 19 Enable Auto Breath Mode
If not follow this flow, first loop’s start point may be
wrong
OPEN/SHORT DETECT FUNCTION
IS31FL3740has open and short detect bit for each
LED.
By setting the OSD bit of the Configuration Register
(PG3, 00h) from "0" to “1”, the LED Open Register and
LED Short Register will start to store the open/short
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Rev. B, 01/18/2018
DE-GHOST FUNCTION
The ‘ghost’ term is used to describe the behavior of
an LED that should be OFF but instead glows dimly
when another LED is turned ON. A ghosting effect
typically can occur when multiplexing LEDs. In matrix
architecture any parasitic capacitance found in the
constant-current outputs or the PCB traces to the
LEDs may provide sufficient current to dimly light an
LED to create a ghosting effect.
To prevent this LED ghost effect, the IS31FL3740 has
integrated pull-up resistors for each SWy (y=1~3) and
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IS31FL3740
pull-down resistors for each CSx (x=1~4). Select the
right SWy pull-up resistor (PG3, 0Fh) and CSx pulldown resistor (PG3, 10h) which eliminates the ghost
LED for a particular matrix layout configuration.
Typically, selecting the 32kΩ will be sufficient to
eliminate the LED ghost phenomenon.
The SWy pull-up resistors and CSx pull-down resistors
are active only when the CSx/SWy outputs are in the
OFF state and therefore no power is lost through these
resistors
SHUTDOWN MODE
Shutdown mode can be used as a means of reducing
power consumption. During shutdown mode all
registers retain their data.
Software Shutdown
By setting SSD bit of the Configuration Register (PG3,
00h) to “0”, the IS31FL3740 will operate in software
shutdown mode. When the IS31FL3740 is in software
shutdown, all current sources are switched off, so that
the matrix is blanked. All registers can be operated.
Typical current consume is 3μA.
Hardware Shutdown
The chip enters hardware shutdown when the SDB pin
is pulled low. All analog circuits are disabled during
hardware shutdown, typical the current consume is
3μA.
If VCC has risk drop below 1.75V but above 0.1V
during SDB pulled low, please re-initialize all Function
Registers before SDB pulled high.
LAYOUT
As described in external resistor (REXT), the chip
consumes lots of power. Please consider below
factors when layout the PCB.
1. The VCC (PVCC, AVCC, VIO) capacitors need to
close to the chip and the ground side should well
connected to the GND of the chip.
2. REXT should be close to the chip and the ground
side should well connect to the GND of the chip.
3. The thermal pad should connect to ground pins and
the PCB should have the thermal pad too, usually this
pad should have some via thru the PCB to other
side’s ground area to help radiate the heat. About the
thermal pad size, please refer to the land pattern of
each package.
4. The CSx pins maximum current is 84mA
(REXT=20kΩ), and the SWy pins maximum current is
336mA (REXT=20kΩ), the width of the trace, SWy
should have wider trace then CSx.
5. In the middle of SDA and SCL trace, a ground line
is recommended to avoid the effect between these
two lines.
The chip releases hardware shutdown when the SDB
pin is pulled high. During hardware shutdown state
Function Register can be operated.
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Rev. B, 01/18/2018
28
IS31FL3740
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
6°C/second max.
Time 25°C to peak temperature
8 minutes max.
Figure 20 Classification Profile
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Rev. B, 01/18/2018
29
IS31FL3740
PACKAGE INFORMATION
QFN-20
eTSSOP-20
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Rev. B, 01/18/2018
30
IS31FL3740
RECOMMENDED LAND PATTERN
QFN-20
eTSSOP-20
Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since
land pattern design depends on many factors unknown (eg. User’s board manufacturing specs), user must determine suitability for use.
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Rev. B, 01/18/2018
31
IS31FL3740
REVISION HISTORY
Revision
Detail Information
Date
0A
Initial release
2017.10.12
A
Update to final version
2017.11.24
B
1. Add Note 4 for VIO voltage description
2. Update θJA value
2018.01.18
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Rev. B, 01/18/2018
32
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