IS31FL3746B
18×4 DOTS MATRIX LED DRIVER WITH 12MHZ SPI
December 2018
GENERAL DESCRIPTION
FEATURES
The IS31FL3746B is a general purpose 18×n (n=1~4)
LED Matrix programmed via 12MHz SPI interface.
Each LED can be dimmed individually with 8-bit PWM
data and 8-bit DC scaling data which allowing 256
steps of linear PWM dimming and 256 steps of DC
current adjustable level.
Additionally each LED open state can be detected,
IS31FL3746B store the open information in OpenRegisters. The Open Registers allowing MCU to read
out via SPI, inform MCU whether there are LEDs open
or short LEDs.
Supply voltage range: 2.7V to 5.5V
18 current sinks
Support 18×n (n=1~4) LED matrix configurations
Accurate color rendition
- 8-bit PWM
- 8-bit dot correction
- 8-bit global current adjust
SDB rising edge reset SPI module
29kHz PWM frequency
12MHz SPI interface
Individual open and short error detect function
180 degree phase delay operation to reduce
power noise
Spread spectrum
De-ghost
QFN-32 (4mm×4mm) package
The IS31FL3746B operates from 2.7V to 5.5V and
features a very low shutdown and operational current.
IS31FL3746B is available in QFN-32 (4mm×4mm)
package. It operates from 2.7V to 5.5V over the
temperature range of -40°C to +125°C.
APPLICATIONS
Hand-held devices for LED display
Gaming device (Keyboard, Mouse etc.)
LED in white goods application
TYPICAL APPLICATION CIRCUIT
5V
3.3V
29
*Note 3
VCC
VIO
*Note 3
19
1 F 0.1 F
SW1 SW2 SW3 SW4
0.1 F
*Note 2
3.3V
23
21
Micro
Controller
22
*Note 4
24
20
100k
SW1
MOSI
SW2
SCK
SW3
CS
MISO
SDB
SW4
28
27
51
CS18
20
26
25
CS17
20
CS16
IS31FL3746B
CS1
0.1 F
CS2
32
1
51
CS3
20
31
RISET
10k
9
30
ISET
GND
CS2
CS17
17
CS18
18
20
CS1
Figure 1 Typical Application Circuit: 24 RGBs
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IS31FL3746B
TYPICAL APPLICATION CIRCUIT (CONTINUED)
5V
3.3V
29
*Note 3
VCC
VIO
*Note 3
19
1 F 0.1 F
0.1 F
*Note 2
SW1 SW2 SW3 SW4
3.3V
23
21
Micro
Controller
22
*Note 4
24
20
100k
SW1
MOSI
SW2
SCK
SW3
CS
MISO
SDB
SW4
28
27
20
CS18
20
26
25
CS17
20
CS16
IS31FL3746B
CS1
0.1 F
CS2
32
1
20
CS3
20
31
ISET
RISET
10k
9
30
GND
CS2
CS17
17
CS18
18
20
CS1
Figure 2 Typical Application Circuit: 72 Mono Color LEDs
Note 1: IC should be placed far away from the antenna in order to prevent the EMI.
Note 2: The 20Ω or 51Ω resistors between LED and IC are only for thermal reduction, for mono red LED, if VCC=3.3V, don’t need these
resistors.
Note 3: The VIH of SPI bus should be same as VIO pin. VIO pin need to connect to a reference voltage and usually it is same as the VCC of
MCU. If VCC of MCU is 1.8V, VIO=1.8V, if VCC of MCU is 5V, VIO=5V.
Note 4: MISO VOH=VIO.
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IS31FL3746B
PIN CONFIGURATION
Package
Pin Configuration (Top View)
QFN-32
PIN DESCRIPTION
No.
Pin
Description
1~8, 10~18
CS2~CS18
Current sink pin for LED matrix.
9,30
GND
Ground.
19
VIO
Input logic reference voltage, can’t be floated.
20
SDB
Shutdown pin.
21
SCK
SPI clock.
22
CS
CS of SPI.
23
MOSI
SPI input data.
24
MISO
MISO of SPI.
25~28
SW4~SW1
Power SW.
29
VCC
Power for current source SW and analog.
31
ISET
Set the maximum IOUT current.
32
CS1
Current sink pin for LED matrix.
Thermal Pad
Connect to GND.
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IS31FL3746B
ORDERING INFORMATION
Industrial Range: -40°C to +125°C
Order Part No.
Package
QTY/Reel
IS31FL3746B-QFLS4-TR
QFN-32, Lead-free
2500
Copyright © 2018 Lumissil Microsystems. All rights reserved. Lumissil Microsystems reserves the right to make changes to this specification and its
products at any time without notice. Lumissil Microsystems assumes no liability arising out of the application or use of any information, products or
services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and
before placing orders for products.
Lumissil Microsystems does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use
in such applications unless Lumissil Microsystems receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Lumissil Microsystems is adequately protected under the circumstances
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IS31FL3746B
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC
Voltage at any input pin
Maximum junction temperature, TJMAX
Storage temperature range, TSTG
Operating temperature range, TA=TJ
Package thermal resistance, junction to ambient (4 layer standard
test PCB based on JESD 51-2A), θJA
ESD (HBM)
ESD (CDM)
-0.3V ~+6.0V
-0.3V ~ VCC+0.3V
+150°C
-65°C ~+150°C
-40°C ~ +125°C
52°C/W
±8kV
±750V
Note 5: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
The following specifications apply for VCC= 5V, TA = 25°C, unless otherwise noted.
Symbol
Parameter
VCC
Supply voltage
ICC
Quiescent power supply current
Conditions
Min.
Typ.
2.7
Max.
Unit
5.5
V
mA
VSDB=VCC, all LEDs off
2.3
3
VSDB=0V
2.8
4
4
ISD
Shutdown current
VSDB= VCC, Configuration
Register written “0000 0000
2.8
IOUT
Maximum constant current of
CSx
RISET=10kΩ, GCC=0xFF,
SL=0xFF
34.5
mA
ILED
Average current on each LED
ILED = IOUT(PEAK)/Duty(1/4.14)
RISET=10kΩ, GCC=0xFF,
SL=0xFF
8.33
mA
Current switch headroom
voltage SWx
ISWITCH=612mA RISET=10kΩ,
GCC=0xFF, SL=0xFF
450
Current sink headroom voltage
CSx
ISINK=34mA, RISET=10kΩ,
GCC=0xFF, SL=0xFF
250
VHR
tSCAN
Period of scanning
tNOL1
Non-overlap blanking time
during scan, the SWx and CSy
are all off during this time
tNOL2
Delay total time for CS1 to CS
18, during this time, the SWx is
on but CSx is not all turned on
μA
mV
(Note 6)
33
µs
0.83
µs
0.3
µs
Logic Electrical Characteristics (SCK, MISO, MOSI, CS, SDB)
VIL
Logic “0” input voltage
VIO=1.8V, VIO=3.3V
GND
0.2VIO
V
VIH
Logic “1” input voltage
VIO=1.8V, VIO=3.3V
0.75VIO
VIO
V
VHYS
Input Schmitt trigger hysteresis
VIO=3.3V
VOH
H level MISO pin output voltage
IOH= -8mA, VIO=1.8V, VIO=3.3V
VIO-0.4V
VIO
V
VOL
L level MISO pin output voltage
IOL= 8mA, VIO=1.8V, VIO=3.3V
0
0.4
V
IIL
Logic “0” input current
SDB=L, VINPUT = L (Note 6)
5
nA
IIH
Logic “1” input current
SDB=L, VINPUT = H (Note 6)
5
nA
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0.2
V
5
IS31FL3746B
DIGITAL INPUT SPI SWITCHING CHARACTERISTICS (NOTE 6)
Symbol
fC
tSLCH
tSHCH
tSHSL
tCHSH
tCHSL
tCH
tCL
tCLCH
tCHCL
tDVCH
tCHDX
tSHQZ
tCLQV
tCLQX
tQLQH
tQLQH
Parameter
Clock frequency
CS active set-up time
CS not active set-up time
CS detect time
CS active hold time
CS not active hold time
Clock high time
Clock low time
Clock rise time
Clock fall time
Data in set-up time
Data in hold time
Output disable time
Clock low to output valid
Output hold time
Output rise time
Output fall time
Min.
34
Typ.
Max.
Units
12
MHz
9
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
17
167
34
17
34
34
7
9
34
39
0
17
17
Note 6: Guaranteed by design.
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IS31FL3746B
FUNCTIONAL BLOCK DIAGRAM
ISET
SDB
VCC
Global Current
256 Steps
VIO
Bias
Trim
Spread
Spectrum
Bandgap
OSC
SSD
Config
SWX
Sequence
SCK
MOSI
CS
Level
Shift
PWM
Counter 1
SPI
Pointer
PWM
PWM
Counter 2
MISO
Scan Switch &
Current Sink
SW1~SW4
CS1~CS18
Scaling
Pull-down
Resister
Selection
Open/Short
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Ghost
Eliminating
GND
7
IS31FL3746B
DETAILED DESCRIPTION
SPI INTERFACE
ADDRESS AUTO INCREMENT
IS31FL3746B uses a SPI protocol to control the chip’s
function with four wires: CS, SCK, MOSI and MISO.
SPI transfer starts form CS pin from high to low
controlled
by
Master
(Microcontroller),
and
IS31FL3746B latches data when clock rising.
To write multiple bytes of data into IS31FL3746B, load
the address of the data register that the first data byte
is intended for. During the 8th rising edge of receiving
the data byte, the internal address pointer will
increment by one. The next data byte sent to
IS31FL3746B will be placed in the new address, and
so on. The auto increment of the address will continue
as long as data continues to be written to
IS31FL3746B (Figure 6).
SPI data format is 8-bit length. The first command byte
composite of 1-bit R/W bit, 3-bit chip ID bit and 4-bit
page bit. The command byte must be sent first, and is
followed by register address byte then the register
data. If the R/W bit is “0”, it will be write operation and
Master (Micro-controller) can write the register data
into the register.
The maximum SCK
IS31FL3746B is 12MHz.
frequency
Table 1 SPI Command Byte
Name
R/W
ID bit
supported
Page No.
Bit
D7
D6:D4
D3:D0
Value
0: Write
1: Read
100
0x00: Point to Page 0
0x01: Point to Page 1
in
READING OPERATION
Page 0~Page 1 registers can be read by SPI.
To read the registers of Page 0 thru Page 1, The D7
of the Command Byte need to be set to “1” and select
the page number. If read one register, as shown in
figure 7, read the MISO data after sending the
command byte and register address. If read more
registers, as shown in figure 8, the register address
will auto increase during the 8th rising edge of
receiving the last bit of the previous register data.
Figure 3 SPI Input Timing
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IS31FL3746B
Figure 4 SPI Input Timing
Figure 5 SPI writing to IS31FL3746B (Typical)
Figure 6 SPI writing to IS31FL3746B (Automatic Address Increment)
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IS31FL3746B
Figure 7 SPI Reading From IS31FL3746B (Typical)
Figure 8 SPI Reading From IS31FL3746B (Automatic Address Increment)
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IS31FL3746B
Table 2 Register Definition
Address
Name
Function
Table
R/W
Default
Set PWM for each LED
3
R/W
0000 0000
Scaling Register
Set Scaling for each LED
4
R/W
0000 0000
50h
Configuration Register
Configure the operation mode
6
R/W
0000 0000
51h
Global Current Control
Register
Set the global current
7
R/W
0000 0000
52h
Pull Down/Up Resistor
Selection Register
Set the pull down resistor for SWx and
pull up resistor for CSy
8
R/W
0011 0011
53h~5Eh
Open/Short Register
Store the open information
9
R
0000 0000
5Fh
Temperature Status
Store the temperature point of the IC
10
R/W
0000 0000
60h
Spread Spectrum Register
Spread spectrum function enable
11
R/W
0000 0000
8Fh
Reset Register
Reset all register to POR state
-
W
0000 0000
E0h
PWM Frequency Enable
Register
Enable PWM frequency setting
12
W
0000 0000
E2h
PWM Frequency Setting
Register
Set the PWM frequency
13
W
0000 0000
PG0 (0x40): PWM Register
01h~48h
PWM Register
PG1 (0x41): LED Scaling Register
01h~48h
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IS31FL3746B
Page 0 (PG0, Page No. = 0x40): PWM Register
T01
T02
T03
T04
PVCC
SW1
SW2
SW3
SW4
PWM PWM PWM
CS18
12
24
36
48
CS17
11
23
35
47
CS16
10
22
34
46
PAGE 0
Y
X
PWM PWM PWM
CS03
03
15
27
39
CS02
02
14
26
38
01
13
25
37
CS01
Figure 9 PWM Register
Table 3 PG0: 01h ~ 48h PWM Register
Bit
D7:D0
Name
PWM
Default
0000 0000
Duty
PWM
I OUT ( PEAK ) Duty
256
PWM
7
D[n ] 2
(2)
IOUT is the output current of CSy (y=1~18),
Each dot has a byte to modulate the PWM duty in
256 steps.
The value of the PWM Registers decides the
average current of each LED noted ILED.
ILED computed by Formula (1):
I LED
33s
1 1
33s 0.83 0.3s 4 4.14
n
n0
Where Duty is the duty cycle of SWx,
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(1)
I OUT( PEAK)
343 GCC SL
RISET 256 256
(3)
GCC is the Global Current Control Register (PG1,
51h) value, SL is the Scaling Register value as Table
9 and RISET is the external resistor of ISET pin. D[n]
stands for the individual bit value, 1 or 0, in location
n.
For example: if D7:D0=1011 0101 (0xB5, 181),
GCC=1111 1111, RISET =10kΩ, SL=1111 1111:
I LED
343
255 255
1
181
10 k 256 256 4 .14 256
12
IS31FL3746B
Page 1 (PG1, Page No.= 0x41): LED Scaling Register
T01
T02
T03
T04
PVCC
SW1
SW2
SW3
SW4
PWM PWM PWM
CS18
12
24
36
48
CS17
11
23
35
47
CS16
10
22
34
46
PAGE 1
Y
X
PWM PWM PWM
CS03
03
15
27
39
CS02
02
14
26
38
CS01
01
13
25
37
Figure 10 Scaling Register
IOUT is the output current of CSy (y=1~18), GCC is
the Global Current Control Register (PG1, 51h)
value and RISET is the external resistor of ISET pin.
D[n] stands for the individual bit value, 1 or 0, in
location n.
Table 4 PG1: 01h ~ 48h Scaling Register
Bit
D7:D0
Name
SL
Default
0000 0000
Scaling register control the DC output current of
each dot. Each dot has a byte to modulate the
scaling in 256 steps.
The value of the Scaling Register decides the peak
current of each LED noted IOUT(PEAK).
343 GCC SL
RISET 256 256
SL
SL
(3)
7
D[n ] 2
n
127
n0
I OUT
IOUT(PEAK) computed by Formula (3):
IOUT( PEAK)
For example: if RISET=10kΩ, GCC=1111 1111,
SL=0111 1111:
343
255 127
16 .8 mA
10 k 256 256
I LED 16 .8 mA
1
PWM
4 .14
256
7
D[n] 2
n
n0
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IS31FL3746B
Table 5 Page 1 (PG1, Page No. = 0x41): Function Register
Register
Name
Function
Table
R/W
Default
50h
Configuration Register
Configure the operation mode
6
R/W
0000 0000
51h
Global Current Control
Register
Set the global current
7
R/W
0000 0000
52h
Pull Down/Up Resistor
Selection Register
Set the pull down resistor for SWx
and pull up resistor for CSy
8
R/W
0011 0011
53h~5Eh
Open/Short Register
Store the open/short information
9
R
0000 0000
5Fh
Temperature Status
Store the temperature point of the IC
10
R/W
0000 0000
60h
Spread Spectrum Register
Spread spectrum function enable
11
R/W
0000 0000
8Fh
Reset Register
Reset all register to POR state
-
W
0000 0000
E0h
PWM Frequency Enable
Register
Enable PWM frequency setting
12
W
0000 0000
E2h
PWM Frequency Setting
Register
Set the PWM frequency
13
W
0000 0000
Table 6 50h Configuration Register
Bit
D7:D4
D3
D2:D1
D0
Name
SWS
-
OSDE
SSD
Default
0000
0
00
0
The Configuration Register sets operating mode of
IS31FL3746B.
SSD
0
1
Software Shutdown Control
Software shutdown
Normal operation
OSDE
00
01/11
10
Open Short Detection Enable
Disable open/short detection
Enable open detection
Enable short detection
SWS
0000
0001
0010
0011
Others
SWx Setting
SW1~SW4, 1/4
SW1~SW3, 1/3, SW4 no-active
SW1~SW2, 1/2, SW3~SW4 no-active
All CSx work as current sinks only, no scan
SW1~SW4, 1/4
When OSDE set to “01”, open detection will be trigger
once, the user could trigger open detection again by
set OSDE from “00” to “01”.
When OSDE set “10”, short detection will be trigger
once, the user could trigger short detection again by
set OSDE from “00” to “10”.
When SSD is “0”, IS31FL3746B works in software
shutdown mode and to normal operate the SSD bit
should set to “1”.
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SWS control the duty cycle of the SWx, default mode
is 1/4.
Table 7 51h Global Current Control Register
Bit
D7:D0
Name
GCC
Default
0000 0000
The Global Current Control Register modulates all
CSy (y=1~18) DC current which is noted as IOUT in
256 steps.
IOUT is computed by the Formula (3):
IOUT( PEAK)
343 GCC SL
RISET 256 256
(3)
7
GCC D[n] 2 n
n 0
Where D[n] stands for the individual bit value, 1 or 0,
in location n.
Table 8 52h Pull Down/Up Resistor Selection
Register
Bit
D7
D6:D4
D3
D2:D0
Name
PHC
SWPDR
-
CSPUR
Default
0
011
0
011
Set pull down resistor for SWx and pull up resistor for
CSy.
PHC
0
1
Phase choice
0 degree phase delay
180 degree phase delay
14
IS31FL3746B
CS09
PWM
CS08
PWM
CS07
PWM
CS06
PWM
CS05
PWM
CS04
PWM
CS03
PWM
CS02
PWM
CS01
SW2
T04
SW3
SW4
54
57
5A
5D
53
56
59
5C
55
CS10
PWM
When OSDE (PG1, 50h) is set to “01”, open detection
will be trigger once, and the open information will be
stored at 53h~5Eh.
When OSDE (PG1, 50h) set to “10”, short detection
will be trigger once, and the short information will be
stored at 53h~5Eh.
Before set OSDE, the GCC should set to 0x0F~0x40
and the 52h should set to 0x00.
CS11
PWM
00 0000
CS12
PWM
00
CS13
PWM
Default
CS14
PWM
CS18:CS13,
CS12:CS07,CS06:CS01
CS15
PWM
-
CS16
PWM
Name
CS17
PWM
D5:D0
PWM
D7:D6
PWM
Table 9 53h~5Eh Open/Short Register (Read Only)
CS18
T03
PVCC
5E
SW1
CSPUR
CSy Pull up Resistor Selection Bit
000
No pull up resistor
001
0.5kΩ only in CSx off time
010
1.0kΩ only in CSx off time
011
2.0kΩ only in CSx off time
100
1.0kΩ all the time
101
2.0kΩ all the time
110
4.0kΩ all the time
111
8.0kΩ all the time
Bit
T02
5B
T01
58
SWPDR
SWx Pull down Resistor Selection Bit
000
No pull down resistor
001
0.5kΩ only in SWx off time
010
1.0kΩ only in SWx off time
011
2.0kΩ only in SWx off time
100
1.0kΩ all the time
101
2.0kΩ all the time
110
4.0kΩ all the time
111
8.0kΩ all the time
Figure 11 Open/Short Register
Table 10 5Fh Temperature Status
Bit
D7:D4
D3:D2
D1:D0
Name
-
TS
TROF
Default
0000
00
00
TS store the temperature point of the IC. If the IC
temperature reaches the temperature point the IC will
trigger the thermal roll off and will decrease the
current as TROF set percentage.
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TROF
00
01
10
11
percentage of output current
100%
75%
55%
30%
TS
00
01
10
11
Temperature Point, Thermal roll off start point
140°C
120°C
100°C
90°C
15
IS31FL3746B
Table 11 60h Spread Spectrum Register
Table 12 E0h PWM Frequency Enable Register
Bit
D7:D6
D4
D3:D2
D1:D0
Bit
D7:D1
D0
Name
-
SSP
RNG
CLT
Name
-
PFEN
Default
00
0
00
00
Default
0000 000
0
When SSP enable, the spread spectrum function will
be enabled and the RNG & CLT bits will adjust the
range and cycle time of spread spectrum function.
The PWM Frequency Enable Register enables or
disables to change the PWM frequency.
If PFEN=”1”, user can change the PWM frequency by
modifying the E2h register.
SSP
0
1
Spread spectrum function enable
Disable
Enable
PFEN PWM Frequency Enable
0
Disable
1
Enable
RNG
00
01
10
11
Spread spectrum range
±5%
±15%
±24%
±34%
Table 13 E2h PWM Frequency Setting Register
CLT
00
01
10
11
Spread spectrum cycle time
1980μs
1200μs
820μs
660μs
8Fh Reset Register
Once user writes the Reset Register with 0xAE,
IS31FL3746B will reset all the IS31FL3746B registers
to their default value. On initial power-up, the
IS31FL3746B registers are reset to their default values
for a blank display.
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Rev. A, 12/11/2018
Bit
D7:D5
D4:D0
Name
PF
-
Default
000
0 0000
PWM Frequency Setting Register is used to set the
PWM frequency.
PF
000/111
001
010
011
100
101
110
PWM Frequency
29kHz
14.5kHz
7.25kHz
3.63kHz
1.81kHz
906Hz
453Hz
16
IS31FL3746B
APPLICATION INFORMATION
I OUT
3 4 3 GCC
SL
R ISET
256
256
Figure 12 Scanning Timing
SCANING TIMING
As shown in Figure 12, the SW1~SW4 is turned on
by serial, LED is driven 4 by 4 within the SWx
(x=1~4) on time (SWx, x=1~4 is source and it is high
when LED on) , including the non-overlap blanking
time during scan, the duty cycle of SWx (active high,
x=1~4) is:
Duty
33s
1
1
33s 0.83s 0.3s 4 4.14
(2)
Where 33μs is tSCAN, the period of scanning, 0.83μs
is tNOL1, 0.3μs is tNOL2, the non-overlap time and CSy
(y=1~18) delay time.
PWM CONTROL
After setting the IOUT and GCC, the brightness of
each LEDs (LED average current (ILED)) can be
modulated with 256 steps by PWM Register, as
described in Formula (1).
I LED
PWM
I OUT( PEAK) Duty
256
(1)
Where PWM is PWM Registers (PG0, 01h~48h
/PG0) data showing in Table 6.
For example, in Figure 1, if RISET= 10kΩ, PWM= 255,
and GCC= 255, SL= 255, then
243 255 255
IOUT( PEAK)
34mA
10k 256 256
1 PWM
I LED I OUT( PEAK)
4.14 256
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Rev. A, 12/11/2018
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
GAMMA CORRECTION
In order to perform a better visual LED breathing
effect we recommend using a gamma corrected
PWM value to set the LED intensity. This results in a
reduced number of steps for the LED intensity
setting, but causes the change in intensity to appear
more linear to the human eye.
Gamma correction, also known as gamma
compression or encoding, is used to encode linear
luminance to match the non-linear characteristics of
display. Since the IS31FL3746B can modulate the
brightness of the LEDs with 256 steps, a gamma
correction function can be applied when computing
each subsequent LED intensity setting such that the
changes in brightness matches the human eye's
brightness curve.
Table 14 32 Gamma Steps with 256 PWM Steps
C(0)
C(1)
C(2)
C(3)
C(4)
C(5)
C(6)
C(7)
0
1
2
4
6
10
13
18
C(8)
C(9)
C(10)
C(11)
C(12)
C(13)
C(14)
C(15)
22
28
33
39
46
53
61
69
C(16)
C(17)
C(18)
C(19)
C(20)
C(21)
C(22)
C(23)
78
86
96
106
116
126
138
149
C(24)
C(25)
C(26)
C(27)
C(28)
C(29)
C(30)
C(31)
161
173
186
199
212
226
240
255
17
256
256
224
224
192
192
PWM Data
PWM Data
IS31FL3746B
160
128
96
160
128
96
64
64
32
32
0
0
4
8
12
16
20
24
28
32
0
0
8
16
Intensity Steps
Figure 13 Gamma Correction (32 Steps)
C(2)
C(3)
C(4)
C(5)
40
48
56
64
Figure 14 Gamma Correction (64 Steps)
Table 15 64 Gamma Steps with 256 PWM Steps
C(1)
32
Intensity Steps
Choosing more gamma steps provides for a more
continuous looking breathing effect. This is useful for
very long breathing cycles. The recommended
configuration is defined by the breath cycle T. When
T=1s, choose 32 gamma steps, when T=2s, choose
64 gamma steps. The user must decide the final
number of gamma steps not only by the LED itself,
but also based on the visual performance of the
finished product.
C(0)
24
C(6)
C(7)
0
1
2
3
4
5
6
7
C(8)
C(9)
C(10)
C(11)
C(12)
C(13)
C(14)
C(15)
8
10
12
14
16
18
20
22
C(16)
C(17)
C(18)
C(19)
C(20)
C(21)
C(22)
C(23)
24
26
29
32
35
38
41
44
C(24)
C(25)
C(26)
C(27)
C(28)
C(29)
C(30)
C(31)
47
50
53
57
61
65
69
73
C(32)
C(33)
C(34)
C(35)
C(36)
C(37)
C(38)
C(39)
77
81
85
89
94
99
104
109
C(40)
C(41)
C(42)
C(43)
C(44)
C(45)
C(46)
C(47)
114
119
124
129
134
140
146
152
C(48)
C(49)
C(50)
C(51)
C(52)
C(53)
C(54)
C(55)
158
164
170
176
182
188
195
202
C(56)
C(57)
C(58)
C(59)
C(60)
C(61)
C(62)
C(63)
209
216
223
230
237
244
251
255
Note 7: The data of 32 gamma steps is the standard value and
the data of 64 gamma steps is the recommended value.
OPERATING MODE
IS31FL3746B can only operate in PWM Mode. The
brightness of each LED can be modulated with 256
steps by PWM registers. For example, if the data in
PWM Register is “0000 0100”, then the PWM is the
fourth step.
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
OPEN/SHORT DETECT FUNCTION
IS31FL3746B has open and short detect bit for each
LED.
By setting the OSD bits of the Configuration Register
(PG1, 50h) from “00” to “01” or “10”, the LED
Open/short Register will start to store the open/short
information and after at least 2 scanning cycles and
the MCU can get the open/short information by
reading the 53h~5Eh, for those dots are turned off
via LED Scaling Registers (PG1, 01h~48h), the
open/short data will not get refreshed when setting
the OSD bit of the Configuration Register.
To get the correct open and short information, two
configurations need to set before setting the OSD
bits:
1 0x0F≤ GCC≤ 0x40
2 52h= 0x00
Where GCC is the Global Current Control Register
(PG1, 51h) and 52h is the Pull Down/UP Resistor
Selection Register and set to 0x00 is to disable the
SWx pull-down and CSy pull-up function.
The detect action is one-off event and each time
before reading out the open/short information, the
OSDE bit of the Configuration Register (PG1, 50h)
need to be set from “00” to “01”/“10” (clear before set
operation).
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Rev. A, 12/11/2018
18
IS31FL3746B
De-Ghost Function
Hardware Shutdown
The “ghost” term is used to describe the behavior of
an LED that should be OFF but instead glows dimly
when another LED is turned ON. A ghosting effect
typically can occur when multiplexing LEDs. In
matrix architecture any parasitic capacitance found
in the constant-current outputs or the PCB traces to
the LEDs may provide sufficient current to dimly light
an LED to create a ghosting effect.
The chip enters hardware shutdown when the SDB
pin is pulled low. All analog circuits are disabled
during hardware shutdown, typical the current
consume is 2.8μA.
To prevent this LED ghost effect, the IS31FL3746B
has integrated Pull down resistors for each SWx
(x=1~4) and Pull up resistors for each CSy (y=1~18).
Select the right SWx Pull down resistor (PG1, 52h)
and CSy Pull up resistor (PG1, 52h) which
eliminates the ghost LED for a particular matrix
layout configuration.
Typically, selecting the 8kΩ will be sufficient to
eliminate the LED ghost phenomenon.
The SWx Pull down resistors and CSy Pull up
resistors are active only when the CSy/SWx output
working the OFF state and therefore no power is lost
through these resistors.
When IS31FL3746B works in hardware shutdown
mode, the de-ghost function should be disabled,
otherwise it will be extra about 1μA shutdown current.
I2C RESET
The I2C will be reset if the SDB pin is pull-high from
0V to logic high, at the operating SDB rising edge,
the I2C operation is not allowed.
SHUTDOWN MODE
Shutdown mode can be used as a means of
reducing power consumption. During shutdown
mode all registers retain their data.
Software Shutdown
By setting SSD bit of the Configuration Register
(PG1, 50h) to “0”, the IS31FL3746B will operate in
software shutdown mode. When the IS31FL3746B is
in software shutdown, all current sources are
switched off, so that the matrix is blanked. All
registers can be operated. Typical current consume
is 2.8μA.
Lumissil Microsystems – www.lumissil.com
Rev. A, 12/11/2018
The chip releases hardware shutdown when the
SDB pin is pulled high. During hardware shutdown
state Function Register can be operated.
If VCC has risk drop below 1.75V but above 0.1V
during SDB pulled low, please re-initialize all
Function Registers before SDB pulled high.
LAYOUT
The IS31FL3746B consumes lots of power so good
PCB layout will help improve the reliability of the chip.
Please consider below factors when layout the PCB.
Power Supply Lines
When designing the PCB layout pattern, the first
step should consider about the supply line and GND
connection, especially those traces with high current,
also the digital and analog blocks’ supply line and
GND should be separated to avoid the noise from
digital block affect the analog block.
At least one 0.1μF capacitor, if possible with a
0.47μF or 1μF
capacitor is recommended to
connected to the ground at each power supply pins
of the chip, and it needs to close to the chip and the
ground net of the capacitor should be well connected
to the GND plane.
RISET
RISET should be close to the chip and the ground side
should well connect to the GND plane.
Thermal Consideration
The over temperature of the chip may result in
deterioration of the properties of the chip.
IS31FL3746B has thermal pad but the chip could be
very hot if power is very large. So do consider the
ground area connects to the GND pins and thermal
pad. Other traces should keep away and ensure the
ground area below the package is integrated, and
the back layer should be connected to the thermal
pad thru 9 or 16 vias to be maximized the area size
of ground plane.
19
IS31FL3746B
Current Rating Example
For a RISET=10kΩ application, the current rating for
each net is as follows:
• VCC and SWx pins= 34mA ×18=612mA,
recommend trace width: 0.2032mm~0.5mm.
• CSy
pins= 34mA, recommend trace width:
0.1016mm~0.254mm.
• All other pins< 3mA, recommend trace width:
0.1016mm~0.254mm.
Figure 15 Layout Example
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Rev. A, 12/11/2018
20
IS31FL3746B
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
6°C/second max.
Time 25°C to peak temperature
8 minutes max.
Figure 16 Classification Profile
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Rev. A, 12/11/2018
21
IS31FL3746B
PACKAGE INFORMATION
QFN-32
Lumissil Microsystems – www.lumissil.com
Rev. A, 12/11/2018
22
IS31FL3746B
RECOMMENDED LAND PATTERN
QFN-32
Note 8:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since
land pattern design depends on many factors unknown (eg. User’s board manufacturing specs), user must determine suitability for use.
Lumissil Microsystems – www.lumissil.com
Rev. A, 12/11/2018
23
IS31FL3746B
REVISION HISTORY
Revision
Detail Information
Date
0B
Initial release
2018.10.22
A
Update EC table, features and other information
2018.12.11
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Rev. A, 12/11/2018
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