SN74LS245M

SN74LS245 Octal Bus Transceiver The SN74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input (DR) controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input (E) can be used to isolate the buses. • • • • http://onsemi.com Hysteresis Inputs to Improve Noise Immunity 2-Way Asynchronous Data Bus Communication Input Diodes Limit High-Speed Termination Effects ESD > 3500 Volts LOW POWER SCHOTTKY LOGIC AND CONNECTION DIAGRAMS DIP (TOP VIEW) VCC E B1 B2 B3 B4 B5 B6 B7 B8 20 19 18 17 16 15 14 13 12 11 MARKING DIAGRAMS 20 1 2 3 4 5 6 7 8 9 10 DIR A1 A2 A3 A4 A5 A6 A7 A8 GND SN74LS245N AWLYYWW PDIP−20 N SUFFIX CASE 738 1 1 LS245 AWLYYWW 20 1 TRUTH TABLE INPUTS E DIR L L H L H X SOIC−20 DW SUFFIX CASE 751D OUTPUT Bus B Data to Bus A Bus A Data to Bus B Isolation 74LS245 AWLYWW SOEIAJ−20 M SUFFIX CASE 967 20 1 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial A WL YY WW GUARANTEED OPERATING RANGES Symbol VCC Parameter Supply Voltage TA Operating Ambient Temperature Range IOH Output Current − High IOL Output Current − Low 1 Min Typ Max Unit 4.75 5.0 5.25 V 0 25 70 °C −3.0 mA −15 mA 24 mA 1 = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device SN74LS245N SN74LS245DW Package Shipping PDIP−20 1440 Units/Box SOIC−WIDE 38 Units/Rail SN74LS245DWR2 SOIC−WIDE 2500/Tape & Reel SN74LS245M SOEIAJ−20 See Note 1 SN74LS245MEL SOEIAJ−20 See Note 1 1. For ordering information on the EIAJ version of the SOIC package, please contact your local ON Semiconductor representative. © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 9 1 Publication Order Number: SN74LS245/D SN74LS245 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VT+−VT− Hysteresis VIK Input Clamp Diode Voltage VOH Output HIGH Voltage VOL Output LOW Voltage IOZH IOZL IIH Typ Max 2.0 0.8 0.2 0.4 −0.65 2.4 −1.5 3.4 2.0 Unit Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs V VCC = MIN V VCC = MIN, IIN = − 18 mA V VCC = MIN, IOH = − 3.0 mA V VCC = MIN, IOH = MAX VCC = VCC MIN, VIN = VIL or VIH per Truth Table 0.25 0.4 V IOL = 12 mA 0.35 0.5 V IOL = 24 mA Output Off Current HIGH 20 μA VCC = MAX, VOUT = 2.7 V Output Off Current LOW Input HIGH Current −200 μA VCC = MAX, VOUT = 0.4 V A or B, DR or E 20 μA VCC = MAX, VIN = 2.7 V DR or E 0.1 mA VCC = MAX, VIN = 7.0 V A or B 0.1 mA VCC = MAX, VIN = 5.5 V −0.2 mA VCC = MAX, VIN = 0.4 V −225 mA VCC = MAX mA VCC = MAX IIL Input LOW Current IOS Output Short Circuit Current (Note 2) ICC Min −40 Power Supply Current Total, Output HIGH 70 Total, Output LOW 90 Total at HIGH Z 95 2. Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V, TRISE / TFALL ≤ 6.0 ns) Limits Symbol Parameter Min Typ Max Unit tPLH tPHL Propagation Delay, Data to Output 8.0 8.0 12 12 ns tPZH Output Enable Time to HIGH Level 25 40 ns tPZL Output Enable Time to LOW Level 27 40 ns tPLZ Output Disable Time from LOW Level 15 25 ns tPHZ Output Disable Time from HIGH Level 15 25 ns http://onsemi.com 2 Test Conditions CL = 45 pF, RL = 667 Ω CL = 5.0 pF, RL = 667 Ω SN74LS245 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 738−03 ISSUE E −A− 20 11 1 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. B L C −T− DIM A B C D E F G J K L M N K SEATING PLANE G M N E F D J 20 PL 0.25 (0.010) 20 PL 0.25 (0.010) T A M M T B M M INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01 D SUFFIX PLASTIC SOIC PACKAGE CASE 751D−05 ISSUE F A 20 q X 45 _ E h 1 10 20X B B 0.25 M T A S B S A L H M 10X 0.25 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 18X e A1 SEATING PLANE C T http://onsemi.com 3 DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ SN74LS245 PACKAGE DIMENSIONS M SUFFIX SOEIAJ PACKAGE CASE 967−01 ISSUE O 20 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 11 Q1 E HE 1 M_ L 10 DETAIL P Z D e VIEW P A A1 b 0.13 (0.005) c M 0.10 (0.004) DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 0.81 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.032 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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