S-8205BAL-TCT1U

S-8205A/B Series www.ablic.com © ABLIC Inc., 2010-2021 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK Rev.2.0_00 The S-8205A/B Series includes high-accuracy voltage detection circuits and delay circuits, in single use, makes it possible for users to monitor the status of 4-series or 5-series cell lithium-ion rechargeable battery. The S-8205A/B Series is suitable for protecting lithium-ion rechargeable battery pack from overcharge, overdischarge, and overcurrent.  Features • High-accuracy voltage detection function for each cell Overcharge detection voltage n (n = 1 to 5) 3.550 V to 4.500 V*1 (50 mV step) Accuracy ±25 mV Overcharge release voltage n (n = 1 to 5) 3.300 V to 4.500 V*2 Accuracy ±50 mV Overdischarge detection voltage n (n = 1 to 5) 2.000 V to 3.200 V*1 (100 mV step) Accuracy ±80 mV Overdischarge release voltage n (n = 1 to 5) 2.000 V to 3.400 V*3 Accuracy ±100 mV • Discharge overcurrent detection in 2-step Discharge overcurrent detection voltage 0.050 V to 0.300 V*4 (50 mV step) Accuracy ±15 mV Short circuit detection voltage 0.500 V to 1.000 V*4 (100 mV step) Accuracy ±100 mV • Charge overcurrent detection Charge overcurrent detection voltage −0.300 V to −0.050 V (50 mV step) Accuracy ±30 mV • Settable by external capacitor; Overcharge detection delay time, Overdischarge detection delay time, Discharge overcurrent detection delay time, Charge overcurrent detection delay time (Load short circuit detection delay time is internally fixed.) • S-8205A Series: used for 4-series cell, S-8205B Series: used for 5-series cell • Independent charging and discharge control by the control pins • 0 V battery charge Enabled, inhibited • Power-down function Available, unavailable • High-withstand voltage Absolute maximum rating : 28 V • Wide range of operation voltage 2 V to 24 V • Wide range of operation temperature Ta = −40°C to +85°C • Low current consumption During operation 40 μA max. (Ta = +25°C) During power-down 0.1 μA max. (Ta = +25°C) • Lead-free (Sn 100%), halogen-free *1. The overcharge detection voltage n (n = 1 to 5) and overdischarge detection voltage (n = 1 to 5) are not selectable if the voltage difference between them is 0.6 V or less. *2. Overcharge hysteresis voltage n (n = 1 to 5) is selectable in 0 V, or in 0.1 V to 0.4 V in 50 mV step. (Overcharge hysteresis voltage = Overcharge detection voltage − Overcharge release voltage) *3. Overdischarge hysteresis voltage n (n = 1 to 5) is selectable in 0 V, or in 0.2 V to 0.7 V in 100 mV step. (Overdischarge hysteresis voltage = Overdischarge release voltage − Overdischarge detection voltage) *4. The discharge overcurrent detection voltage and load short circuit detection voltage are not selectable if the voltage difference between them is 0.3 V or less.  Application • Rechargeable lithium-ion battery pack  Package • 16-Pin TSSOP 1 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00  Block Diagram 1. S-8205A Series Control circuit RVMD VM RVMS Delay circuit Delay circuit Delay circuit Delay circuit Delay circuit VDD VC1 Overcharge 1 − + Overdischarge 1 + − VC2 CO Overcharge 2 − + Overdischarge 2 + − DO Overcharge 3 − + Overdischarge 3 + − VC3 Overcharge 4 − + Overdischarge 4 + − VC4 VINI + − + − + − Discharge overcurrent Load short circuit VC5 Charge overcurrent RCTLC CTLC RCTLD VSS CTLD CCT CIT CDT Remark Diodes in the figure are parasitic diodes. Figure 1 2 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series 2. S-8205B Series Control circuit RVMD VM RVMS Delay circuit Delay circuit Delay circuit Delay circuit Delay circuit VDD VC1 Overcharge 1 − + Overdischarge 1 + − VC2 CO Overcharge 2 − + Overdischarge 2 + − DO Overcharge 3 − + Overdischarge 3 + − VC3 Overcharge 4 − + Overdischarge 4 + − VC4 Overcharge 5 − + Overdischarge 5 + − VC5 VINI + − + − + − Discharge overcurrent Load short circuit Charge overcurrent RCTLC CTLC RCTLD VSS CTLD CCT CIT CDT Remark Diodes in the figure are parasitic diodes. Figure 2 3 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00  Product Name Structure 1. Product Name S-8205 x xx - TCT1 U Environmental code U: Lead-free (Sn 100%), halogen-free Package abbreviation and IC packing specifications TCT1: 16-Pin TSSOP, Tape *1 Serial code*2 Sequentially set from AA to ZZ Product series name A: 4-cell B: 5-cell *1. Refer to the tape drawing. *2. Refer to "3. Product Name List". 2. Package Table 1 Package Drawing Code Package Name 16-Pin TSSOP 4 Dimension FT016-A-P-SD Tape FT016-A-C-SD Reel FT016-A-R-S1 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series 3. Product Name List Table 2 S-8205A Series (For 4-Series Cell) Discharge Load Short Charge Overcharge Overcharge Overdischarge Overdischarge PowerOvercurrent Circuit Overcurrent 0V Delay Detection Release Detection Release down Detection Detection Detection Battery Product Name Time*1 Voltage Voltage Voltage Voltage Function Voltage Voltage Voltage Charge [VCU] [VCL] [VDL] [VDU] [VDIOV] [VSHORT] [VCIOV] −0.100 V Enabled S-8205AAA-TCT1U 4.225 V 4.125 V 2.300 V 3.000 V 0.150 V 0.500 V Available (1) −0.100 V Enabled S-8205AAB-TCT1U 4.225 V 4.075 V 2.300 V 3.000 V 0.200 V 0.500 V Available (1) −0.050 V Enabled S-8205AAC-TCT1U 4.225 V 4.125 V 2.500 V 3.000 V 0.200 V 0.500 V Available (2) −0.100 V Enabled S-8205AAD-TCT1U 3.850 V 3.700 V 2.700 V 2.900 V 0.200 V 0.500 V Available (2) −0.100 V Enabled S-8205AAE-TCT1U 4.250 V 4.150 V 2.700 V 3.000 V 0.200 V 0.500 V Available (2) −0.100 V Inhibited S-8205AAF-TCT1U 4.250 V 4.150 V 2.500 V 3.000 V 0.100 V 0.500 V Available (2) −0.100 V Inhibited S-8205AAG-TCT1U 4.300 V 4.150 V 2.600 V 3.000 V 0.100 V 0.500 V Available (2) −0.100 V Inhibited S-8205AAH-TCT1U 4.400 V 4.250 V 2.800 V 3.000 V 0.150 V 0.600 V Available (2) −0.150 V Inhibited S-8205AAI-TCT1U 4.450 V 4.300 V 2.800 V 3.000 V 0.200 V 0.600 V Available (2) −0.150 V Inhibited S-8205AAJ-TCT1U 4.500 V 4.300 V 2.800 V 3.000 V 0.200 V 0.600 V Available (2) −0.100 V Enabled S-8205AAK-TCT1U 4.400 V 4.200 V 2.800 V 3.000 V 0.200 V 0.500 V Available (2) −0.100 V Enabled S-8205AAL-TCT1U 4.425 V 4.225 V 2.800 V 3.000 V 0.150 V 0.500 V Available (2) −0.100 V Enabled S-8205AAM-TCT1U 4.350 V 4.150 V 2.800 V 3.000 V 0.150 V 0.500 V Available (2) −0.100 V Enabled S-8205AAN-TCT1U 3.750 V 3.600 V 2.000 V 2.500 V 0.150 V 0.500 V Available (2) −0.100 V Inhibited S-8205AAO-TCT1U 4.425 V 4.275 V 2.800 V 3.000 V 0.150 V 0.600 V Available (2) −0.300 V Enabled S-8205AAP-TCT1U 4.280 V 4.180 V 2.300 V 2.500 V 0.050 V 0.500 V Available (2) −0.100 V Enabled S-8205AAQ-TCT1U 4.175 V 4.025 V 2.750 V 3.050 V 0.200 V 0.500 V Available (2) −0.100 V Enabled S-8205AAR-TCT1U 4.225 V 3.975 V 2.700 V 3.000 V 0.200 V 0.500 V Available (2) *1. The delay time is set by the external capacitor. But the discharge overcurrent release delay time (tDIOVR) and charge overcurrent release delay time (tCIOVR) are calculated by discharge overcurrent detection delay time (tDIOV) and charge overcurrent detection delay time (tCIOV) as the following equations. 1 [ms] (typ.) is the internal delay time of the S-8205A Series. (1) tDIOVR = tDIOV × 10 + 1 [ms] (typ.), tCIOVR = tCIOV × 10 + 1 [ms] (typ.) (2) tDIOVR = tDIOV × 0.05 + 1 [ms] (typ.), tCIOVR = tCIOV × 0.05 + 1 [ms] (typ.) Moreover, refer to "7. Delay Time Setting" in " Operation" for calculational methods of delay times. Remark Please contact our sales representatives for products other than the above. 5 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 Table 3 S-8205B Series (For 5-Series Cell) Product Name S-8205BAA-TCT1U S-8205BAB-TCT1U S-8205BAC-TCT1U S-8205BAD-TCT1U S-8205BAE-TCT1U S-8205BAF-TCT1U S-8205BAG-TCT1U S-8205BAH-TCT1U S-8205BAI-TCT1U S-8205BAJ-TCT1U S-8205BAK-TCT1U S-8205BAL-TCT1U S-8205BAM-TCT1U Discharge Load Short Charge Overcharge Overcharge Overdischarge Overdischarge Overcurrent Circuit Overcurrent 0V Detection Release Detection Release Detection Detection Detection Battery Voltage Voltage Voltage Voltage Voltage Voltage Voltage Charge [VCU] [VCL] [VDL] [VDU] [VDIOV] [VSHORT] [VCIOV] −0.100 V Enabled 4.225 V 4.125 V 2.300 V 3.000 V 0.150 V 0.500 V −0.100 V Enabled 4.225 V 4.075 V 2.300 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled 4.200 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled 4.200 V 4.000 V 2.700 V 3.000 V 0.150 V 1.000 V −0.100 V Enabled 4.200 V 4.100 V 2.500 V 3.200 V 0.150 V 0.500 V −0.200 V Enabled 4.200 V 4.050 V 2.700 V 3.000 V 0.200 V 0.500 V −0.200 V Enabled 4.250 V 4.150 V 2.700 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled 4.250 V 4.050 V 2.000 V 2.500 V 0.150 V 0.500 V −0.050 V Inhibited 4.225 V 4.075 V 2.300 V 3.000 V 0.100 V 0.500 V −0.100 V Enabled 4.200 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled 4.200 V 4.000 V 2.700 V 3.000 V 0.150 V 1.000 V −0.100 V Enabled 4.250 V 4.100 V 2.700 V 3.000 V 0.150 V 0.500 V −0.050 V Enabled 4.225 V 4.125 V 2.500 V 2.700 V 0.100 V 0.500 V Powerdown Function Delay Time*1 Available Available Available Available Available Available Available Available Available Available Available Unavailable Available (1) (1) (1) (1) (1) (1) (1) (1) (1) (2) (2) (2) (1) S-8205BAN-TCT1U 4.250 V 4.100 V 2.700 V 3.000 V 0.150 V 0.500 V −0.050 V Inhibited Available (1) S-8205BAO-TCT1U S-8205BAP-TCT1U S-8205BAQ-TCT1U 3.900 V 4.200 V 3.900 V 3.800 V 4.100 V 3.750 V 2.000 V 2.500 V 2.000 V 2.300 V 3.200 V 2.700 V 0.100 V 0.100 V 0.200 V 0.600 V 0.800 V 0.500 V −0.100 V −0.100 V −0.150 V (1) S-8205BAR-TCT1U 4.250 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled Enabled Enabled Enabled Enabled Available (2) Available Unavailable Available Available (2) (1) (1) S-8205BAS-TCT1U 4.250 V 4.100 V 2.500 V 3.000 V 0.150 V 0.500 V −0.100 V S-8205BAT-TCT1U 4.200 V 4.100 V 2.800 V 3.200 V 0.100 V 0.500 V −0.100 V Enabled Available (2) S-8205BAU-TCT1U 4.250 V 4.100 V 2.500 V 3.200 V 0.100 V 0.800 V −0.100 V Enabled Available (2) S-8205BAV-TCT1U 4.225 V 3.975 V 2.400 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2) S-8205BAW-TCT1U 4.280 V 4.080 V 2.800 V 3.000 V 0.200 V 0.600 V −0.100 V Enabled Available (2) S-8205BAX-TCT1U 4.225 V 3.975 V 2.500 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2) S-8205BAY-TCT1U 4.225 V 3.975 V 2.700 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2) (2) S-8205BAZ-TCT1U 4.225 V 3.975 V 3.000 V 3.200 V 0.200 V 0.500 V −0.100 V Enabled Available S-8205BBA-TCT1U 4.175 V 4.025 V 2.750 V 3.050 V 0.200 V 0.500 V −0.100 V Enabled Available (2) S-8205BBB-TCT1U 4.225 V 4.025 V 2.500 V 2.500 V 0.050 V 0.500 V −0.050 V Enabled Available (2) S-8205BBC-TCT1U 4.225 V 3.975 V 2.800 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2) S-8205BBD-TCT1U 4.225 V 3.975 V 2.850 V 3.000 V 0.200 V 0.500 V −0.100 V Enabled Available (2) (2) −0.100 V Enabled Available S-8205BBE-TCT1U 4.225 V 3.975 V 2.900 V 3.000 V 0.200 V 0.500 V *1. The delay time is set by the external capacitor. But the discharge overcurrent release delay time (tDIOVR) and charge overcurrent release delay time (tCIOVR) are calculated by discharge overcurrent detection delay time (tDIOV) and charge overcurrent detection delay time (tCIOV) as the following equations. 1 [ms] (typ.) is the internal delay time of the S-8205B Series. (1) tDIOVR = tDIOV × 10 + 1 [ms] (typ.), tCIOVR = tCIOV × 10 + 1 [ms] (typ.) (2) tDIOVR = tDIOV × 0.05 + 1 [ms] (typ.), tCIOVR = tCIOV × 0.05 + 1 [ms] (typ.) Moreover, refer to "7. Delay Time Setting" in " Operation" for calculational methods of delay times. Remark Please contact our sales representatives for products other than the above. 6 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series  Pin Configuration 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Figure 3 Table 4 Pin No. 1 VM Symbol 2 CO 3 4 5 6 7 8 DO VINI CTLC CTLD CCT CDT 9 CIT 10 VSS 11 VC5 12 VC4 13 VC3 14 VC2 15 VC1 16 VDD Description Pin for voltage detection between VSS pin and VM pin FET gate connection pin for charge control (Pch open-drain output) Pin for voltage detection between VSS pin and CO pin FET gate connection pin for discharge control FET (CMOS output) Pin for voltage detection between VSS pin and VINI pin Control pin for charge FET Control pin for discharge FET Capacitor connection pin for delay for overcharge detection voltage Capacitor connection pin for delay for overdischarge detection voltage Capacitor connection pin for delay for discharge overcurrent detection, charge overcurrent detection Input pin for negative power supply, Connection pin for battery 5's negative voltage Connection pin for battery 4's negative voltage, Connection pin for battery 5's positive voltage Connection pin for battery 3's negative voltage, Connection pin for battery 4's positive voltage Connection pin for battery 2's negative voltage, Connection pin for battery 3's positive voltage Connection pin for battery 1's negative voltage, Connection pin for battery 2's positive voltage Connection pin for battery 1's positive voltage Input pin for positive power supply, Connection pin for battery 1's positive voltage 7 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00  Absolute Maximum Ratings Table 5 (Ta = +25°C unless otherwise specified) Item Input voltage between VDD pin and VSS pin Symbol VDS Input pin voltage 1 Applied Pin VDD VC1, VC2, VC3, VC4, VC5, CTLC, CTLD, CCT, CDT, CIT VM, VINI DO CO − − − VIN1 Input pin voltage 2 VIN2 DO pin output voltage VDO CO pin input and output voltage VCO Power dissipation PD Operation ambient temperature Topr Storage temperature Tstg *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 Caution Absolute Maximum Rating Unit VSS − 0.3 to VSS + 28 V VSS − 0.3 to VDD + 0.3 V VDD − 28 to VDD + 0.3 VSS − 0.3 to VDD + 0.3 VDD − 28 to VDD + 0.3 1100*1 −40 to +85 −40 to +125 V V V mW °C °C The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation (PD) [mW] 1200 1000 800 600 400 200 0 0 50 100 150 Ambient Temperature (Ta) [°C] Figure 4 Power Dissipation of Package (When Mounted on Board) 8 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series  Electrical Characteristics Table 6 (1 / 2) (Ta = +25°C unless otherwise specified) Item Detection Voltage Overcharge detection voltage n (n = 1, 2, 3, 4, 5) Overcharge release voltage n (n = 1, 2, 3, 4, 5) Overdischarge detection voltage n (n = 1, 2, 3, 4, 5) Overdischarge release voltage n (n = 1, 2, 3, 4, 5) Discharge overcurrent detection voltage Load short circuit detection voltage Charge overcurrent detection voltage Temperature coefficient 1*2 Temperature coefficient 2*3 Delay Time Function*5 Symbol VCUn V1 = V2 = V3 = V4 = V5*1 = VCU − 0.050 V VCLn − VDLn − VDUn − VDIOV − VSHORT − VCIOV − TCOE1 TCOE2 CCT pin internal resistance RCCT CDT pin internal resistance RCDT CIT pin internal resistance RCIT CCT pin detection voltage VCCT CDT pin detection voltage VCDT CIT pin detection voltage VCIT Load short circuit detection delay time CTLC pin response time CTLD pin response time 0 V Battery Charge 0 V battery charge starting charger voltage 0 V battery charge inhibition battery voltage Internal Resistance CTLC pin internal resistance CTLD pin internal resistance Resistance between VM pin and VDD pin *6 Resistance between VM pin and VSS pin Condition Ta = 0°C to 50°C*4 Ta = 0°C to 50°C*4 V1 = 4.5 V, V2 = V3 = V4 = V5*1 = 3.5 V V1 = 1.5 V, V2 = V3 = V4 = V5*1 = 3.5 V − V1 = 4.5 V, V2 = V3 = V4 = V5*1 = 3.5 V V1 = 1.5 V, V2 = V3 = V4 = V5*1 = 3.5 V V6 = VDIOV + 0.015 V Min. VCU − 0.025 VCL − 0.050 VDL − 0.080 VDU − 0.100 VDIOV − 0.015 VSHORT − 0.100 VCIOV − 0.030 −1.0 −0.5 Typ. VCU VCL VDL VDU VDIOV VSHORT VCIOV 0 0 Max. Unit VCU V + 0.025 VCL V + 0.050 VDL V + 0.080 VDU V + 0.100 VDIOV V + 0.015 VSHORT V + 0.100 VCIOV V + 0.030 1.0 mV/°C 0.5 mV/°C Test Circuit 2 2 2 2 2 2 2 − − 6.15 8.31 10.2 MΩ 3 615 831 1020 kΩ 3 123 166 204 kΩ 3 VDS × 0.68 VDS × 0.68 VDS × 0.68 VDS × 0.70 VDS × 0.70 VDS × 0.70 VDS × 0.72 VDS × 0.72 VDS × 0.72 V 3 V 3 V 3 tSHORT − 100 300 600 μs 2 tCTLC tCTLD − − − − − − 2.5 2.5 ms ms 2 2 − 0.8 1.5 V 4 0.4 0.7 1.1 V 2 7 7 10 10 13 13 MΩ MΩ 5 5 450 900 1800 kΩ 5 250 500 750 kΩ 5 V0CHA 0 V battery charge enabled V1 = V2 = V3 = V4 = V5*1 = 0 V V0INH 0 V battery charge inhibited RCTLC RCTLD RVMD RVMS − − V1 = V2 = V3 = V4 = V5*1 = 1.8 V − 9 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 Table 6 (2 / 2) (Ta = +25°C unless otherwise specified) Item Symbol Input Voltage Operation voltage between VDD pin and VSS pin *7 CTLC pin change voltage*7 CTLD pin change voltage*7 Input Current Current consumption during operation Current consumption during power-down*6 VC1 pin current VC2 pin current VC3 pin current VC4 pin current IVC1 IVC2 IVC3 IVC4 VC5 pin current IVC5 Output Current CO pin source current ICOH VDSOP VCTLC VCTLD Condition Fixed output voltage of DO pin and CO pin − − − IOPE IPDN V1 = V2 = V3 = V4 = V5*1 = 1.5 V − − − − S-8205A Series S-8205B Series Min. Typ. Max. Unit Test Circuit 2 − 24 V − 2.1 2.1 3.0 3.0 4.0 4.0 V V 2 2 − 20 40 μA 1 − − 0.1 μA 1 0 −1.0 −1.0 −1.0 −3.0 −1.0 1.5 0 0 0 −1.5 0 3.0 1.0 1.0 1.0 0 1.0 μA μA μA μA μA μA 5 5 5 5 5 5 10 − − μA V13 = 0.5 V 5 S-8205A Series V1 = V2 = V3 = V4 = 6 V − − μA 0.1 5 CO pin leakage current ICOL S-8205B Series V1 = V2 = V3 = V4 = V5 = 4.8 V 10 − − μA DO pin source current IDOH V14 = 0.5 V 5 − − −10 μA DO pin sink current IDOL V15 = 0.5 V 5 *1. Because S-8205A Series are the protection ICs for 4-series cell, there is no V5 for them. *2. Voltage temperature coefficient 1: Overcharge detection voltage *3. Voltage temperature coefficient 2: Discharge overcurrent detection voltage *4. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. *5. Refer to " Operation" for details of delay time function. *6. For products with power-down function *7. The S-8205A/B Series does not operate detection if the operation voltage between VDD pin and VSS pin (VDSOP) is CTLC pin change voltage (VCTLC) or CTLD pin change voltage (VCTLD) or less. 10 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series  Test Circuit 1. Current Consumption during Operation and Power-down (Test Circuit 1) Set S1 and S2 to OFF. 1. 1 Current Consumption during Operation (IOPE) Set V1 = V2 = V3 = V4 = 3.5 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series), S2 to ON. ISS is the current consumption during operation (IOPE) at that time. 1. 2 Current Consumption during Power-down (IPDN) (With power-down function) Set V1 = V2 = V3 = V4 = 1.5 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 1.5 V (S-8205B Series), S1 to ON. ISS is the current consumption during power-down (IPDN) at that time. 2. Overcharge Detection Voltage, Overcharge Release Voltage, Overdischarge Detection Voltage, Overdischarge Release Voltage, Discharge Overcurrent Detection Voltage, Load Short Circuit Detection Voltage, Charge Overcurrent Detection Voltage, CTLC Pin Change Voltage, CTLD Pin Change Voltage, Load Short Circuit Detection Delay Time, CTLC Pin Response Time, CTLD Pin Response Time (Test Circuit 2) Set S3 to OFF. Confirm both VCO and VDO are in "H" (its voltage level is VDS × 0.9 V or more) after setting V1 = V2 = V3 = V4 = 3.5 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series), V6 = V7 = V8 = 0 V (this status is referred to as initial status 1). 2. 1 Overcharge Detection Voltage (VCU1), Overcharge Release Voltage (VCL1) The overcharge detection voltage (VCU1) is V1 when the VCO is set to "L" (its voltage level is VDS × 0.1 V or less) after increasing V1 gradually after setting V1 = V2 = V3 = V4 = VCU − 0.05 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = VCU − 0.05 V (S-8205B Series) from the initial status 1. After that, decreasing V1 gradually, V1 is the overcharge release voltage (VCL1) when the VCO is set to "H" after setting V2 = V3 = V4 = 3.5 V (S-8205A Series), V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series). 2. 2 Overdischarge Detection Voltage (VDL1), Overdischarge Release Voltage (VDU1) The overdischarge detection voltage (VDL1) is V1 when the VDO is set to "L" after decreasing V1 gradually from the initial status 1. After that, increasing V1 gradually, V1 is the overdischarge release voltage (VDU1) when VDO is set to "H". By changing Vn (n = 2 to 4: S-8205A Series, n = 2 to 5: S-8205B Series), users can define the overcharge detection voltage (VCUn), the overcharge release voltage (VCLn), the overdischarge detection voltage (VDLn), the overdischarge release voltage (VDUn) as well when n = 1. 2. 3 Discharge Overcurrent Detection Voltage (VDIOV) The discharge overcurrent detection voltage (VDIOV) is V6 when VDO is set to "L" after increasing V6 gradually from the initial status 1. 2. 4 Load Short Circuit Detection Voltage (VSHORT) The load short circuit detection voltage (VSHORT) is V6 when VDO is set to "L" after increasing V6 gradually after setting S3 to ON from the initial status 1. 2. 5 Charge Overcurrent Detection Voltage (VCIOV) The charge overcurrent detection voltage (VCIOV) is V6 when VCO is set to "L" after decreasing V6 gradually from the initial status 1. 2. 6 CTLC Pin Change Voltage (VCTLC) The CTLC pin change voltage (VCTLC) is V7 when VCO is set to "L" after increasing V7 gradually from the initial status 1. 2. 7 CTLD Pin Change Voltage (VCTLD) The CTLD pin change voltage (VCTLD) is V8 when VDO is set to "L" after increasing V8 gradually from the initial status 1. 11 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 2. 8 Load Short Circuit Detection Delay Time (tSHORT) Load short circuit detection delay time (tSHORT) is a period in which VDO changes to "L" after changing V6 to 1.5 V instantaneously, after setting S3 to ON from the initial status 1. 2. 9 CTLC Pin Response Time (tCTLC) CTLC pin response time (tCTLC) is a period in which VCO changes to "L" after changing V7 = VDS instantaneously from the initial status 1. 2. 10 CTLD Pin Response Time (tCTLD) CTLD pin response time (tCTLD) is a period in which VDO changes to "L" after changing V8 = VDS instantaneously from the initial status 1. 3. CCT Pin Internal Resistance, CDT Pin Internal Resistance, CIT Pin Internal Resistance, CCT Pin Detection Voltage, CDT Pin Detection Voltage, CIT Pin Detection Voltage (Test Circuit 3) Confirm both VCO and VDO are in "H" after setting V1 = V2 = V3 = V4 = 3.5 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series), V6 = V9 = V10 = V11 = 0 V (this status is referred to as initial status 2). 3. 1 CCT Pin Internal Resistance (RCCT) The CCT pin internal resistance (RCCT) can be defined by RCCT = VDS / ICCT by using ICCT when setting V1 = 4.5 V from the initial status 2. 3. 2 CDT Pin Internal Resistance (RCDT) The CDT pin internal resistance (RCDT) can be defined by RCDT = VDS / ICDT by using ICDT when setting V1 = 1.5 V from the initial status 2. 3. 3 CIT Pin Internal Resistance (RCIT) The CIT pin internal resistance (RCIT) can be defined by RCIT = VDS / ICIT by using ICIT when setting V6 = VDIOV + 0.015 V from the initial status 2. 3. 4 CCT Pin Detection Voltage (VCCT) The CCT pin detection voltage (VCCT) is V9 when VCO is set to "L" after increasing V9 gradually, after setting V1 = 4.5 V from the initial status 2. 3. 5 CDT Pin Detection Voltage (VCDT) The CDT pin detection voltage (VCDT) is V10 when VDO is set to "L" after increasing V10 gradually, after setting V1 = 1.5 V from the initial status 2. 3. 6 CIT Pin Detection Voltage (VCIT) The CIT pin detection voltage (VCIT) is V11 when VDO is set to "L" after increasing V11 gradually, after setting V6 = VDIOV + 0.015 V from the initial status 2. 12 Rev.2.0_00 4. BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series 0 V Battery Charge Starting Charger Voltage (0 V Battery Charge Enabled) (Test Circuit 4), 0 V Battery Charge Inhibition Battery Voltage (0 V Battery Charge Inhibited) (Test Circuit 2) 4. 1 0 V Battery Charge Starting Charger Voltage (V0CHA) (0 V Battery Charge Enabled) The 0 V battery charge starting charger voltage (V0CHA) is V12 when VCO is 0.1 V or more after increasing V12 gradually after setting V1 = V2 = V3 = V4 = 0 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 0 V (S-8205B Series). 4. 2 0 V Battery Charge Inhibition Battery Voltage (V0INH) (0 V Battery Charge Inhibited) The 0 V battery charge inhibition battery voltage (V0INH) is V1 when VCO is set to "L" after decreasing V1 gradually from the initial status 1. 5. CTLC Pin Internal Resistance, CTLD Pin Internal Resistance, Resistance between VM Pin and VDD Pin, Resistance between VM Pin and VSS Pin, VC1 Pin Current, VC2 Pin Current, VC3 Pin Current, VC4 Pin Current, VC5 Pin Current, CO Pin Source Current, CO Pin Leakage Current, DO Pin Source Current, DO Pin Sink Current (Test Circuit 5) Set S1, S5, S6 and S7 to OFF, set S2 and S4 to ON. Set V1 = V2 = V3 = V4 = 3.5 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 3.5 V (S-8205B Series), V6 = V13 = V14 = V15 = V16 = 0 V (this status is referred to as initial status 3). 5. 1 CTLC Pin Internal Resistance (RCTLC) In the initial status 3, the value of CTLC pin internal resistance (RCTLC) can be defined by RCTLC = VDS / ICTLC by using ICTLC. 5. 2 CTLD Pin Internal Resistance (RCTLD) In the initial status 3, the value of CTLD pin internal resistance (RCTLD) can be defined by RCTLD = VDS / ICTLD by using ICTLD. 5. 3 Resistance between VM Pin and VDD Pin (RVMD) (With power-down function) The value of resistance between VM pin and VDD pin (RVMD) can be defined by RVMD = VDS / IVM by using IVM when setting V1 = V2 = V3 = V4 = 1.8 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 1.8 V (S-8205B Series) from the initial status 3. 5. 4 Resistance between VM Pin and VSS Pin (RVMS) The value of resistance between VM pin and VSS pin (RVMS) can be defined by RVMS = VDS / IVM by using IVM when setting V6 = 1.5 V, S2 to OFF, S1 to ON from the initial status 3. 5. 5 VC1 Pin Current (IVC1), VC2 Pin Current (IVC2), VC3 Pin Current (IVC3), VC4 Pin Current (IVC4), VC5 Pin Current (IVC5) In the initial status 3, I1 is the VC1 pin current (IVC1), I2 is the VC2 pin current (IVC2), I3 is the VC3 pin current (IVC3), I4 is the VC4 pin current (IVC4), I5 is the VC5 pin current (IVC5). 5. 6 CO Pin Source Current (ICOH), CO Pin Leakage Current (ICOL) The CO pin source current (ICOH) is ICO when setting V13 = 0.5 V from the initial status 3. After that, the CO pin leakage current (ICOL) is ICO when setting V1 = V2 = V3 = V4 = 6 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 4.8 V (S-8205B Series), S4 to OFF, S5 to ON. 5. 7 DO Pin Source Current (IDOH), DO Pin Sink Current (IDOL) The DO pin source current (IDOH) is IDO when setting V14 = 0.5 V, S6 to ON from the initial status 3. After that, the DO pin sink current (IDOL) is IDO when setting V1 = V2 = V3 = V4 = 1.8 V (S-8205A Series), V1 = V2 = V3 = V4 = V5 = 1.8 V (S-8205B Series), S6 to OFF, S7 to ON, V15 = 0.5 V. 13 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series S-8205A S1 1 2 3 4 5 6 7 8 S2 VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT S-8205B S1 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 S2 V1 V2 V3 V4 Rev.2.0_00 A ISS VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT 16 15 14 13 12 11 10 9 A V1 V2 V3 V4 V5 ISS C1 = 0.1 μF C1 = 0.1 μF Figure 5 Test Circuit 1 S-8205A 1 2 3 4 5 6 7 8 R1 = 1 MΩ VCO V VDO V V6 V7 VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT S-8205B 16 15 14 13 12 V1 V2 V3 V4 11 10 9 V8 1 2 3 4 5 6 7 8 R1 = 1 MΩ VCO V VDO V V6 V7 VDD VC1 VC2 VC3 VC4 VC5 VSS CIT 16 15 14 13 12 V1 V2 V3 V4 V5 11 10 9 V8 C1 = 0.1 μF S3 VM CO DO VINI CTLC CTLD CCT CDT C1 = 0.1 μF S3 Figure 6 Test Circuit 2 S-8205A VCO R1 = 1 MΩ V V VDO A V6 ICCT A V9 1 2 3 4 5 6 7 8 ICDT V10 VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT S-8205B 16 15 14 13 12 V1 V2 V3 V4 11 10 9 VCO R1 = 1 MΩ V V VDO ICIT V6 A V11 A C1 = 0.1 μF A V9 Figure 7 Test Circuit 3 14 ICCT 1 2 3 4 5 6 7 8 ICDT V10 VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT 16 15 14 13 12 V1 V2 V3 V4 V5 11 10 9 ICIT A V11 C1 = 0.1 μF BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 S-8205A V12 VCO V R1 = 1 MΩ 1 2 3 4 5 6 7 8 VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT S-8205B V12 16 15 14 13 12 VCO V1 V2 V3 V4 11 10 9 V R1 = 1 MΩ 1 2 3 4 5 6 7 8 VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT 16 15 14 13 12 V1 V2 V3 V4 V5 11 10 9 C1 = 0.1 μF C1 = 0.1 μF Figure 8 Test Circuit 4 S1 S4 S6 V13 V14 IVM A ICO A IDO A V15 ICTLC A V6 S2 A S5 ICTLD S7 S1 S-8205A 1 2 3 4 5 6 7 8 VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT 16 15 14 13 12 11 10 9 I1 I2 I3 I4 I5 A A A A A C1 = 0.1 μF V1 V2 V3 V4 S4 S6 V13 V14 IVM A ICO A IDO A V15 ICTLC A V6 S2 A S5 ICTLD S7 S-8205B 1 2 3 4 5 6 7 8 VM CO DO VINI CTLC CTLD CCT CDT VDD VC1 VC2 VC3 VC4 VC5 VSS CIT 16 15 14 13 12 11 10 9 I1 I2 I3 I4 I5 A A A A A V1 V2 V3 V4 V5 C1 = 0.1 μF Figure 9 Test Circuit 5 15 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00  Operation Remark Refer to " Connection Examples of Battery Protection IC". 1. Normal Status In the S-8205A/B Series, both of CO pin and DO pin get the VDD level when the voltage of each of the batteries is in the range of overdischarge detection voltage (VDLn) to overcharge detection voltage (VCUn), and due to the discharge current, the VINI pin's voltage is in the range of charge overcurrent detection voltage (VCIOV) to discharge overcurrent detection voltage (VDIOV). This is the normal status. At this time, the charge and discharge FETs are on. 2. Overcharge Status In the S-8205A/B Series, the voltage of one of the batteries increases to the level of more than VCUn, the CO pin is set in high impedance. This is the overcharge status. The CO pin is pulled down to EB− by an external resistor so that the charge FET is turned off and it stops charging. The overcharge status is released if either condition mentioned below is satisfied; (1) In case that the CO pin voltage is 1 / 50 × VDS or less, and the voltage of each of the batteries which are VCUn or more is in the level of overcharge release voltage (VCLn) or less. (2) In case that the CO pin voltage is 1 / 50 × VDS or more, and the voltage of each of the batteries is in the level of VCUn or less. 3. Overdischarge Status In the S-8205A/B Series, when the voltage of one of the batteries decreases to the level of VDLn or less, the DO pin voltage gets the VSS level. This is the overdischarge status. The discharge FET is turned off and it stops discharging. The overdischarge status is released if either condition mentioned below is satisfied; (1) In case that the VM pin voltage is in the level of less than VSS, and the voltage of each of the batteries is in the level of VDLn or more. (2) In case that the VM pin voltage is VDS / 5 (typ.) or less and the VM pin voltage is in the level of more than VSS, and the voltage of each of the batteries which are VDLn or less is in the level of overdischarge release voltage (VDUn) or more. 3. 1 With power-down function In the S-8205A/B Series, when it reaches the overdischarge status, the VM pin is pulled up to the VDD level by a resistor between VM pin and VDD pin (RVMD). If the VM pin voltage and the CO pin voltage increase to the level of VDS / 5 (typ.) or more, respectively, the power-down function starts to operate and almost every circuit in the S-8205A/B Series stops working. The power-down function is released if either condition mentioned below is satisfied; (1) The VM pin voltage gets VDS / 5 (typ.) or less. (2) The CO pin voltage gets VDS / 5 (typ.) or less. 4. Discharge Overcurrent Status The discharging current increases to a certain value or more. As a result, if the status in which the VINI pin voltage increases to the level of VDIOV or more, the DO pin gets the VSS level. This is the discharge overcurrent status. The discharge control FET is turned off and it stops discharging. In the status of discharge overcurrent, the CO pin is set in high impedance. The VM pin is pulled down to the VSS level by a resistor between VM pin and VSS pin (RVMS). S-8205A/B Series has two levels for discharge overcurrent detection (VDIOV, VSHORT). The S-8205A/B Series' actions against load short circuit detection voltage (VSHORT) are as well in VDIOV. The discharge overcurrent status is released if the following condition is satisfied. (1) The VM pin voltage gets VDS / 10 (typ.) or less. 16 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series 5. Charge Overcurrent Status In the S-8205A/B Series, the charge current increases to a certain value or more. As a result, if the status in which the VINI pin voltage decreases to the level of VCIOV or less, the CO pin is set in high impedance. This is the charge overcurrent status. The charge control FET is turned off and it stops charging. In this charge overcurrent status, DO pin gets the VSS level. The VM pin is pulled up to the VDD level by resistance between VM pin and VDD pin (RVMD). The charge overcurrent status is released if the following condition is satisfied. (1) The CO pin voltage gets 1 / 50 × VDS (typ.) or more. 6. 0 V Battery Charge In the S-8205A/B Series, regarding how to charge a discharged battery (0 V battery), users are able to select either function mentioned below. (1) Enable to charge a 0 V battery A 0 V battery is charged when charger voltage is more than 0 V battery charge starting charger voltage (V0CHA). (2) Inhibit charging a 0 V battery A 0 V battery is not charged when the voltage of one of the batteries is 0 V battery charge inhibition battery voltage (V0INH) or less. Caution When the VDD pin voltage is less than the minimum value of operation voltage between VDD pin and VSS pin (VDSOP), the S-8205A/B Series' action is not assured. 7. Delay Time Setting In the S-8205A/B Series, users are able to set delay time for the period; from detecting the voltage of one of the batteries or detecting changes in the voltage at the VINI pin, to the output to the CO pin, DO pin. Each delay time is determined by a resistor in the IC and an external capacitor. In the overchage detection, when the voltage of one of the batteries gets VCUn or more, the S-8205A/B Series starts charging to the CCT pin's capacitor (CCCT) via the CCT pin's internal resistor (RCCT). After a certain period, the CO pin is set in high impedance if the voltage at the CCT pin reaches the CCT pin detection voltage (VCCT). This period is overcharge detection delay time (tCU). tCU is calculated using the following equation (VDS = V1 + V2 + V3 + V4 + V5). tCU [s] = −ln ( 1 − VCCT / VDS ) × CCCT [μF] × RCCT [MΩ] = −ln ( 1 − 0.7 (typ.)) × CCCT [μF] × 8.31 [MΩ] (typ.) = 10.0 [MΩ] (typ.) × CCCT [μF] Overdischarge detection delay time (tDL), discharge overcurrent detection delay time (tDIOV), charge overcurrent detection delay time (tCIOV) are calculated using the following equations as well. tDL [ms] = −ln ( 1 − VCDT / VDS) × CCDT [μF] × RCDT [kΩ] tDIOV [ms] = −ln ( 1 − VCIT / VDS) × CCIT [μF] × RCIT [kΩ] tCIOV [ms] = −ln ( 1 − VCIT / VDS) × CCIT [μF] × RCIT [kΩ] In case CCCT = CCDT = CCIT = 0.1 [μF], each delay time tCU, tDL, tDIOV, tCIOV is calculated as follows. tCU [s] = 10.0 [MΩ] (typ.) × 0.1 [μF] = 1.0 [s] (typ.) tDL [ms] = 1000 [kΩ] (typ.) × 0.1 [μF] = 100 [ms] (typ.) tDIOV [ms] = 200 [kΩ] (typ.) × 0.1 [μF] = 20 [ms] (typ.) tCIOV [ms] = 200 [kΩ] (typ.) × 0.1 [μF] = 20 [ms] (typ.) Discharge overcurrent release delay time (tDIOVR) and charge overcurrent release delay time (tCIOVR) can be selected from two types, and they are calculated by tDIOV and tCIOV as the following equations. 1 [ms] (typ.) is the internal delay time of the S-8205A/B Series. (1) tDIOVR = tDIOV × 10 + 1 [ms] (typ.), tCIOVR = tCIOV × 10 + 1 [ms] (typ.) (2) tDIOVR = tDIOV × 0.05 + 1 [ms] (typ.), tCIOVR = tCIOV × 0.05 + 1 [ms] (typ.) Load short circuit detection delay time (tSHORT) is fixed internally. 17 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 8. CTLC Pin and CTLD Pin The S-8205A/B Series has two pins to control. The CTLC pin controls the CO pin, the CTLD pin controls the DO pin. Thus it is possible for users to control the CO pin and DO pin independently. These controls precede the battery protection circuit. Table 7 Conditions Set by CTLC Pin CTLC Pin CTLC pin voltage ≥ VCTLC Open*1 CTLC pin voltage < VCTLC CO Pin High-Z High-Z Normal status*2 *1. Pulled up by RCTLC when CTLC pin is open. *2. The status is controlled by the voltage detection circuit. Table 8 Conditions Set by CTLD Pin CTLD Pin CTLD pin voltage ≥ VCTLD Open*1 CTLD pin voltage < VCTLD DO Pin VSS level VSS level Normal status*2 *1. Pulled up by RCTLD when CTLD pin is open. *2. The status is controlled by the voltage detection circuit. 18 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00  Timing Chart 1. Overcharge Detection and Overdischarge Detection VCUn VCLn Battery voltage VDUn VDLn (n= 1 to 5) VDD DO pin voltage VSS VDD CO pin voltage High-Z VEB- VDD VM pin voltage 1 / 5 × VDD VSS VEBCharger connection Load connection *1 Status (With power-down function) Overcharge detection delay time (tCU) Overdischarge detection delay time (tDL) *1 Status (Without power-down function) *1. : Normal status : Overcharge status : Overdischarge status : Power-down status Remark The charger is assumed to charge with a constant current. VEB- indicates the open voltage of the charger. Figure 10 19 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 2. Discharge Overcurrent Detection VHC VCUn VCLn Battery voltage VDUn VDLn VHD (n = 1 to 5) VDD DO pin voltage VSS VDD High-Z CO pin voltage High-Z VEBVDD VM pin voltage VSS VDD VSHORT VINI pin voltage VDIOV VSS Load connection Status *1 Discharge overcurrent detection delay time (tDIOV) Load short circuit detection delay time (tSHORT) *1. : Normal status : Discharge overcurrent status Remark The charger is assumed to charge with a constant current. VEB- indicates the open voltage of the charger. Figure 11 20 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series 3. Charge Overcurrent Detection VHC VCUn VCLn Battery voltage VHD VDUn VDLn (n= 1 to 5) VDD DO pin voltage VSS VDD High-Z CO pin voltage High-Z VEBVDD VM pin voltage VSS VEBVDD VINI pin voltage VDIOV VSS VCIOV Charger connection Load connection Charge overcurrent detection delay time (tCIOV) Charge overcurrent detection delay time (tCIOV) *1 Status (With power-down function) *1 Status (Without power-down function) *1. : Normal status : Charge overcurrent status : Overdischarge status : Power-down status Remark The charger is assumed to charge with a constant current. VEB- indicates the open voltage of the charger. Figure 12 21 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00  Connection Examples of Battery Protection IC 1. S-8205A Series (4-Series Cell) EB+ RVM RDO 1 VM VDD 16 2 CO VC1 15 3 DO VC2 14 4 VINI VC3 13 RVDD CVDD CVC1 RCTLC RCTLD CCCT 6 CTLD VC5 11 7 CCT VSS 10 8 CDT CIT 9 CCDT RVC2 RVC3 CVC2 S-8205A 5 CTLC VC4 12 RVINI RVC1 RVC4 CVC3 RVC5 CVC4 CCIT RCO EB− RSENSE Charging FET Discharging FET Figure 13 2. S-8205B Series (5-Series Cell) EB+ RVM RDO 1 VM VDD 16 2 CO VC1 15 3 DO VC2 14 4 VINI VC3 13 RCTLC RCTLD CCCT 6 CTLD VC5 11 7 CCT VSS 10 8 CDT CIT 9 CCDT RCO RSENSE Charging FET Discharging FET Figure 14 22 CVDD CVC1 CVC2 S-8205B 5 CTLC VC4 12 RVINI EB− RVDD CVC3 CVC4 CVC5 CCIT RVC1 RVC2 RVC3 RVC4 RVC5 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series  Application Circuit EB+ RVM RDO RVINI PTCCTLC 1 VM VDD 16 2 CO VC1 15 3 DO VC2 14 4 VINI VC3 13 RVDD CVDD CVC1 CVC2 S-8205B 5 CTLC VC4 12 PTCCTLD CCCT 6 CTLD VC5 11 7 CCT VSS 10 8 CDT CIT 9 CCDT CVC3 CVC4 RVC1 RVC2 RVC3 RVC4 RVC5 CVC5 CCIT RCO EB− RSENSE Charging FET Discharging FET Figure 15 Overheat Protection via PTC [For PTC, contact] Murata Manufacturing Co., Ltd. Thermistor Products Department Nagaokakyo-shi, Kyoto 617-8555 Japan TEL +81-75-955-6863 Contact Us: http://www.murata.com/contact/index.html 23 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 Table 9 Constants for External Components Symbol Min. Typ. Max. Unit kΩ RVC1*1 0.47 1 1 kΩ RVC2*1 0.47 1 1 kΩ RVC3*1 0.47 1 1 kΩ RVC4*1 0.47 1 1 *1 kΩ RVC5 0.47 1 1 kΩ RDO 1 5.1 10 MΩ RCO 0.1 1 1 kΩ RVM 3 5.1 10 kΩ RCTLC 0.1 1 1 kΩ RCTLD 0.1 1 1 kΩ RVINI 0.1 1 1 − − mΩ RSENSE 0 Ω RVDD*1 43 100 100 μF CVC1*1 0.068 0.1 1 μF CVC2*1 0.068 0.1 1 μF CVC3*1 0.068 0.1 1 μF CVC4*1 0.068 0.1 1 μF CVC5*1 0.068 0.1 1 − μF CCCT 0.01 0.1 − μF CCDT 0.01 0.1 − μF CCIT 0.02 0.1 μF CVDD*1 0 1 10 *1. Set up a filter constant to be RVDD × CVDD = 68 μF•Ω or more, and to be RVC1 × CVC1 = RVC2 × CVC2 = RVC3 × CVC3 = RVC4 × CVC4 = RVC5 × CVC5 = RVDD × CVDD. Caution 1. The constants may be changed without notice. 2. It is recommended that filter constants between VDD pin and VSS pin should be set approximately to 100 μF•Ω. e.g., CVDD × RVDD = 1.0 μF × 100 Ω = 100 μF•Ω Sufficient evaluation of transient power supply fluctuation and overcurrent protection function with the actual application is needed to determine the proper constants. Contact our sales representatives in case the constants should be set to other than 100 μF•Ω. 3. It has not been confirmed whether the operation is normal or not in circuits other than the connection examples. In addition, the connection examples and the constants do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constants. 24 Rev.2.0_00 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series  Precautions • • • • • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. Batteries can be connected in any order, however, there may be cases when discharging cannot be performed when a battery is connected. In this case, short the VM pin and VSS pin or connect the battery charger to return to the normal mode. If both an overcharge battery and an overdischarge battery are included among the whole batteries, the condition is set in overcharge status and overdischarge status. Therefore either charging or discharging is impossible. Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 25 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00  Characteristics (Typical Data) 1. Current Consumption 40 35 30 25 20 15 10 5 0 1. 2 IOPE vs Ta IOPE [μA] IOPE [μA] 1. 1 IOPE vs VDS 5 0 10 15 20 VDS [V] 25 30 26 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0.00 0 −40 −25 0 25 Ta [°C] 50 75 85 1. 4 IPDN vs Ta IPDN [μA] IPDN [μA] 1. 3 IPDN vs VDS 40 35 30 25 20 15 10 5 0 5 10 15 20 VDS [V] 25 30 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0.00 −40 −25 0 25 Ta [°C] 50 75 85 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 2. Overcharge Detection / Release Voltage, Overdischarge Detection / Release Voltage, Discharge Overcurrent Detection Voltage, Load Short Circuit Detection Voltage, Charge Overcurrent Detection Voltage 4.250 4.245 4.240 4.235 4.230 4.225 4.220 4.215 4.210 4.205 4.200 2. 2 VCL vs Ta VCL [V] VCU [V] 2. 1 VCU vs Ta −40 −25 0 25 Ta [°C] 50 75 85 2.380 2.360 2.340 2.320 2.300 2.280 2.260 2.240 2.220 −40 −25 0 25 Ta [°C] 50 75 85 2. 5 VDIOV vs Ta 0.160 0.155 VSHORT [V] VDIOV [V] 0 25 Ta [°C] 50 75 85 3.100 3.080 3.060 3.040 3.020 3.000 2.980 2.960 2.940 2.920 2.900 −40 −25 0 25 Ta [°C] 50 75 85 2. 6 VSHORT vs Ta 0.165 0.150 0.145 0.140 0.135 −40 −25 −40 −25 2. 4 VDU vs Ta VDU [V] VDL [V] 2. 3 VDL vs Ta 4.175 4.165 4.155 4.145 4.135 4.125 4.115 4.105 4.095 4.085 4.075 0 25 Ta [°C] 50 75 85 0 25 Ta [°C] 50 75 85 0.600 0.580 0.560 0.540 0.520 0.500 0.480 0.460 0.440 0.420 0.400 −40 −25 0 25 Ta [°C] 50 75 85 2. 7 VCIOV vs Ta −0.070 VCIOV [V] −0.080 −0.090 −0.100 −0.110 −0.120 −0.130 −40 −25 27 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 3. CCT Pin Internal Resistance / Detection Voltage, CDT Pin Internal Resistance / Detection Voltage, CIT Pin Internal Resistance / Detection Voltage and Short Circuit Detection Voltage Delay Time 3. 1 RCCT vs Ta 3. 2 VCCT vs Ta (VDS = 18.5 V) 12.0 10.0 VCCT [V] RCCT [M] 11.0 9.0 8.0 7.0 6.0 −40 −25 0 25 Ta [°C] 50 −40 −25 75 85 3. 3 RCDT vs Ta 1000 VCDT [V] RCDT [k] 1100 900 800 700 600 0 25 Ta [°C] 50 −40 −25 200 VCIT [V] RCIT [k] 220 180 160 140 120 0 25 Ta [°C] 50 75 85 0 25 Ta [°C] 50 75 85 3. 7 tSHORT vs Ta 600.0 tSHORT [μs] 500.0 400.0 300.0 200.0 100.0 28 50 75 85 0 25 Ta [°C] 50 75 85 25 Ta [°C] 50 75 85 3. 6 VCIT vs Ta (VDS = 17.5 V) 240 −40 −25 25 Ta [°C] 11.2 11.1 11.0 10.9 10.8 10.7 10.6 10.5 75 85 3. 5 RCIT vs Ta −40 −25 0 3. 4 VCDT vs Ta (VDS = 15.5 V) 1200 −40 −25 13.3 13.2 13.1 13.0 12.9 12.8 12.7 12.6 12.6 12.5 12.4 12.3 12.2 12.1 12.0 11.9 −40 −25 0 BATTERY PROTECTION IC FOR 4-SERIES OR 5-SERIES CELL PACK S-8205A/B Series Rev.2.0_00 4. CO Pin Source / Leakage Current, DO Pin Source / Sink Current 14 12 10 8 6 4 2 0 4. 2 ICOL vs VCO 0.10 0.08 ICOL [μA] ICOH [mA] 4. 1 ICOH vs VCO 5 0 10 VCO [V] 15 0 20 0 0 5 10 15 20 VCO [V] 25 30 4. 4 IDOL vs VDO IDOL [mA] IDOH [mA] 0.04 0.02 4. 3 IDOH vs VDO 14 12 10 8 6 4 2 0 0.06 5 10 VDO [V] 15 20 0 −1 −2 −3 −4 −5 −6 −7 0 2 4 6 VDO [V] 8 10 29 5.1±0.2 0.65 16 9 1 8 0.17±0.05 0.22±0.08 No. FT016-A-P-SD-1.2 TITLE TSSOP16-A-PKG Dimensions FT016-A-P-SD-1.2 No. ANGLE UNIT mm ABLIC Inc. +0.1 4.0±0.1 ø1.5 -0 0.3±0.05 2.0±0.1 8.0±0.1 1.5±0.1 ø1.6±0.1 (7.2) 4.2±0.2 +0.4 6.5 -0.2 1 16 8 9 Feed direction No. FT016-A-C-SD-1.1 TITLE TSSOP16-A-Carrier Tape No. FT016-A-C-SD-1.1 ANGLE UNIT mm ABLIC Inc. 21.4±1.0 17.4±1.0 +2.0 17.4 -1.5 Enlarged drawing in the central part ø21±0.8 2±0.5 ø13±0.2 No. FT016-A-R-S1-1.0 TITLE TSSOP16-A- Reel No. FT016-A-R-S1-1.0 ANGLE QTY. UNIT mm ABLIC Inc. 4,000 Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com