S-8225AAE-TCT1U

S-8225A Series www.ablic.com BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK © ABLIC Inc., 2012-2020 Rev.2.1_00 The S-8225A Series includes high-accuracy voltage detection circuits and delay circuits, and can monitor the status of 3-serial to 5-serial cell lithium-ion rechargeable battery in single use. By switching the voltage level which is applied to the SEL1 pin and SEL2 pin, users are able to use the S-8225A Series for 3-serial to 5-serial cell pack. By cascade connection using the S-8225A Series, it is also possible to protect 6-serial or more cells lithium-ion rechargeable battery pack.  Features • High-accuracy voltage detection function for each cell Overcharge detection voltage n (n = 1 to 5) • • • • • • • • • • 3.500 V to 4.400 V (50 mV step) Accuracy ±20 mV (Ta = +25°C), ±30 mV (Ta = 0°C to +60°C) Overcharge release voltage n (n = 1 to 5) 3.300 V to 4.400 V*1 Accuracy ±50 mV Overdischarge detection voltage n (n = 1 to 5) 2.000 V to 3.200 V (100 mV step) Accuracy ±80 mV Overdischarge release voltage n (n = 1 to 5) 2.100 V to 3.400 V*2 Accuracy ±100 mV Overcharge detection delay time and overdischarge detection delay time can be set by external capacitor. Switchable between 3-serial to 5-serial cell by using the SEL1 pin and the SEL2 pin Cascade connection is available. The CO pin and the DO pin are controlled by the CTLC pin and the CTLD pin, respectively. Output voltage of the CO pin and the DO pin is limited to 12 V max. High-withstand voltage Absolute maximum rating: 28 V Wide operation voltage range 4 V to 26 V Wide operation temperature range Ta = −40°C to +85°C Low current consumption During operation (V1 = V2 = V3 = V4 = V5 = 3.4 V) 22 μA max. (Ta = +25°C) During power-down (V1 = V2 = V3 = V4 = V5 = 1.6 V) 4.5 μA max. (Ta = +25°C) Lead-free (Sn 100%), halogen-free *1. Overcharge hysteresis voltage n (n = 1 to 5) is selectable in 0 V, or in 0.1 V to 0.4 V in 50 mV step. (Overcharge hysteresis voltage = Overcharge detection voltage − Overcharge release voltage) *2. Overdischarge hysteresis voltage n (n = 1 to 5) is selectable in 0 V to 0.7 V in 100 mV step. (Overdischarge hysteresis voltage = Overdischarge release voltage − Overdischarge detection voltage)  Application • Lithium-ion rechargeable battery pack  Package • 16-Pin TSSOP 1 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00  Block Diagram VDD CTLD Control circuit CTLC Delay circuit Delay circuit CO pin output voltage limit circuit CO DO pin output voltage limit circuit Overcharge 1 − + Overdischarge 1+ − VC1 Overcharge 2 − + Overdischarge 2 + − VC2 Overcharge 3 − + Overdischarge 3 + − DO Overcharge 4 Overdischarge 4 VC3 VC4 − + SEL1 + − SEL2 Overcharge 5 − + Overdischarge 5 + − VC5 VC6 CDT CCT VSS Remark Diodes in the figure are parasitic diodes. Figure 1 2 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00  Product Name Structure 1. Product name S-8225A xx - TCT1 U Environmental code U: Lead-free (Sn 100%), halogen-free Package abbreviation and IC packing specifications*1 TCT1: 16-Pin TSSOP, Tape *2 Serial code Sequentially set from AA to ZZ *1. Refer to the tape drawing. *2. Refer to "3. Product name list". 2. Package Table 1 Package Drawing Codes Package Name 16-Pin TSSOP Dimension FT016-A-P-SD Tape FT016-A-C-SD Reel FT016-A-R-S1 3. Product name list Table 2 Overcharge Overdischarge Overdischarge Overcharge Detection Voltage Release Voltage Detection Voltage Release Voltage [VCL] [VDL] [VDU] [VCU] S-8225AAA-TCT1U 4.225 V 4.125 V 2.300 V 2.500 V S-8225AAB-TCT1U 4.400 V 4.300 V 2.300 V 2.500 V S-8225AAC-TCT1U 4.250 V 4.150 V 2.500 V 3.000 V S-8225AAD-TCT1U 4.350 V 4.350 V 2.500 V 2.700 V S-8225AAE-TCT1U 4.225 V 4.125 V 2.300 V 3.000 V S-8225AAF-TCT1U 4.215 V 4.155 V 2.800 V 3.000 V S-8225AAG-TCT1U 4.250 V 4.250 V 2.500 V 2.700 V S-8225AAH-TCT1U 4.150 V 4.000 V 2.500V 3.000 V S-8225AAI-TCT1U 4.200 V 4.150 V 2.500V 2.550 V S-8225AAJ-TCT1U 3.900 V 3.500 V 2.000 V 2.700 V S-8225AAK-TCT1U 4.275 V 4.175 V 2.600 V 2.800 V S-8225AAM-TCT1U 4.220 V 4.120 V 2.500 V 3.000 V S-8225AAN-TCT1U 4.300 V 4.200 V 2.300 V 2.800 V Remark Please contact our sales representatives for products other than the above. Product Name 0 V Battery Detection Function Available Available Unavailable Unavailable Unavailable Available Unavailable Available Available Available Available Available Unavailable 3 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00  Pin Configuration 1. 16-Pin TSSOP Top view 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Figure 2 Table 3 Pin No. 1 2 3 4 5 6 7 8 Symbol CTLD CTLC CO DO SEL1 SEL2 CDT CCT Description DO control pin CO control pin Output pin for overcharge detection Output pin for overdischarge detection Switching pins for 3-serial to 5-serial cell*1 Capacitor connection pin for delay for overdischarge detection voltage Capacitor connection pin for delay for overcharge detection voltage Input pin for negative power supply, 9 VSS connection pin for negative voltage of battery 5 10 VC6 Connection pin for negative voltage of battery 5 Connection pin for negative voltage of battery 4, 11 VC5 connection pin for positive voltage of battery 5 Connection pin for negative voltage of battery 3, 12 VC4 connection pin for positive voltage of battery 4 Connection pin for negative voltage of battery 2, 13 VC3 connection pin for positive voltage of battery 3 Connection pin for negative voltage of battery 1, 14 VC2 connection pin for positive voltage of battery 2 15 VC1 Connection pin for positive voltage of battery 1 Input pin for positive power supply, 16 VDD connection pin for positive voltage of battery 1 *1. Refer to "7. SEL pin" in " Operation" for setting of the SEL1 pin and the SEL2 pin. 4 Rev.2.1_00 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series  Absolute Maximum Ratings Table 4 Item Symbol Input voltage between VDD pin and VSS pin VDS Input pin voltage VIN (Ta = +25°C unless otherwise specified) Absolute Maximum Rating Unit Applied Pin VDD VC1, VC2, VC3, VC4, VC5, VC6, SEL1, SEL2, CTLC, CTLD, CCT, CDT DO, CO − − − Output pin voltage VOUT Power dissipation PD Operation ambient temperature Topr Storage temperature Tstg *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 V VSS − 0.3 to VDD + 0.3 V VSS − 0.3 to VDD + 0.3 1100*1 −40 to +85 −40 to +125 V mW °C °C The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 1200 Power dissipation (PD) [mW] Caution VSS − 0.3 to VSS + 28 1000 800 600 400 200 0 0 50 100 150 Ambient temperature (Ta) [°C] Figure 3 Power Dissipation of Package (When Mounted on Board) 5 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00  Electrical Characteristics Table 5 (1 / 2) Item (Ta = +25°C, VDS = VDD − VSS = V1 + V2 + V3 + V4 + V5 unless otherwise specified) Test Symbol Condition Min. Typ. Max. Unit Circuit Detection Voltage Overcharge detection voltage n (n = 1, 2, 3, 4, 5) Overcharge release voltage n (n = 1, 2, 3, 4, 5) Overdischarge detection voltage n (n = 1, 2, 3, 4, 5) Overdischarge release voltage n (n = 1, 2, 3, 4, 5) 0 V battery detection voltage n (n = 1, 2, 3, 4, 5) Delay Time Function*2 Overcharge detection delay time Overdischarge detection delay time VCUn Ta = +25°C V1 = V2 = V3 = V4 = V5 = VCU − 0.05 V Ta = 0°C to +60°C*1 V1 = V2 = V3 = V4 = V5 = VCU − 0.05 V VCLn − VDLn − VDUn − VCUn − 0.020 VCUn − 0.030 VCLn − 0.050 VDLn − 0.080 VDUn − 0.100 VCUn VCUn VCLn VDLn VDUn VCUn + 0.020 VCUn + 0.030 VCLn + 0.050 VDLn + 0.080 VDUn + 0.100 V 1 V 1 V 1 V 1 V 1 V0INHn With 0 V battery detection function 0.4 0.7 1.1 V 1 tCU CCCT = 0.1 μF 0.67 1.00 1.33 s 2 tDL CCDT = 0.1 μF 0.67 1.00 1.33 s 2 CCT pin voltage VCCT − − 1.5 5.0 V 2 CDT pin voltage VCDT − − 1.5 5.0 V 2 4 − 26 V − − VDS − 4.0 − VDS − 4.0 − − − − VDS − 0.8 − VDS − 0.8 − V V V V 3 3 3 3 Input Voltage Fixed output voltage of CO pin and DO pin − − − − Operation voltage between VDD pin and VSS pin CTLC pin voltage "H" CTLC pin voltage "L" CTLD pin voltage "H" CTLD pin voltage "L" VDSOP SEL1 pin voltage "H" VSELH1 − VDS × 0.8 − − V 3 SEL2 pin voltage "H" VSELH2 − VDS × 0.8 − − V 3 SEL1 pin voltage "L" VSELL1 − − − VDS × 0.2 V 3 SEL2 pin voltage "L" VSELL2 − − − VDS × 0.2 V 3 VCOH VDOH − − − 5.0 5.0 8.0 8.0 12.0 12.0 V V 4 4 Output Voltage CO pin voltage "H" DO pin voltage "H" Input Current Current consumption during operation Current consumption during power-down VCTLCH VCTLCL VCTLDH VCTLDL IOPE V1 = V2 = V3 = V4 = V5 = 3.4 V − 13 22 μA 5 IPDN V1 = V2 = V3 = V4 = V5 = 1.6 V − 2.6 4.5 μA 5 − 0.4 0.8 μA 6 −1.0 − 1.0 μA 6 −3.0 −1.0 − μA 6 0.4 0.6 0.8 μA 6 0.4 0.6 0.8 μA 6 VC1 pin current IVC1 VC2 to VC5 pins current IVC2 to IVC5 VC6 pin current IVC6 CTLC pin current "H" ICTLCH CTLD pin current "H" ICTLDH 6 V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS, V8 = V9 = 0 V V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS, V8 = V9 = 0 V V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS, V8 = V9 = 0 V V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS, V8 = V9 = 0 V V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS, V8 = V9 = 0 V Rev.2.1_00 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Table 5 (2 / 2) Item SEL1 pin current "H" SEL2 pin current "H" SEL1 pin current "L" SEL1 pin current "L" (Ta = +25°C, VDS = VDD − VSS = V1 + V2 + V3 + V4 + V5 unless otherwise specified) Test Symbol Condition Min. Typ. Max. Unit Circuit V1 = V2 = V3 = V4 = V5 = 3.4 V, − − μA ISELH1 0.1 6 V6 = V7 = V8 = VDS, V9 = 0 V V1 = V2 = V3 = V4 = V5 = 3.4 V, − − μA ISELH2 0.1 6 V6 = V7 = V9 = VDS, V8 = 0 V V1 = V2 = V3 = V4 = V5 = 3.4 V, −0.1 − − μA ISELL1 6 V6 = V7 = VDS, V8 = V9 = 0 V V1 = V2 = V3 = V4 = V5 = 3.4 V, −0.1 − − μA ISELL2 6 V6 = V7 = VDS, V8 = V9 = 0 V Output Current CO pin source current ICOH − − CO pin sink current ICOL − DO pin source current IDOH − DO pin sink current *1. *2. IDOL − −10 μA 7 10 − − − μA 7 − − −10 μA 7 10 − − μA 7 Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. Refer to "6. Delay time setting" in " Operation" for details of the delay time function. 7 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00  Test Circuits 1. Overcharge detection voltage (VCUn), overcharge release voltage (VCLn), overdischarge detection voltage (VDLn), overdischarge release voltage (VDUn) (Test circuit 1) VCU1 is defined as the voltage V1 when V1 is gradually increased and the CO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = VCU − 0.05 V. After that, VCL1 is defined as the voltage V1 when V1 is gradually decreased and the CO pin output becomes release status after setting V2 = V3 = V4 = V5 = 3.2 V. Moreover, VDL1 is defined as the voltage V1 when V1 is gradually decreased and the DO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.5 V. After that, VDU1 is defined as the voltage V1 when V1 is gradually increased and the DO pin output becomes release status. Similarly, VCUn, VCLn, VDLn and VDUn can be defined by changing Vn (n = 2 to 5). 2. 0 V battery detection voltage (V0INHn) (With 0 V battery detection function) (Test circuit 1) V0INH1 is defined as the voltage V1 when V1 is gradually decreased and the CO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V. Similarly, V0INHn can be defined by changing Vn (n = 2 to 5). 3. Overcharge detection delay time (tCU), overdischarge detection delay time (tDL) (Test circuit 2) tCU is defined as the time period from when V1 changes from 3.4 V to 4.5 V to when the CO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V. Moreover, tDL is defined as the time period from when V1 changes from 3.4 V to 1.6 V to when the DO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V. 4. CCT pin voltage (VCCT), CDT pin voltage (VCDT) (Test circuit 2) VCCT is defined as the voltage between the CCT pin and the VSS pin during the time period when V1 changes from 3.4 V to 4.5 V to when the CO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V. Moreover, VCDT is defined as the voltage between the CDT pin and the VSS pin during the time period when V1 changes from 3.4 V to 1.6 V to when the DO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V. 5. CTLC pin voltage "H" (VCTLCH), CTLC pin voltage "L" (VCTLCL), CTLD pin voltage "H" (VCTLDH), CTLD pin voltage "L" (VCTLDL) (Test circuit 3) VCTLCL is defined as the voltage V6 when V6 is gradually decreased and the CO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After that, VCTLCH is defined as the voltage V6 when V6 is gradually increased and the CO pin output becomes release status. Moreover, VCTLDL is defined as the voltage V7 when V7 is gradually decreased and the DO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After that, VCTLDH is defined as the voltage V7 when V7 is gradually increased and the DO pin output becomes release status. 8 Rev.2.1_00 6. BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series SEL1 pin voltage "H" (VSELH1), SEL2 pin voltage "H" (VSELH2), SEL1 pin voltage "L" (VSELL1), SEL2 pin voltage "L" (VSELL2) (Test circuit 3) VSELH1 is defined as the voltage V8 when V8 is gradually increased and the DO pin output becomes release status after setting V1 = V2 = V3 = V5 = 3.5 V, V4 = 0 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After that, VSELL1 is defined as the voltage V8 when V8 is gradually decreased and the DO pin output becomes detection status. Moreover, VSELH2 is defined as the voltage V9 when V9 is gradually increased and the DO pin output becomes release status after setting V1 = V2 = V3 = V4 = 3.5 V, V5 = 0 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After that, VSELL2 is defined as the voltage V9 when V9 is gradually decreased and the DO pin output becomes detection status. 7. CO pin voltage "H" (VCOH), DO pin voltage "H" (VDOH) (Test circuit 4) VCOH is defined as the voltage between the CO pin and the VSS pin when V1 = V2 = V3 = V4 = V5 = 3.4 V. VDOH is defined as the voltage between the DO pin and the VSS pin when V1 = V2 = V3 = V4 = V5 = 3.4 V. 8. CO pin source current (ICOH), CO pin sink current (ICOL), DO pin source current (IDOH), DO pin sink current (IDOL) (Test circuit 7) ICOH is defined as the CO pin current when V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = VCOH − 0.5 V. ICOL is defined as the CO pin current when V1 = 6.8 V, V2 = 0 V, V3 = V4 = V5 = 3.4 V, V6 = 0.5 V. IDOH is defined as the DO pin current when V1 = V2 = V3 = V4 = V5 = 3.4 V, V7 = VDOH − 0.5 V. IDOL is defined as the DO pin current when V1 = 6.8 V, V2 = 0 V, V3 = V4 = V5 = 3.4 V, V7 = 0.5 V. 9 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series V 1 2 3 4 5 6 7 8 V VDD 16 VC1 15 VC2 14 VC3 13 VC4 12 VC5 11 VC6 10 VSS 9 CTLD CTLC CO DO SEL1 SEL2 CDT CCT 1 2 3 4 5 6 7 8 V1 V2 V3 V4 V5 V V 0.1 μF V Figure 4 Test Circuit 1 V6 V7 V V V8 V9 1 2 3 4 5 6 7 8 CTLD CTLC CO DO SEL1 SEL2 CDT CCT Rev.2.1_00 CTLD CTLC CO DO SEL1 SEL2 CDT CCT VDD 16 VC1 15 VC2 14 VC3 13 VC4 12 VC5 11 VC6 10 VSS 9 V1 V2 V3 V4 V5 0.1 μF V Figure 5 Test Circuit 2 VDD 16 VC1 15 VC2 14 VC3 13 VC4 12 VC5 11 VC6 10 VSS 9 V1 V2 V3 V4 V5 V 1 2 3 4 5 6 7 8 V 1 MΩ Figure 6 Test Circuit 3 CTLD CTLC CO DO SEL1 SEL2 CDT CCT VDD 16 VC1 15 VC2 14 VC3 13 VC4 12 VC5 11 VC6 10 VSS 9 V1 V2 V3 V4 V5 1 MΩ Figure 7 Test Circuit 4 IOPE, IPDN 1 2 3 4 5 6 7 8 CTLD CTLC CO DO SEL1 SEL2 CDT CCT VDD 16 VC1 15 VC2 14 VC3 13 VC4 12 VC5 11 VC6 10 VSS 9 A V1 V2 V3 V4 V5 A V6 A V7 CTLD CTLC CO DO SEL1 SEL2 CDT CCT VDD 16 VC1 15 VC2 14 VC3 13 VC4 12 VC5 11 VC6 10 VSS 9 Figure 10 Test Circuit 7 10 A A A A V6 V7 V8 V9 Figure 8 Test Circuit 5 1 2 3 4 5 6 7 8 V V 1 2 3 4 5 6 7 8 CTLD CTLC CO DO SEL1 SEL2 CDT CCT VDD VC1 VC2 VC3 VC4 VC5 VC6 VSS 16 15 14 13 12 11 10 9 Figure 9 Test Circuit 6 V1 V2 V3 V4 V5 A A A A A A V1 V2 V3 V4 V5 Rev.2.1_00 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series  Operation Remark Refer to " Connection Examples of Battery Monitoring IC". 1. Normal status When the voltage of each of the batteries is in the range from overcharge detection voltage (VCUn) to overdischarge detection voltage (VDLn), and the CTLC pin input voltage (VCTLC) and the CTLD pin input voltage (VCTLD) are higher than the CTLC pin voltage "H" (VCTLCH) and the CTLD pin voltage "H" (VCTLDH), respectively, the S-8225A Series defines each of the CO pin output voltage (VCO) and the DO pin output voltage (VDO) as "H". This is called normal status. VCO is defined as the CO pin voltage "H" (VCOH) when it is "H". Similarly, VDO is defined as the DO pin voltage "H" (VDOH) when it is "H". Caution When the battery is connected for the first time, the S-8225A Series returns to normal status if the voltage of each of the batteries is in the range from overcharge release voltage (VCLn) to overdischarge release voltage (VDUn). 2. Overcharge status When the voltage of one of the batteries becomes VCUn or higher, the CO pin output inverts and the S-8225A Series becomes detection status. This is called overcharge status. When the voltage of each of the batteries becomes overcharge release voltage (VCLn) or lower, the overcharge status is released and the S-8225A Series returns to normal status. 3. Overdischarge status When the voltage of one of the batteries becomes VDLn or lower, the DO pin output inverts and the S-8225A Series becomes detection status. This is called overdischarge status. When the voltage of each of the batteries becomes overdischarge release voltage (VDUn) or higher, the overdischarge status is released and the S-8225A Series returns to normal status. 11 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00 4. CTLC pin and CTLD pin The S-8225A Series has two pins to control. The CTLC pin controls the output voltage from the CO pin; the CTLD pin controls the output voltage from the DO pin. Thus it is possible for users to control the output voltages from the CO pin and DO pin, respectively. These controls precede the battery protection circuit. Table 6 Status Set by CTLC Pin CTLC Pin CO Pin "H"*1 Normal status*4 Open*2 VSS *3 "L" VSS *1. "H": CTLC ≥ VCTLCH *2. Pulled down by ICTLCH *3. "L": CTLC ≤ VCTLCL *4. The status is controlled by the voltage detection circuit. Table 7 Status Set by CTLD Pin CTLD Pin DO Pin "H"*1 Normal status*4 Open*2 VSS *3 "L" VSS *1. "H": CTLD ≥ VCTLDH *2. Pulled down by ICTLDH *3. "L": CTLD ≤ VCTLDL *4. The status is controlled by the voltage detection circuit. Caution When the power supply fluctuates, unexpected behavior might occur if an electrical potential is generated between the potentials of "H" level input to the CTLC / CTLD pins and IC's VDD by external filters. 5. 0 V battery detection function In the S-8225A Series, users are able to select a 0 V battery detection function. If this optional function is selected, the CO pin becomes detection status when the voltage of one of the batteries becomes 0 V battery detection voltage (V0INHn) or lower. 12 Rev.2.1_00 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series 6. Delay time setting When the voltage of one of the batteries becomes VCUn or higher, the S-8225A Series charges the capacitor connected to the CCT pin rapidly up to the CCT pin voltage (VCCT). After that, The S-8225A Series discharges the capacitor with the constant current of 100 nA, and the CO pin output is defined as detection status at the time when the CCT pin voltage falls to a certain level or lower. The overcharge detection delay time (tCU) changes depending on the capacitor connected to the CCT pin. tCU is calculated by the following formula. Min. Typ. Max. tCU [s] = (6.7, 10, 13.3) × CCCT [μF] Similarly, the overdischarge detection delay time (tDL) changes depending on the capacitor connected to the CDT pin. tDL is calculated by the following formula. Min. Typ. Max. tDL [s] = (6.7, 10, 13.3) × CCDT [μF] Since the S-8225A Series charges the capacitor for delay rapidly, the voltage of the CCT pin and the CDT pin becomes large if the capacitance value is small. As a result, a variation between the calculated value of the delay time and the actual delay time is generated. If the capacitance value is so large that the rapid charging can not be finished within the internal delay time, the output pin becomes detection status simultaneously with the end of internal delay time. In addition, the charging current to the capacitor for delay passes through the VDD pin. Therefore, a large resistor connected to the VDD pin results in a big drop of the power supply voltage at the time of rapid charging which causes malfunction. Regarding the recommended values for external components, refer to "Table 9 Constants for External Components". 7. SEL pin In the S-8225A Series, switchable monitoring control between 3-cell to 5-cell is possible by using the SEL1 pin and the SEL2 pin. For example, since the overdischarge detection of V4 or V5 is prohibited and the overdischarge is not detected even if V4 or V5 is shorted when the SEL1 pin is "H" and the SEL2 pin is "L", the S-8225A Series can be used for 3-cell monitoring. Be sure to use the SEL1 pin and the SEL2 pin at "H" or "L" potential. Table 8 Settings of SEL1 Pin and SEL2 Pin SEL1 pin SEL2 pin "H"*1 "H"*1 "H"*1 "L"*2 "L"*2 "H"*1 "L"*2 "L"*2 *1. "H": SEL1 ≥ VSELH1 and SEL2 ≥ VSELH2 *2. "L": SEL1 ≤ VSELL1 and SEL2 ≤ VSELL2 Setting Prohibition 3-cell monitoring 4-cell monitoring 5-cell monitoring 13 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00  Timing Charts 1. Overcharge detection and overdischarge detection VCUn VCLn Battery voltage VDUn VDLn (n = 1 to 5) VCOH CO pin voltage VSS VDOH DO pin voltage VSS Charger connection Load connection Overcharge detection delay time (tCU) Status *1 (1) (2) (1) *1. (1): Normal status (2): Overcharge status (3): Overdischarge status Figure 11 14 Overdischarge detection delay time (tDL) (3) (1) BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00 2. Overcharge detection delay VCUn (n = 1 to 5) Battery voltage VCOH CO pin voltage VSS CCT pin voltage VCCT VSS Charger connection Less than tCU Status*1 (1) tCU (2) *1. (1): Normal status (2): Overcharge status Figure 12 15 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00 3. Overdischarge detection delay (n = 1 to 5) Battery voltage VDLn VDOH DO pin voltage VSS CDT pin voltage VCDT VSS Load connection Less than tDL Status*1 (1) (2) *1. (1): Normal status (2): Overdischarge status Figure 13 16 tDL Rev.2.1_00 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series  Connection Examples of Battery Monitoring IC 1. 10-serial cell EB+ RCTLD RCTLC RSEL21 CCDT1 CIFC OC 2 CTLC VC1 15 3 CO VC2 14 4 DO VC3 13 6 SEL2 VC5 11 7 CDT VC6 10 8 CCT VSS 9 CVDS1 RVDD1 CVDD1 RVC11 CVC11 RVC21 CVC21 RVC31 CVC31 RVC41 CVC41 RVC51 CVC51 RVC61 CVC61 CCCT1 RIFD OD VDD 16 S-8225A 5 SEL1 VC4 12 RSEL11 RIFC 1 CTLD CIFD RSEL12 1 CTLD VDD 16 2 CTLC VC1 15 3 CO VC2 14 4 DO VC3 13 S-8225A 5 SEL1 VC4 12 RSEL22 CCDT2 6 SEL2 VC5 11 7 CDT VC6 10 8 CCT VSS 9 CVDS2 RVDD2 CVDD2 RVC12 CVC12 RVC22 CVC22 RVC32 CVC32 RVC42 CVC42 RVC52 CVC52 RVC62 CVC62 CCCT2 EB− Remark Regarding the recommended values for external components, refer to "Table 9 Components". Constants for External Figure 14 17 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00 2. 9-serial cell EB+ RCTLD RCTLC RSEL11 CCDT1 CIFC OC 2 CTLC VC1 15 3 CO VC2 14 4 DO VC3 13 6 SEL2 VC5 11 7 CDT VC6 10 8 CCT VSS 9 CVDS1 RVDD1 CVDD1 RVC11 CVC11 RVC21 CVC21 RVC31 CVC31 RVC41 CVC41 RVC51 CVC51 RVC61 CVC61 CCCT1 RIFD OD VDD 16 S-8225A 5 SEL1 VC4 12 RSEL21 RIFC 1 CTLD CIFD RSEL12 1 CTLD VDD 16 2 CTLC VC1 15 3 CO VC2 14 4 DO VC3 13 S-8225A 5 SEL1 VC4 12 RSEL22 CCDT2 6 SEL2 VC5 11 7 CDT VC6 10 8 CCT VSS 9 CVDS2 RVDD2 CVDD2 RVC12 CVC12 RVC22 CVC22 RVC32 CVC32 RVC42 CVC42 RVC52 CVC52 CCCT2 EB− Remark Regarding the recommended values for external components, refer to "Table 9 Components". Figure 15 18 Constants for External Rev.2.1_00 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series 3. 7-serial cell EB+ RCTLD RCTLC RSEL11 CCDT1 CIFC OC 2 CTLC VC1 15 3 CO VC2 14 4 DO VC3 13 6 SEL2 VC5 11 7 CDT VC6 10 8 CCT VSS 9 CVDS1 RVDD1 CVDD1 RVC11 CVC11 RVC21 CVC21 RVC31 CVC31 RVC41 CVC41 RVC51 CVC51 CCCT1 RIFD OD VDD 16 S-8225A 5 SEL1 VC4 12 RSEL21 RIFC 1 CTLD CIFD RSEL12 1 CTLD VDD 16 2 CTLC VC1 15 3 CO VC2 14 4 DO VC3 13 S-8225A 5 SEL1 VC4 12 RSEL22 CCDT2 6 SEL2 VC5 11 7 CDT VC6 10 8 CCT VSS 9 CVDS2 RVDD2 CVDD2 RVC12 CVC12 RVC22 CVC22 RVC32 CVC32 RVC42 CVC42 CCCT2 EB− Remark Regarding the recommended values for external components, refer to "Table 9 Components". Constants for External Figure 16 19 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00 Table 9 Constants for External Components Symbol RVDD1, RVDD2 RVCn1, RVCn2 CVDS1, CVDS2 CVDD1, CVDD2 CVCn1, CVCn2 CCCT1, CCCT2 CCDT1, CCDT2 RIFC, RIFD CIFC, CIFD RCTLC, RCTLD RSEL11, RSEL21 RSEL12, RSEL22 Min. 50 0.5 0.01 − 0.01 0.001 0.001 − − − 0.5 0.5 Typ. 100 1 0.1 0 0.1 0.1 0.1 5.1 1000 1 1 1 Max. 1000 2 1 1 1 0.22 0.22 − − − − − Unit Ω kΩ μF μF μF μF μF MΩ pF kΩ kΩ kΩ Caution 1. The constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the connection examples. In addition, the connection examples and the constants do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constants. 3. RVC1 to RVC6 and CVC1 to CVC6 should be the same constant, respectively. 4. Set up RVCn and CVCn as RVCn × CVCn ≥ 50 × 10-6. 5. Set up RVDD and CVDS as 5 × 10-6 ≤ RVDD × CVDS ≤ 100 × 10-6. 6. Set (RVDD × CVDS) / (RVCn × CVCn) = 0.1. Remark n = 1 to 6 20 Rev.2.1_00 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series  Precautions • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. • If both an overcharge battery and an overdischarge battery are included among the whole batteries, the condition is set in overcharge status and overdischarge status. Therefore either charging or discharging is impossible. • Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. • ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 21 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00  Characteristics (Typical Data) 1. Detection voltage 1. 1 VCU vs. Ta 1. 2 VCL vs. Ta VCL = 4.125 V VCU = 4.225 V 4.250 4.180 VCL [V] VCU [V] 4.240 4.230 4.220 4.140 4.100 4.210 4.200 −40 −25 4.060 0 25 Ta [C] 75 85 50 1. 3 VDL vs. Ta −40 −25 0 25 Ta [C] VDU = 2.50 V 2.38 2.60 2.34 2.55 VDU [V] VDL [V] 75 85 1. 4 VDU vs. Ta VDL = 2.30 V 2.30 2.26 2.22 50 2.50 2.45 −40 −25 2.40 0 25 Ta [C] 75 85 50 −40 −25 0 25 Ta [C] 50 75 85 2. Current consumption 2. 1 IOPE vs. Ta 2. 2 IPDN vs. Ta 4.0 15 3.0 10 5 0 −40 −25 0 0 25 Ta [C] 75 85 50 Ta = +25°C 50 40 IOPE [μA] 2.0 1.0 2. 3 IOPE vs. VDD 30 20 10 0 0 22 VDD = 8.0 V 20 IPDN [μA] IOPE [μA] VDD = 17.0 V 5 10 15 VDD [V] 20 25 30 −40 −25 0 25 Ta [C] 50 75 85 BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK S-8225A Series Rev.2.1_00 3. Delay time 3. 1 tCU vs. Ta 3. 2 tDL vs. Ta VDD = 15.2 V 2.0 2.0 1.5 1.5 tDL [s] tCU [s] VDD = 18.1 V 1.0 0.5 0 1.0 0.5 −40 −25 0 0 25 Ta [C] 75 85 50 −40 −25 0 25 Ta [C] 75 85 50 4. Output current 4. 1 ICOL vs. VDD 4. 2 ICOH vs. VDD Ta = +25°C 500 ICOH [μA] ICOL [μA] 400 300 200 Ta = +25°C 0 −20 −40 −60 100 −80 0 5 0 10 15 VDD [V] 20 25 30 4. 3 IDOL vs. VDD 0 5 10 15 VDD [V] 20 30 4. 4 IDOH vs. VDD Ta = +25°C Ta = +25°C 500 0 400 −20 IDOH [μA] IDOL [μA] 25 300 200 −40 −60 100 −80 0 5 0 10 15 VDD [V] 20 25 30 0 5 10 15 VDD [V] 20 25 30 5. Output voltage 5. 1 VCOH vs. VDD 5. 2 VDOH vs. VDD Ta = +25°C, VDL = 2.30 V 12 12 10 10 8 8 VDOH [V] VCOH [V] Ta = +25°C, VCU = 4.225 V Without 0 V battery detection function 6 4 2 6 4 2 0 0 0 5 10 15 VDD [V] 20 25 30 0 5 10 15 VDD [V] 20 25 30 23 5.1±0.2 0.65 16 9 1 8 0.17±0.05 0.22±0.08 No. FT016-A-P-SD-1.2 TITLE TSSOP16-A-PKG Dimensions FT016-A-P-SD-1.2 No. ANGLE UNIT mm ABLIC Inc. +0.1 4.0±0.1 ø1.5 -0 0.3±0.05 2.0±0.1 8.0±0.1 1.5±0.1 ø1.6±0.1 (7.2) 4.2±0.2 +0.4 6.5 -0.2 1 16 8 9 Feed direction No. FT016-A-C-SD-1.1 TITLE TSSOP16-A-Carrier Tape No. FT016-A-C-SD-1.1 ANGLE UNIT mm ABLIC Inc. 21.4±1.0 17.4±1.0 +2.0 17.4 -1.5 Enlarged drawing in the central part ø21±0.8 2±0.5 ø13±0.2 No. FT016-A-R-S1-1.0 TITLE TSSOP16-A- Reel No. FT016-A-R-S1-1.0 ANGLE QTY. UNIT mm ABLIC Inc. 4,000 Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com