S-8229A Series
www.ablic.com
BATTERY MONITORING IC
Rev.2.0_00
© ABLIC Inc., 2012-2020
The S-8229A Series is a battery monitoring IC developed using CMOS technology. Compared with conventional CMOS
voltage detectors, the S-8229A Series is ideal for the applications that require high-withstand voltage due to its maximum
operation voltage as high as 24 V.
The S-8229A Series is capable of confirming the voltage in stages since it detects three voltage values.
Features
• Detection voltage accuracy:
• Hysteresis characteristics:
• Current consumption:
• Operation voltage range:
• Detection voltage:
•
•
•
•
Output form:
Output logic*2:
Operation temperature range:
Lead-free (Sn 100%), halogen-free
*1.
*2.
±1.0%
VHYS1 to VHYS3 = 0 mV, 50 mV, 300 mV, 400 mV, 500 mV
During operation: IDD1 = 9.0 μA max. (−VDETtotal*1 ≥ 42 V)
IDD1 = 11.0 μA max. (−VDETtotal*1 < 42 V)
During power-off: IDD2 = 0.1 μA max.
VDD = 3.6 V to 24 V
−VDET1(S) to −VDET2(S) = 10.5 V to 21.5 V (0.1 V step)
−VDET3(S) = 7.5 V to 21.5 V (0.1 V step)
Nch open-drain output
Full charge all on, full charge all off
Ta = −40°C to +85°C
−VDETtotal: Total detection voltage
−VDETtotal = −VDET1(S) + −VDET2(S) + −VDET3(S)
Full charge all on: When the input voltage is equal to or higher than each of the three detection voltage values,
VOUT1 = VOUT2 = VOUT3 = VSS.
Full charge all off: When the input voltage is equal to or higher than each of the three detection voltage values,
VOUT1 = VOUT2 = VOUT3 = "High-Z".
Application
• Rechargeable lithium-ion battery pack
Packages
• SOT-23-6
• SNT-6A
1
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Block Diagram
VDD
OUT1
ON / OFF
+
Nch 1
−
OUT2
+
Nch 2
−
OUT3
+
VREF
−
VSS
Remark
Diodes in the figure are parasitic diodes.
Figure 1
2
Nch 3
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Product Name Structure
1.
Product name
S-8229 A xx - xxxx
U
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
M6T1: SOT-23-6, Tape
I6T1:
SNT-6A, Tape
Serial code*2
Sequentially set from AA to ZZ
*1.
*2.
2.
Refer to the tape drawing.
Refer to "3. Product name list".
Packages
Table 1
Package Name
SOT-23-6
SNT-6A
Package Drawing Codes
Dimension
Tape
Reel
MP006-A-P-SD
PG006-A-P-SD
MP006-A-C-SD
PG006-A-C-SD
MP006-A-R-SD
PG006-A-R-SD
Land
−
PG006-A-L-SD
3
BATTERY MONITORING IC
S-8229A Series
3.
Rev.2.0_00
Product name list
3. 1
SOT-23-6
Table 2
Detection Detection Detection Hysteresis Hysteresis
Voltage 1 Voltage 2 Voltage 3
Width 2
Width 1
[−VDET1(S)] [−VDET2(S)] [−VDET3(S)] [VHYS1(S)]
[VHYS2(S)]
S-8229AAA-M6T1U 19.400 V 18.100 V 15.300 V
0V
0V
S-8229AAB-M6T1U 19.400 V 18.100 V 15.300 V
0.500 V
0.500 V
S-8229AAC-M6T1U 19.500 V 18.000 V 15.500 V
0.050 V
0.050 V
S-8229AAG-M6T1U 15.600 V 14.800 V 13.600 V
0.500 V
0.500 V
S-8229AAH-M6T1U 20.000 V 18.500 V 16.000 V
0.500 V
0.500 V
S-8229AAI-M6T1U
20.000 V 18.500 V 16.000 V
0.050 V
0.050 V
S-8229AAJ-M6T1U 15.100 V 14.300 V 13.100 V
0.500 V
0.500 V
S-8229AAK-M6T1U 15.600 V 14.400 V 12.400 V
0V
0V
S-8229AAL-M6T1U 19.000 V 17.500 V 15.000 V
0V
0V
S-8229AAM-M6T1U 19.200 V 17.900 V 12.500 V
0V
0V
S-8229AAN-M6T1U 11.500 V 10.700 V
7.500 V
0V
0V
S-8229AAO-M6T1U 19.900 V 19.000 V 18.100 V
0V
0V
*1. Full charge all on: When the input voltage is equal to or higher than each
values, VOUT1 = VOUT2 = VOUT3 = VSS.
Full charge all off: When the input voltage is equal to or higher than each
values, VOUT1 = VOUT2 = VOUT3 = "High-Z".
Product Name
Remark
3. 2
Hysteresis
Width 3
Output Logic*1
[VHYS3(S)]
0V
Full charge all on
0.500 V Full charge all on
0.050 V Full charge all on
0.500 V Full charge all on
0.500 V Full charge all on
0.050 V Full charge all on
0.500 V Full charge all on
0V
Full charge all on
0V
Full charge all on
0V
Full charge all on
0V
Full charge all on
0V
Full charge all on
of the three detection voltage
of the three detection voltage
Please contact our sales representatives for products other than the above.
SNT-6A
Table 3
Detection Detection Detection Hysteresis Hysteresis
Voltage 1 Voltage 2 Voltage 3
Width 2
Width 1
[−VDET1(S)] [−VDET2(S)] [−VDET3(S)] [VHYS1(S)]
[VHYS2(S)]
S-8229AAF-I6T1U
18.000 V 15.000 V 21.500 V
0.050 V
0.050 V
*1. Full charge all on: When the input voltage is equal to or higher than each
values, VOUT1 = VOUT2 = VOUT3 = VSS.
Full charge all off: When the input voltage is equal to or higher than each
values, VOUT1 = VOUT2 = VOUT3 = "High-Z".
Product Name
Remark
4
Hysteresis
Width 3
Output Logic*1
[VHYS3(S)]
0.050 V Full charge all on
of the three detection voltage
of the three detection voltage
Please contact our sales representatives for products other than the above.
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Pin Configurations
1.
SOT-23-6
Top view
Table 4
6 5 4
Pin No.
1
2
3
4
5
6
1 2 3
Figure 2
2.
Symbol
OUT1
OUT2
OUT3
VSS
VDD
ON / OFF
Description
Voltage detection output pin 1
Voltage detection output pin 2
Voltage detection output pin 3
GND pin
Voltage input pin
ON / OFF pin
SNT-6A
Top view
1
2
3
Table 5
6
5
4
Figure 3
Pin No.
1
2
3
4
5
6
Symbol
OUT3
OUT2
OUT1
ON / OFF
VDD
VSS
Description
Voltage detection output pin 3
Voltage detection output pin 2
Voltage detection output pin 1
ON / OFF pin
Voltage input pin
GND pin
5
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Absolute Maximum Ratings
Table 6
(Ta = +25°C unless otherwise specified)
Item
Symbol
Absolute Maximum Rating
Unit
VSS − 0.3 to VSS + 26
VDD
V
Input voltage
VSS − 0.3 to VSS + 26
VON / OFF
V
VSS − 0.3 to VSS + 26
Output voltage n
VOUTn
V
−40 to +85
Operation ambient temperature
Topr
°C
−40 to +125
Storage temperature
Tstg
°C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
Remark
n = 1 to 3
Thermal Resistance Value
Item
Symbol
Table 7
Condition
Board A
Board B
Board C
SOT-23-6
Board D
Board E
Junction-to-ambient thermal resistance*1 θJA
Board A
Board B
SNT-6A
Board C
Board D
Board E
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark
6
Refer to " Power Dissipation" and "Test Board" for details.
Min.
−
−
−
−
−
−
−
−
−
−
Typ.
159
124
−
−
−
224
176
−
−
−
Max.
−
−
−
−
−
−
−
−
−
−
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Electrical Characteristics
Table 8
(Ta = +25°C unless otherwise specified)
Item
Symbol
Detection voltage n*1
−VDETn
Hysteresis width n*2
VHYSn
ON / OFF pin input voltage
"H"
ON / OFF pin input voltage
"L"
Operation voltage range
between VDD pin and
VSS pin
Condition
Test
Circuit
V
1
V
1
V
1
V1 = V3 = 22 V
1.5
−
−
V
1
VSL
V1 = V3 = 22 V
−
−
0.3
V
1
3.6
−
24
V
−
−
4.0
9.0
μA
2
−
5.0
11.0
μA
2
−
−
0.1
μA
2
10
−
−
mA
3
5
−
−
mA
3
−
−
0.1
μA
3
−
±100
±200
ppm/°C
1
VDD
−
V1 = 22 V, V2 = 0 V
IOUTn
Full charge all on,
V1 = 22 V, V2 = 3 V,
V3 = 1 V
Full charge all off,
V1 = 10 V, V2 = 3 V,
V3 = 1 V
V1 = 22 V, V2 = 0 V,
V3 = 22 V
Output leak current n
ILEAKn
Detection voltage
temperature coefficient*4
Δ−VDETn
Ta = −40°C to +85°C*5
ΔTa • −VDETn
*5.
Unit
VSH
Current consumption during
IDD2
power-off
*4.
Max.
−VDETn(S)
−VDETn(S)
−VDETn(S)
× 0.99
× 1.01
−VHYSn(S)
−VHYSn(S)
−VHYSn(S)
300 mV ≤ VHYSn(S) ≤ 500 mV
× 0.8
× 1.2
−VHYSn(S)
−VHYSn(S)
−VHYSn(S)
0 V ≤ VHYSn(S) ≤ 50 mV
− 0.025
+ 0.025
V1 = 22 V, V2 = 3 V,
−VDETtotal*3 ≥ 42 V
V1 = 22 V, V2 = 3 V,
−VDETtotal*3 < 42 V
*1.
*2.
*3.
Typ.
−
Current consumption during
IDD1
operation
Output sink current n
Min.
−VDETn: Actual detection voltage value, −VDETn(S): Set detection voltage
VHYSn: Actual hysteresis width, −VHYSn(S): Set hysteresis width
−VDETtotal: Total detection voltage
−VDETtotal = −VDET1(S) + −VDET2(S) + −VDET3(S)
The Change in temperature of the detection voltage [mV/°C] is calculated by using the following equation.
Δ − VDETn
Δ − VDETn
[mV/°C]*1 = −VDETn(S) (typ.) [V]*2 ×
[ppm/°C]*3 ÷ 1000
ΔTa
ΔTa • −VDETn
*1. Change in temperature of the detection voltage
*2. Set detection voltage
*3. Detection voltage temperature coefficient
Since products are not screened at high and low temperature, the specification for this temperature range is
guaranteed by design, not tested in production.
Remark
n = 1 to 3
7
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Test Circuits
100 kΩ 100 kΩ 100 kΩ
OUT1
VDD
V3
OUT2
ON / OFF
V1
OUT3
VSS
VOUT1
V2
V
Figure 4
VOUT2
V
VOUT3
V
Test Circuit 1
IDD
A
OUT1
VDD
OUT2
ON / OFF
V1
VSS
V2
Figure 5
Test Circuit 2
IOUT1
A
VDD
V1
VSS
OUT3
V2
Figure 6
8
IOUT2
A
IOUT3
A
OUT1
OUT2
ON / OFF
OUT3
Test Circuit 3
V3
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Standard Circuit
ROUT1
R1
VDD
ROUT2
ROUT3
OUT1
OUT2
C1
ON / OFF
VSS
OUT3
Figure 7
Table 9
Symbol
Purpose
Constants for External Components
Typ.
R1*1
For power fluctuation
470 Ω
C1
For power fluctuation
0.1 μF
ROUTn*2
For output pin pull-up
100 kΩ
Remark
Set the value as small as possible to prevent deterioration
of the detection voltage.
Set R1 × C1 ≥ 40 × 10−6.
Make sure the power dissipation of the S-8229A Series is
not exceeded.
*1. Set up R1 as 100 kΩ or less to prevent oscillation.
*2. Set up each of ROUTn as 620 Ω or more so that the power dissipation is not exceeded.
Caution 1. The constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the
connection example. In addition, the connection example and the constants do not guarantee proper
operation. Perform thorough evaluation using the actual application to set the constants.
Remark
n = 1 to 3
9
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Operation
1.
Basic operation
The basic operation when VON / OFF ≥ VSH is shown as follows.
1. 1
When the power supply voltage (VDD) increases
The OUTn pin becomes release status if VDD is equal to or higher than the release voltage (+VDETn).
Table 10
Set Conditions at Releasing
Output Logic
Full charge all on
Full charge all off
1. 2
VOUTn
VSS
High-Z
Nch n
On
Off
When VDD decreases
The OUTn pin becomes detection status if VDD is equal to or lower than the detection voltage (−VDETn).
Table 11
Set Conditions at Detecting
Output Logic
Full charge all on
Full charge all off
1. 3
VOUTn
High-Z
VSS
Nch n
Off
On
When VDD ≤ minimum operation voltage
The OUTn pin voltage is indefinite.
Remark
2.
n = 1 to 3
ON / OFF pin
This pin starts and stops the S-8229A Series.
When VON / OFF is set to VSL or lower, the entire internal circuit stops operating, and Nch n (refer to Figure 1 in
" Block Diagram") is turned off, reducing current consumption significantly.
The ON / OFF pin is configured as shown in Figure 8. The ON / OFF pin is not internally pulled up or pulled down,
so do not use the ON / OFF pin in the floating status. When not using the ON / OFF pin, connect the pin to the VDD
pin.
VDD
ON / OFF
VSS
Figure 8
Remark
10
n = 1 to 3
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Timing Charts
1.
Nch open-drain output (full charge all on, VON / OFF ≥ VSH)
+VDET1
−VDET1
+VDET2
−VDET2
VDD pin voltage
+VDET3
−VDET3
Minimum operation voltage
High-Z
OUT1 pin voltage
VSS
High-Z
OUT2 pin voltage
VSS
High-Z
OUT3 pin voltage
VSS
Figure 9
Remark
When VDD is equal to or lower than the minimum operation voltage, the output voltage from the OUT1 pin
to the OUT3 pin is indefinite in the shaded area.
11
BATTERY MONITORING IC
S-8229A Series
2.
Rev.2.0_00
Nch open-drain output (full charge all off, VON / OFF ≥ VSH)
+VDET1
−VDET1
+VDET2
−VDET2
VDD pin voltage
+VDET3
−VDET3
Minimum operation voltage
High-Z
OUT1 pin voltage
VSS
High-Z
OUT2 pin voltage
VSS
High-Z
OUT3 pin voltage
VSS
Figure 10
Remark
12
When VDD is equal to or lower than the minimum operation voltage, the output voltage from the OUT1 pin
to the OUT3 pin is indefinite in the shaded area.
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Application Circuits
1.
Detection of residual quantity of the battery used by LED
R1
OUT1
VDD
ROUT1
ROUT2
ROUT3
LED1
LED2
LED3
OUT2
C1
ON / OFF
VSS
OUT3
Figure 11
Caution 1.
2.
2.
The constants may be changed without notice.
It has not been confirmed whether the operation is normal or not in circuits other than the
connection example. In addition, the connection example and the constants do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the
constants.
Change of detection voltage
When the detection voltage is changed by using a resistance divider, set RA ≤ 100 kΩ to prevent oscillation, as
shown in Figure 12.
The detection voltage after changing is calculated by using the following equation.
Detection voltage =
RA + RB
× −VDETn + RA × IDD
RB
ROUT1 ROUT2 ROUT3
RA
OUT1
VDD
RB
OUT2
C1
ON / OFF
VSS
OUT3
Figure 12
Caution 1.
2.
3.
Remark
Note that the detection voltage may deviate from the value determined by the ratio of RA and RB
in the case of the above connection diagram.
The constants may be changed without notice.
It has not been confirmed whether the operation is normal or not in circuits other than the
connection example. In addition, the connection example and the constants do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the
constants.
n = 1 to 3
13
BATTERY MONITORING IC
S-8229A Series
3.
Rev.2.0_00
Short-circuit of the output pin
In the case of −VDET1(S) = −VDET2(S) = −VDET3(S), +VDET1 = +VDET2 = +VDET3, the load current can be increased by
short-circuiting the output pin, as shown in Figure 13.
ROUT*1
R1
OUT1
VDD
OUT2
C1
ON / OFF
*1.
VSS
OUT3
Set up ROUT as 220 Ω or more so that the power dissipation is not exceeded.
Figure 13
Caution 1.
2.
14
The constants may be changed without notice.
It has not been confirmed whether the operation is normal or not in circuits other than the
connection example. In addition, the connection example and the constants do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the
constants.
Rev.2.0_00
BATTERY MONITORING IC
S-8229A Series
Precautions
• The application conditions for the input voltage, output voltage, and output pin pull-up resistance should not exceed
the package power dissipation.
• Wiring patterns for the VDD pin, the VOUT pin and the VSS pin should be designed so that the impedance is low.
• Note that the detection voltage may deviate due to the resistance component of output sink current and the VSS pin
wiring.
• In applications where a resistor is connected to the input (refer to Figure 7 in " Standard Circuit"), the
feed-through current which is generated when the output switches causes a voltage drop equal to feed-through
current × input resistance. In this state, the feed-through current stops and its resultant voltage drop disappears,
and the output switches. The feed-through current is then generated again, a voltage drop appears. Note that an
oscillation may be generated for this reason.
• When designing for mass production using an application circuit described herein, the product deviation and
temperature characteristics should be taken into consideration. ABLIC Inc. shall not bear any responsibility for
patent infringements related to products using the circuits described herein.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
15
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Characteristics (Typical Data)
1.
Detection voltage
1. 1
−VDETn vs. Ta
−VDETn(S) = 17.5 V
17.7
21.6
17.6
−VDETn [V]
−VDETn [V]
−VDETn(S) = 21.5 V
21.7
21.5
21.4
21.3
−40 −25
17.5
17.4
17.3
0
25
Ta [°C]
50
75 85
−40 −25
0
25
Ta [°C]
50
75 85
−VDETn(S) = 10.5 V
10.60
−VDETn [V]
10.55
10.50
10.45
10.40
2.
−40 −25
0
25
Ta [°C]
50
75 85
Hysteresis width
2. 1
−VHYSn vs. Ta
−VHYSn(S) = 0.5 V
−VHYSn(S) = 0.3 V
0.36
0.60
0.34
VHYSn [V]
VHYSn [V]
0.55
0.50
0.45
0.40
−40 −25
25
Ta [°C]
50
75 85
VHYSn [V]
0.07
0.06
0.05
0.04
0.03
16
0.28
0.24
0
−VHYSn(S) = 0.05 V
Remark
0.30
0.26
0.08
0.02
0.32
−40 −25
n = 1 to 3
0
25
Ta [°C]
50
75 85
−40 −25
0
25
Ta [°C]
50
75 85
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
3.
Current consumption
3. 1
IDD1 vs. VDD
3. 2
Ta = +25°C
S-8229AAA
12
S-8229AAA
6.0
IDD1 [μA]
IDD1 [μA]
9
6
3
0
5
10
15
VDD [V]
20
VDD = 22 V
4.0
2.0
0
0
3. 3
IDD1 vs. Ta
25
−40 −25
0
25
Ta [°C]
75 85
50
IDD2 vs. Ta
S-8229AAA
0.10
VDD = 22 V
IDD2 [μA]
0.08
0.06
0.04
0.02
0
0
25
Ta [°C]
50
75 85
Output current
4. 1
IOUTn vs. VOUTn
4. 2
IOUTn vs. VDD
VDD = 22 V
120
VOUTn = 1 V
70
Ta = −40°C
100
Ta = +25°C
80
60
Ta = +85°C
40
40
30
20
0
10
Remark
0.5
1.0
VOUTn [V]
1.5
2.0
Ta = +25°C
50
20
0
Ta = −40°C
60
IOUTn [mA]
IOUTn [mA]
4.
−40 −25
Ta = +85°C
5
10
15
20
VDD [V]
25
30
n = 1 to 3
17
BATTERY MONITORING IC
S-8229A Series
5.
Rev.2.0_00
Response time
5. 1
tDETn vs. Δ−VDETn
5. 2
tRELn vs. Δ+VDETn
Δ−VDETn = −VDETn − VDD, Ta = +25°C
Δ+VDETn = VDD − (+VDETn), Ta = +25°C
20
100
−VDETn = 21.5 V
−VDETn = 17.5 V
60
tRELn [ms]
tDETn [ms]
80
−VDETn = 10.5 V
40
20
0
+VDETn = 22.0 V
15
+VDETn = 17.5 V
10
+VDETn = 10.5 V
5
0
1
10
100
Δ−VDETn [mV]
1000
1
10
100
Δ+VDETn [mV]
Δ + VDETn
+VDETn
VDD pin voltage
−VDETn
Δ − VDETn
VOUTn
OUTn pin voltage
(Full charge all on)
VDD
tDETn
tRELn
tDETn
tRELn
VSS
VOUTn
OUTn pin voltage
(Full charge all off)
VDD
VSS
Figure 14
Remark 1.
2.
18
Refer to "Figure 4
n = 1 to 3
Test Condition of Response Time
Test Circuit 1" for the test condition of the response time.
1000
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Marking Specifications
1.
SOT-23-6
Top view
6
5
(1) to (3):
(4):
4
Product code (Refer to Product name vs. Product code)
Lot number
(1) (2) (3) (4)
1
2
3
Product name vs. Product code
Product Code
(1)
(2)
(3)
Y
S
A
Y
S
B
Y
S
C
Y
S
G
Y
S
H
Y
S
I
Y
S
J
Y
S
K
Y
S
L
Y
S
M
Y
S
N
Y
S
O
Product Name
S-8229AAA-M6T1U
S-8229AAB-M6T1U
S-8229AAC-M6T1U
S-8229AAG-M6T1U
S-8229AAH-M6T1U
S-8229AAI-M6T1U
S-8229AAJ-M6T1U
S-8229AAK-M6T1U
S-8229AAL-M6T1U
S-8229AAM-M6T1U
S-8229AAN-M6T1U
S-8229AAO-M6T1U
2.
SNT-6A
Top view
6
5
(1) to (3):
(4) to (6):
4
Product code (Refer to Product name vs. Product code)
Lot number
(1) (2) (3)
(4) (5) (6)
1
2
3
Product name vs. Product code
Product Name
S-8229AAF-I6T1U
Product Code
(1)
(2)
(3)
Y
S
F
19
BATTERY MONITORING IC
S-8229A Series
Rev.2.0_00
Power Dissipation
SOT-23-6
SNT-6A
Tj = +125°C max.
0.8
B
0.6 A
0.4
0.2
0.0
0
25
50
75
100
125
150
175
Tj = +125°C max.
1.0
Power dissipation (PD) [W]
Power dissipation (PD) [W]
1.0
0.8
B
0.6
A
0.4
0.2
0.0
0
25
Ambient temperature (Ta) [°C]
Board
A
B
C
D
E
20
Power Dissipation (PD)
0.63 W
0.81 W
−
−
−
50
75
100
125
150
Ambient temperature (Ta) [°C]
Board
A
B
C
D
E
Power Dissipation (PD)
0.45 W
0.57 W
−
−
−
175
SOT-23-3/3S/5/6 Test Board
IC Mount Area
(1) Board A
Item
Size [mm]
Material
Number of copper foil layer
Copper foil layer [mm]
1
2
3
4
Thermal via
Specification
114.3 x 76.2 x t1.6
FR-4
2
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.070
-
(2) Board B
Item
Size [mm]
Material
Number of copper foil layer
Copper foil layer [mm]
Thermal via
1
2
3
4
Specification
114.3 x 76.2 x t1.6
FR-4
4
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
-
No. SOT23x-A-Board-SD-2.0
ABLIC Inc.
SNT-6A Test Board
(1) Board A
IC Mount Area
Item
Size [mm]
Material
Number of copper foil layer
Copper foil layer [mm]
1
2
3
4
Thermal via
Specification
114.3 x 76.2 x t1.6
FR-4
2
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.070
-
(2) Board B
Item
Size [mm]
Material
Number of copper foil layer
Copper foil layer [mm]
Thermal via
1
2
3
4
Specification
114.3 x 76.2 x t1.6
FR-4
4
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
-
No. SNT6A-A-Board-SD-1.0
ABLIC Inc.
2.9±0.2
1.9±0.2
6
0.95
4
5
1
2
3
+0.1
0.15 -0.05
0.95
0.35±0.15
No. MP006-A-P-SD-2.1
TITLE
SOT236-A-PKG Dimensions
No.
MP006-A-P-SD-2.1
ANGLE
UNIT
mm
ABLIC Inc.
4.0±0.1(10 pitches:40.0±0.2)
+0.1
ø1.5 -0
+0.2
ø1.0 -0
2.0±0.05
0.25±0.1
4.0±0.1
1.4±0.2
3.2±0.2
3 2 1
4 5 6
Feed direction
No. MP006-A-C-SD-3.1
TITLE
SOT236-A-Carrier Tape
No.
MP006-A-C-SD-3.1
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. MP006-A-R-SD-2.1
TITLE
SOT236-A-Reel
No.
MP006-A-R-SD-2.1
ANGLE
QTY
UNIT
mm
ABLIC Inc.
3,000
1.57±0.03
6
1
5
4
2
3
+0.05
0.08 -0.02
0.5
0.48±0.02
0.2±0.05
No. PG006-A-P-SD-2.1
TITLE
SNT-6A-A-PKG Dimensions
No.
PG006-A-P-SD-2.1
ANGLE
UNIT
mm
ABLIC Inc.
+0.1
ø1.5 -0
4.0±0.1
2.0±0.05
0.25±0.05
+0.1
1.85±0.05
ø0.5 -0
4.0±0.1
0.65±0.05
3 2 1
4
5 6
Feed direction
No. PG006-A-C-SD-2.0
TITLE
SNT-6A-A-Carrier Tape
No.
PG006-A-C-SD-2.0
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PG006-A-R-SD-1.0
SNT-6A-A-Reel
TITLE
No.
PG006-A-R-SD-1.0
ANGLE
QTY.
UNIT
mm
ABLIC Inc.
5,000
0.52
1.36
2
0.52
0.2 0.3
1.
2.
1
(0.25 mm min. / 0.30 mm typ.)
(1.30 mm ~ 1.40 mm)
0.03 mm
SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package ( 1.30 mm ~ 1.40 mm ).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1.
2.
(0.25 mm min. / 0.30 mm typ.)
(1.30 mm ~ 1.40 mm)
No. PG006-A-L-SD-4.1
TITLE
SNT-6A-A
-Land Recommendation
No.
PG006-A-L-SD-4.1
ANGLE
UNIT
mm
ABLIC Inc.
Disclaimers (Handling Precautions)
1.
All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2.
The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4.
Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5.
Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6.
When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7.
The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8.
The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9.
In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
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