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S-8250BAN-I6T1U

S-8250BAN-I6T1U

  • 厂商:

    ABLIC(艾普凌科)

  • 封装:

    SMD6

  • 描述:

    IC BATT PROT LI-ION 1CELL SNT-6A

  • 数据手册
  • 价格&库存
S-8250BAN-I6T1U 数据手册
S-8250B Series www.ablic.com www.ablicinc.com BATTERY PROTECTION IC FOR 1-CELL PACK © ABLIC Inc., 2013-2016 Rev.1.1_03 The S-8250B Series is a protection IC for 1-cell lithium-ion / lithium polymer rechargeable batteries and includes high-accuracy voltage detection circuits and delay circuits. The S-8250B Series is suitable for protecting 1-cell lithium-ion / lithium polymer rechargeable battery packs from overcharge, overdischarge and overcurrent. By adjusting power supply voltage dependency of discharge overcurrent detection voltage in accordance with ON resistance of the charge-discharge control FET, the S-8250B Series realizes high-accuracy discharge overcurrent detection.  Features  High-accuracy discharge overcurrent detection circuit Discharge overcurrent detection voltage 0.050 V to 0.150 V (1 mV step) Accuracy 10 mV (Ta = 25°C) (Power supply voltage dependency can be set in accordance with ON resistance of the charge-discharge control FET.)  High-accuracy voltage detection circuit Overcharge detection voltage 4.100 V to 4.600 V (5 mV step) Accuracy 20 mV (Ta = 25°C) Accuracy 25 mV (Ta = 10°C to 60°C) Overcharge release voltage 3.700 V to 4.600 V*1 Accuracy 30 mV Overdischarge detection voltage 2.000 V to 2.800 V (10 mV step) Accuracy 50 mV *2 Accuracy 100 mV Overdischarge release voltage 2.000 V to 3.000 V Load short-circuiting detection voltage 0.250 V to 0.500 V (50 mV step) Accuracy 50 mV Charge overcurrent detection voltage 0.200 V to 0.025 V (25 mV step) Accuracy 15 mV  Detection delay times are generated only by an internal circuit (External capacitors are unnecessary).  0 V battery charge function is selectable: Available, unavailable  Power-down function is selectable: Available, unavailable  Release condition of discharge overcurrent status is selectable: Load disconnection, charger connection  High-withstand voltage: VM pin and CO pin: Absolute maximum rating 28 V  Wide operation temperature range: Ta = 40°C to 85°C  Low current consumption During operation: 2.0 A typ., 4.0 A max. (Ta = 25°C) During power-down: 50 nA max. (Ta = 25°C)  Lead-free (Sn 100%), halogen-free *1. Overcharge release voltage = Overcharge detection voltage  Overcharge hysteresis voltage (Overcharge hysteresis voltage can be selected from a range of 0 V to 0.4 V in 50 mV step.) *2. Overdischarge release voltage = Overdischarge detection voltage  Overdischarge hysteresis voltage (Overdischarge hysteresis voltage can be selected from a range of 0 V to 0.7 V in 100 mV step.)  Applications  Lithium-ion rechargeable battery pack  Lithium polymer rechargeable battery pack  Package  SNT-6A 1 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Block Diagram VDD Overdischarge detection comparator DO Overcharge detection comparator VSS Discharge overcurrent detection comparator Control logic Delay circuit Load short-circuiting detection comparator VM Charge overcurrent detection comparator Remark All the diodes shown in the figure are parasitic diodes. Figure 1 2 Oscillator CO BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Product Name Structure 1. Product name S-8250B xx - I6T1 U Environmental code U: Lead-free (Sn 100%), halogen-free Package abbreviation and IC packing specifications I6T1: SNT-6A, Tape *1 *2 Serial code Sequentially set from AA to ZZ *1. Refer to the tape drawing. *2. Refer to "3. Product name list". 2. Package Table 1 Package Drawing Codes Package Name SNT-6A Dimension PG006-A-P-SD Tape PG006-A-C-SD Reel PG006-A-R-SD Land PG006-A-L-SD 3 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 3. Product name list 3. 1 SNT-6A Table 2 (1 / 2) Overcharge Detection Voltage [VCU] Overcharge Release Voltage [VCL] Overdischarge Detection Voltage [VDL] Overdischarge Release Voltage [VDU] Delay Time Combination*1 Function Combination*2 S-8250BAB-I6T1U S-8250BAC-I6T1U S-8250BAF-I6T1U S-8250BAK-I6T1U S-8250BAL-I6T1U S-8250BAM-I6T1U S-8250BAN-I6T1U S-8250BAS-I6T1U 4.425 V 4.415 V 4.425 V 4.425 V 4.425 V 4.475 V 4.470 V 4.280 V 4.225 V 4.215 V 4.225 V 4.225 V 4.225 V 4.275 V 4.220 V 4.280 V 2.500 V 2.500 V 2.300 V 2.300 V 2.500 V 2.500 V 2.300 V 2.800 V 2.900 V 2.900 V 2.500 V 2.500 V 2.800 V 2.900 V 2.300 V 2.800 V (1) (1) (1) (1) (2) (3) (4) (5) (2) (2) (1) (1) (1) (2) (3) (4) S-8250BAV-I6T1U 4.330 V 4.130 V 2.000 V 2.000 V (1) (2) Product Name Table 2 (2 / 2) Discharge Overcurrent Detection Voltage [VDIOV] VDD = 3.0 V VDD = 3.4 V VDD = 4.0 V S-8250BAB-I6T1U 0.134 V 0.125 V 0.115 V S-8250BAC-I6T1U 0.060 V 0.056 V 0.050 V S-8250BAF-I6T1U 0.072 V 0.069 V 0.066 V S-8250BAK-I6T1U 0.104 V 0.097 V 0.089 V S-8250BAL-I6T1U 0.061 V 0.060 V 0.057 V S-8250BAM-I6T1U 0.071 V 0.068 V 0.063 V S-8250BAN-I6T1U 0.113 V 0.108 V 0.100 V S-8250BAS-I6T1U 0.054 V 0.052 V 0.050 V S-8250BAV-I6T1U 0.110 V 0.100 V 0.091 V *1. Refer to Table 3 about the details of the delay time combinations. *2. Refer to Table 5 about the details of the function combinations. Product Name Load Short-circuiting Detection Voltage [VSHORT] Charge Overcurrent Detection Voltage [VCIOV] 0.300 V 0.700 V 0.225 V 0.225 V 0.250 V 0.200 V 0.500 V 0.500 V 0.300 V 0.100 V 0.050 V 0.040 V 0.055 V 0.055 V 0.050 V 0.075 V 0.100 V 0.050 V Remark Please contact our sales office for the products with detection voltage value other than those specified above. 4 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 Table 3 Delay Time Combination Overcharge Detection Delay Time [tCU] Overdischarge Detection Delay Time [tDL] Discharge Overcurrent Detection Delay Time [tDIOV] Load Short-circuiting Detection Delay Time [tSHORT] Charge Overcurrent Detection Delay Time [tCIOV] (1) (2) (3) (4) (5) 1.0 s 1.0 s 1.0 s 1.0 s 1.0 s 32 ms 64 ms 64 ms 32 ms 64 ms 8 ms 8 ms 16 ms 16 ms 16 ms 280 s 280 s 280 s 280 s 280 s 8 ms 8 ms 8 ms 16 ms 16 ms Remark The delay times can be changed within the range listed in Table 4. For details, please contact our sales office. Table 4 Delay Time Symbol Overcharge detection delay time Overdischarge detection delay time Discharge overcurrent detection delay time Load short-circuiting detection delay time Charge overcurrent detection delay time tCU tDL tDIOV tSHORT tCIOV Selection Range 256 ms 32 ms 8 ms 280 s*1 8 ms 512 ms 64 ms 16 ms*1 530 s 16 ms*1 Remark 1.0 s*1 128 ms*1 32 ms  32 ms Select a value from the left. Select a value from the left. Select a value from the left. Select a value from the left. Select a value from the left. *1. This value is the delay time of the standard products. Table 5 Function Combination (1) (2) (3) (4) 0 V Battery Charge Function*1 Available Unavailable Unavailable Available Power-down Function*2 Unavailable Unavailable Available Available Release Condition of Discharge Overcurrent Status*3 Load disconnection Load disconnection Load disconnection Load disconnection *1. 0 V battery charge function "available" / "unavailable" is selectable. *2. Power-down function "available" / "unavailable" is selectable. *3. Release condition of discharge overcurrent status "load disconnection" / "charger connection" is selectable. Remark Please contact our sales office for the products with function combinations other than those specified above. 5 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Pin Configuration 1. SNT-6A Table 6 Top view 1 2 3 6 5 4 Figure 2 Pin No. 1 2 CO 3 DO 4 5 VSS VDD 6 VM *1. NC pin is electrically open. NC pin can be connected to VDD pin or VSS pin. 6 Symbol NC*1 Description No connection Connection pin of charge control FET gate (CMOS output) Connection pin of discharge control FET gate (CMOS output) Input pin for negative power supply Input pin for positive power supply Voltage detection pin between VM pin and VSS pin (Overcurrent / charger detection pin) BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Absolute Maximum Ratings Table 7 (Ta = 25°C unless otherwise specified) Item Symbol Applied pin Absolute Maximum Rating Unit Input voltage between VDD pin and VSS pin VDS VDD VSS  0.3 to VSS  12 V VM pin input voltage VVM VM VDD  28 to VDD  0.3 V DO pin output voltage VDO DO VSS  0.3 to VDD  0.3 V CO pin output voltage Power dissipation Operation ambient temperature VCO PD Topr CO   VVM  0.3 to VDD  0.3 400*1 40 to 85 V mW C Storage temperature Tstg  55 to 125 C *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm  76.2 mm  t1.6 mm (2) Board name: JEDEC STANDARD51-7 The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 700 Power Dissipation (PD) [mW] Caution 600 500 400 300 200 100 0 0 50 100 150 Ambient Temperature (Ta) [C] Figure 3 Power Dissipation of Package (When Mounted on Board) 7 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Electrical Characteristics 1. Ta = 25°C Table 8 Item Symbol Condition Min. (Ta = 25°C unless otherwise specified) Test Typ. Max. Unit Circuit Detection Voltage  *1 Ta = 10°C to 60°C VCL  VCU VCL = VCU  VDL  VDU VDL = VDU VDD = 3.0 V VDD = 3.4 V VDD = 4.0 V  Overcharge detection voltage VCU Overcharge release voltage VCL Overdischarge detection voltage VDL Overdischarge release voltage VDU Discharge overcurrent detection voltage VDIOV Load short-circuiting detection voltage VSHORT Discharge overcurrent release voltage VRIOV  Charge overcurrent detection voltage 0 V Battery Charge Function VCIOV  0 V battery charge starting charger voltage V0CHA 0 V battery charge inhibition battery voltage V0INH 0 V battery charge function "available" 0 V battery charge function "unavailable" VCU  0.020 VCU  0.025 VCL  0.030 VCL  0.025 VDL  0.050 VDU  0.100 VDU  0.050 VDIOV  0.010 VDIOV  0.010 VDIOV  0.010 VSHORT  0.050 VCU VCU VCL VCL VDL VDU VDU VDIOV VDIOV VDIOV VSHORT VDD  VDD  1.2 0.8 VCIOV  0.015 VCIOV VCU  0.020 VCU  0.025 VCL  0.030 VCL  0.020 VDL  0.050 VDU  0.100 VDU  0.050 VDIOV  0.010 VDIOV  0.010 VDIOV  0.010 VSHORT  0.050 V V V V V V V V V V V 1 1 1 1 2 2 2 2 2 2 2 VDD  0.5 V 2 VCIOV  0.015 V 2 0.00 0.70 1.00 V 2 0.90 1.25 1.60 V 2 Internal Resistance Resistance between VM pin and VDD pin RVMD  500 1000 2000 k 3 Resistance between VM pin and VSS pin RVMS  10 20 40 k 3 Input Voltage Operation voltage between VDD pin and VDSOP1  1.5  6.5 V  VSS pin Operation voltage between VDD pin and VDSOP2  1.5  28 V  VM pin Input Current Current consumption during operation IOPE   2.0 4.0 A 3 Current consumption during power-down IPDN    50 nA 3 Current consumption during overdischarge IOPED    1.0 A 3 Output Resistance CO pin resistance "H" RCOH  5 10 20 k 4 CO pin resistance "L" RCOL  5 10 20 k 4 DO pin resistance "H" RDOH  5 10 20 k 4 DO pin resistance "L" RDOL  5 10 20 k 4 Delay Time Overcharge detection delay time tCU  tCU  0.8 tCU tCU  1.2 5  Overdischarge detection delay time tDL  tDL  0.8 tDL tDL  1.2 5  Discharge overcurrent detection delay time tDIOV  tDIOV  0.8 tDIOV tDIOV  1.2 5  Load short-circuiting detection delay time tSHORT  tSHORT  0.7 tSHORT tSHORT  1.3 5  Charge overcurrent detection delay time tCIOV  tCIOV  0.8 tCIOV tCIOV  1.2 5  *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. 8 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 2. Ta = 40°C to 85°C*1 Table 9 Item Detection Voltage Overcharge detection voltage Symbol Condition Min.  VCU  0.045 VCL  0.070 VCL  0.050 VDL  0.090 VDU  0.140 VDU  0.090    VCU VCL  VCU VCL = VCU Overcharge release voltage VCL Overdischarge detection voltage VDL Overdischarge release voltage VDU Discharge overcurrent detection voltage*2 VDIOV Load short-circuiting detection voltage VSHORT Discharge overcurrent release voltage VRIOV  Charge overcurrent detection voltage 0 V Battery Charge Function VCIOV  0 V battery charge starting charger voltage V0CHA 0 V battery charge inhibition battery voltage V0INH (Ta = 40°C to 85°C*1 unless otherwise specified)  VDL  VDU VDL = VDU VDD = 3.0 V VDD = 3.4 V VDD = 4.0 V  0 V battery charge function "available" 0 V battery charge function "unavailable" Typ. Max. VCU VCU  0.030 VCL VCL  0.040 VCL VCL  0.030 VDL VDL  0.060 VDU VDU  0.110 VDU VDU  0.060  VDIOV  VDIOV  VDIOV VSHORT  0.050 VSHORT VSHORT  0.050 VDD  VDD  0.3 VDD  1.4 0.8 VCIOV  0.015 VCIOV VCIOV  0.015 Unit Test Circuit V V V V V V V V V V 1 1 1 2 2 2 2 2 2 2 V 2 V 2 0.00 0.70 1.50 V 2 0.70 1.25 1.80 V 2 Internal Resistance Resistance between VM pin and VDD pin RVMD  250 1000 3000 k 3 Resistance between VM pin and VSS pin RVMS  7.2 20 44 k 3 Input Voltage Operation voltage between VDD pin and VDSOP1  1.5  6.5 V  VSS pin Operation voltage between VDD pin and VDSOP2  1.5  28 V  VM pin Input Current Current consumption during operation IOPE   2.0 4.5 A 3 Current consumption during power-down IPDN    100 nA 3 Current consumption during overdischarge IOPED    2.0 A 3 Output Resistance CO pin resistance "H" RCOH  2.5 10 30 k 4 CO pin resistance "L" RCOL  2.5 10 30 k 4 DO pin resistance "H" RDOH  2.5 10 30 k 4 DO pin resistance "L" RDOL  2.5 10 30 k 4 Delay Time Overcharge detection delay time tCU  tCU  0.6 tCU tCU  1.6 5  Overdischarge detection delay time tDL  tDL  0.6 tDL tDL  1.6 5  Discharge overcurrent detection delay time tDIOV  tDIOV  0.6 tDIOV tDIOV  1.6 5  Load short-circuiting detection delay time tSHORT  tSHORT  0.5 tSHORT tSHORT  1.7 5  Charge overcurrent detection delay time tCIOV  tCIOV  0.6 tCIOV tCIOV  1.6 5  *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. *2. The temperature characteristics of VDIOV is determined depending on the setting of VDIOV, and accords closely with the temperature characteristics of ON resistance of the charge-discharge control FET. Refer to "2. 5 VDIOV vs. Ta" in " Characteristics (Typical Data)" for details. 9 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Test Circuits Caution Unless otherwise specified, the output voltage levels "H" and "L" at CO pin (VCO) and DO pin (VDO) are judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to VVM and the DO pin level with respect to VSS. 1. Overcharge detection voltage, overcharge release voltage (Test circuit 1) Overcharge detection voltage (VCU) is defined as the voltage V1 at which VCO goes from "H" to "L" when the voltage V1 is gradually increased from the starting conditions of V1 = 3.4 V. Overcharge release voltage (VCL) is defined as the voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (VHC) is defined as the difference between VCU and VCL. 2. Overdischarge detection voltage, overdischarge release voltage (Test circuit 2) Overdischarge detection voltage (VDL) is defined as the voltage V1 at which VDO goes from "H" to "L" when the voltage V1 is gradually decreased from the starting conditions of V1 = 3.4 V, V2 = 0 V. Overdischarge release voltage (VDU) is defined as the voltage V1 at which VDO goes from "L" to "H" when the voltage V1 is then gradually increased from the starting condition of V2 = 0.02 V. Overdischarge hysteresis voltage (VHD) is defined as the difference between VDU and VDL. 3. Discharge overcurrent detection voltage (Test circuit 2) Discharge overcurrent detection voltage (VDIOV) is defined as the voltage V2 whose delay time for changing VDO from "H" to "L" is discharge overcurrent detection delay time (tDIOV) when the voltage V2 is increased from the starting conditions of V1 = 3.4 V, V2 = 0 V. 4. Discharge overcurrent release voltage (Release condition of discharge overcurrent status "load disconnection") (Test circuit 2) Set V1 = 3.4 V, V2 = 0 V. Discharge overcurrent release voltage (VRIOV) is defined as the voltage V2 at which VDO goes from "L" to "H" when the voltage V2 is then gradually decreased from the starting condition of V2 = 3.4 V. 5. Load short-circuiting detection voltage (Test circuit 2) Load short-circuiting detection voltage (VSHORT) is defined as the voltage V2 whose delay time for changing VDO from "H" to "L" is load short-circuiting detection delay time (tSHORT) when the voltage V2 is increased from the starting conditions of V1 = 3.4 V, V2 = 0 V. 6. Charge overcurrent detection voltage (Test circuit 2) Charge overcurrent detection voltage (VCIOV) is defined as the voltage V2 whose delay time for changing VCO from "H" to "L" is charge overcurrent detection delay time (tCIOV) when the voltage V2 is decreased from the starting conditions of V1 = 3.4 V, V2 = 0 V. 7. Current consumption during operation (Test circuit 3) The current consumption during operation (IOPE) is the current that flows through the VDD pin (IDD) under the set conditions of V1 = 3.4 V, V2 = 0 V. 10 Rev.1.1_03 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series 8. Current consumption during power-down, current consumption during overdischarge (Test circuit 3) 8. 1 With power-down function The current consumption during power-down (IPDN) is IDD under the set condition of V1 = V2 = 1.5 V. 8. 2 Without power-down function The current consumption during overdischarge (IOPED) is IDD under the set condition of V1 = V2 = 1.5 V. 9. Resistance between VM pin and VDD pin (Test circuit 3) Resistance between VM pin and VDD pin is RVMD under the set conditions of V1 = 1.8 V, V2 = 0 V. 10. Resistance between VM pin and VSS pin (Release condition of discharge overcurrent status "load disconnection") (Test circuit 3) Resistance between VM pin and VSS pin is RVMS under the set conditions of V1 = 3.4 V, V2 = 1.0 V. 11. CO pin resistance "H" (Test circuit 4) The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V, V2 = 0 V, V3 = 3.0 V. 12. CO pin resistance "L" (Test circuit 4) The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.6 V, V2 = 0 V, V3 = 0.4 V. 13. DO pin resistance "H" (Test circuit 4) The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V, V2 = 0 V, V4 = 3.0 V. 14. DO pin resistance "L" (Test circuit 4) The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V, V2 = 0 V, V4 = 0.4 V. 15. Overcharge detection delay time (Test circuit 5) The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" after the voltage V1 increases and exceeds VCU under the set conditions of V1 = 3.4 V, V2 = 0 V. 16. Overdischarge detection delay time (Test circuit 5) The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases and falls below VDL under the set conditions of V1 = 3.4 V, V2 = 0 V. 11 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 17. Discharge overcurrent detection delay time (Test circuit 5) tDIOV is the time needed for VDO to go to "L" after the voltage V2 increases and exceeds VDIOV under the set conditions of V1 = 3.4 V, V2 = 0 V. 18. Load short-circuiting detection delay time (Test circuit 5) tSHORT is the time needed for VDO to go to "L" after the voltage V2 increases and exceeds VSHORT under the set conditions of V1 = 3.4 V, V2 = 0 V. 19. Charge overcurrent detection delay time (Test circuit 5) tCIOV is the time needed for VCO to go to "L" after the voltage V2 decreases and falls below VCIOV under the set conditions of V1 = 3.4 V, V2 = 0 V. 20. 0 V battery charge starting charger voltage (0 V battery charge function "available") (Test circuit 2) The 0 V battery charge starting charger voltage (V0CHA) is defined as absolute value of the voltage V2 at which VCO goes to "H" (VCO = VDD) when the voltage V2 is gradually decreased under the set condition of V1 = V2 = 0 V. 21. 0 V battery charge inhibition battery voltage (0 V battery charge function "unavailable") (Test circuit 2) The 0 V battery charge inhibition battery voltage (V0INH) is defined as the voltage V1 at which VCO goes to "H" (VCO = VDD) when the voltage V1 is gradually increased under the set conditions of V1 = 0 V, V2 = 2.0 V. 12 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 R1 = 330  VDD VDD V1 S-8250B Series V1 C1 = 0.1 F VSS VM S-8250B Series VSS CO DO V VDO CO DO V VCO COM V VDO V2 V VCO COM Figure 4 Test Circuit 1 Figure 5 Test Circuit 2 IDD A VM VDD VDD V1 V1 S-8250B Series S-8250B Series VSS VSS VM DO CO VM CO DO IVM A V2 A IDO A ICO V4 V3 V2 COM COM Figure 6 Test Circuit 3 Figure 7 Test Circuit 4 VDD V1 S-8250B Series VSS VM DO Oscilloscope CO Oscilloscope V2 COM Figure 8 Test Circuit 5 13 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Operation Remark Refer to " Battery Protection IC Connection Example". 1. Normal status The S-8250B Series monitors the voltage of the battery connected between the VDD pin and VSS pin and the voltage between the VM pin and VSS pin to control charging and discharging. When the battery voltage is in the range from the overdischarge detection voltage (VDL) to the overcharge detection voltage (VCU), and the VM pin voltage is in the range from the charge overcurrent detection voltage (VCIOV) to the discharge overcurrent detection voltage (VDIOV), the S-8250B Series turns both the charge and discharge control FETs on. This condition is called the normal status, and in this condition charging and discharging can be carried out freely. The resistance between the VM pin and VDD pin (RVMD) and the resistance between the VM pin and VSS pin (RVMS) are not connected in the normal status. Caution When the battery is connected for the first time, the S-8250B Series may not be in the normal status. In this case, short the VM pin and VSS pin, or set the VM pin voltage at the level of VCIOV or more and at the level of VDIOV or less by connecting the charger. The S-8250B Series then becomes the normal status. 2. Overcharge status 2. 1 VCL  VCU (Product in which overcharge release voltage differs from overcharge detection voltage) When the battery voltage becomes higher than VCU during charging in the normal status and detection continues for the overcharge detection delay time (tCU) or longer, the S-8250B Series turns the charge control FET off to stop charging. This condition is called the overcharge status. The overcharge status is released in the following two cases. (1) In the case that the VM pin voltage is lower than VDIOV, the S-8250B Series releases the overcharge status when the battery voltage falls below overcharge release voltage (VCL). (2) In the case that the VM pin voltage is equal to or higher than VDIOV, the S-8250B Series releases the overcharge status when the battery voltage falls below VCU. When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by the Vf voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through the parasitic diode in the charge control FET. If this VM pin voltage is equal to or higher than VDIOV, the S-8250B Series releases the overcharge status when the battery voltage is equal to or lower than VCU. Caution If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below VCU even when a heavy load is connected, discharge overcurrent detection and load short-circuiting detection do not function until the battery voltage falls below VCU. Since an actual battery has an internal impedance of tens of m, the battery voltage drops immediately after a heavy load that causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting detection function. 2. 2 VCL = VCU (Product in which overcharge release voltage is the same as overcharge detection voltage) When the battery voltage becomes higher than VCU during charging in the normal status and detection continues for the overcharge detection delay time (tCU) or longer, the S-8250B Series turns the charge control FET off to stop charging. This condition is called the overcharge status. In the case that the VM pin voltage is higher than 0 V typ., the S-8250B Series releases the overcharge status when the battery voltage falls below VCU. Caution 1. If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below VCU even when a heavy load is connected, discharge overcurrent detection and load shortcircuiting detection do not function until the battery voltage falls below VCU. Since an actual battery has an internal impedance of tens of m, the battery voltage drops immediately after a heavy load that causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting detection function. 2. When a charger is connected after overcharge detection, the overcharge status is not released even if the battery voltage is below VCL. The overcharge status is released when the VM pin voltage goes over 0 V typ. by removing the charger. 14 Rev.1.1_03 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series 3. Overdischarge status When the battery voltage falls below VDL during discharging in the normal status and the condition continues for the overdischarge detection delay time (tDL) or longer, the S-8250B Series turns the discharge control FET off to stop discharging. This condition is called the overdischarge status. Under the overdischarge status, VDD pin and VM pin are shorted by RVMD in the S-8250B Series. The VM pin voltage is pulled up by RVMD. RVMS is not connected in the overdischarge status. 3. 1 With power-down function Under the overdischarge status, when voltage difference between VDD pin and VM pin is 0.8 V typ. or lower, the power-down function works and the current consumption is reduced to the current consumption during powerdown (IPDN). By connecting a battery charger, the power-down function is released when the VM pin voltage is 0.7 V typ. or lower.  When a battery is not connected to a charger and the VM pin voltage 0.7 V typ., the S-8250B Series maintains the overdischarge status even when the battery voltage reaches VDU or higher.  When a battery is connected to a charger and 0.7 V typ.the VM pin voltage 0 V typ., the battery voltage reaches VDU or higher and the S-8250B Series releases the overdischarge status.  When a battery is connected to a charger and 0 V typ.the VM pin voltage, the battery voltage reaches VDL or higher and the S-8250B Series releases the overdischarge status. 3. 2 Without power-down function Under the overdischarge status, the power-down function does not work even when voltage difference between VDD pin and VM pin is 0.8 V typ. or lower.  When a battery is not connected to a charger and the VM pin voltage 0.7 V typ., the battery voltage reaches VDU or higher and the S-8250B Series releases the overdischarge status.  When a battery is connected to a charger and 0.7 V typ.the VM pin voltage 0 V typ., the battery voltage reaches VDU or higher and the S-8250B Series releases the overdischarge status.  When a battery is connected to a charger and 0 V typ.the VM pin voltage, the battery voltage reaches VDL or higher and the S-8250B Series releases the overdischarge status. 4. Discharge overcurrent status (Discharge overcurrent, load short-circuiting) When a battery in the normal status is in the status where the VM pin voltage is equal to or higher than VDIOV because the discharge current is equal to or higher than the specified value and the status lasts for the discharge overcurrent detection delay time (tDIOV) or longer, the discharge control FET is turned off and discharging is stopped. This status is called the discharge overcurrent status. 4. 1 Release condition of discharge overcurrent status "load disconnection" In the discharge overcurrent status, the VM pin and VSS pin are shorted by RVMS in the S-8250B Series. However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected. When the load is disconnected, the VM pin voltage returns to the VSS pin voltage. If the VM pin voltage returns to the discharge overcurrent release voltage (VRIOV) or lower, the S-8250B Series releases the discharge overcurrent status. RVMD is not connected in the discharge overcurrent status. 4. 2 Release condition of discharge overcurrent status "charger connection" In the discharge overcurrent status, the VM pin and VDD pin are shorted by RVMD in the S-8250B Series. If the VM pin voltage returns to VDIOV or lower by connecting a charger, the S-8250B Series releases the discharge overcurrent status. RVMS is not connected in the discharge overcurrent status. 5. Charge overcurrent status When a battery in the normal status is in the status where the VM pin voltage is equal to or lower than VCIOV because the charge current is equal to or higher than the specified value and the status lasts for the charge overcurrent detection delay time (tCIOV) or longer, the charge control FET is turned off and charging is stopped. This status is called the charge overcurrent status. The S-8250B Series releases the charge overcurrent status when the VM pin voltage returns to 0 V typ. or higher by removing the charger. The charge overcurrent detection does not function in the overdischarge status. 15 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 6. 0 V battery charge function "available" This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB pin and EB pin by connecting a charger, the charge control FET gate is fixed to the VDD pin voltage. When the voltage between the gate and source of the charge control FET becomes equal to or higher than the threshold voltage due to the charger voltage, the charge control FET is turned on to start charging. At this time, the discharge control FET is off and the charge current flows through the internal parasitic diode in the discharge control FET. When the battery voltage becomes equal to or higher than VDU, the S-8250B Series enters the normal status. Caution 1. Some battery providers do not recommend charging for a completely self-discharged battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function. 2. The 0 V battery charge function has higher priority than the charge overcurrent detection function. Consequently, a product in which use of the 0 V battery charge function is enabled charges a battery forcibly and the charge overcurrent cannot be detected when the battery voltage is lower than VDL. 7. 0 V battery charge function "unavailable" This function inhibits recharging when a battery that is internally short-circuited (0 V battery) is connected. When the battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charge control FET gate is fixed to the EB pin voltage to inhibit charging. When the battery voltage is V0INH or higher, charging can be performed. Caution Some battery providers do not recommend charging for a completely self-discharged battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function. 8. Delay circuit The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter. Remark tDIOV and tSHORT start when VDIOV is detected. When VSHORT is detected over tSHORT after VDIOV, the S-8250B Series turns the discharge control FET off within tSHORT from the time of detecting VSHORT. VDD DO pin voltage tD VSS VDD tSHORT 0  tD  tSHORT Time VSHORT VM pin voltage VDIOV VSS Time Figure 9 16 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Timing Chart 1. Overcharge detection, overdischarge detection VCU VCL (VCU  VHC) Battery voltage VDU (VDL  VHD) VDL VDD DO pin voltage VSS VDD CO pin voltage VSS VEB VDD VM pin voltage VDIOV VSS VCIOV VEB Charger connection Load connection Overcharge detection delay time (tCU) Status *1 (1) Overdischarge detection delay time (tDL) (2) (1) (3) (1) *1. (1): Normal status (2): Overcharge status (3): Overdischarge status Remark The charger is assumed to charge with a constant current. Figure 10 17 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 2. Discharge overcurrent detection 2. 1 Release condition of discharge overcurrent status "load disconnection" VCU VCL (VCU VHC) Battery voltage VDU (VDL VHD) VDL VDD DO pin voltage VSS VDD CO pin voltage VSS VM pin voltage VDD VRIOV VSHORT VDIOV VSS Load connection Discharge overcurrent detection delay time (tDIOV) Status *1 (1) (2) Load short-circuiting detection delay time (tSHORT) (1) *1. (1): Normal status (2): Discharge overcurrent status Remark The charger is assumed to charge with a constant current. Figure 11 18 (2) (1) BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 2. 2 Release condition of discharge overcurrent status "charger connection" VCU VCL (VCU  VHC) Battery voltage VDU (VDL  VHD) VDL VDD DO pin voltage VSS VDD CO pin voltage VSS VDD VM pin voltage VSHORT VDIOV VSS VCIOV VEB Charger connection Load connection Status*1 Load short-circuiting detection delay time (tSHORT) Discharge overcurrent detection delay time (tDIOV) (1) (2) (1) (2) (1) *1. (1): Normal status (2): Discharge overcurrent status Remark The charger is assumed to charge with a constant current. Figure 12 19 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 3. Charge overcurrent detection VCU VCL (VCUVHC ) Battery voltage VDU (VDLVHD) VDL VDD DO pin voltage VSS VDD CO pin voltage VSS VEB VDD VM pin voltage VSS VCIOV VEB Charger connection Load connection Charge overcurrent detection delay time (tCIOV) Status *1 (1) (2) *1. (1): Normal status (2): Charge overcurrent status (3): Overdischarge status Remark The charger is assumed to charge with a constant current. Figure 13 20 Overdischarge detection Charge overcurrent detection delay time (tDL) delay time (tCIOV) (1) (3) (1) (2) BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Battery Protection IC Connection Example EB R1 VDD Battery C1 S-8250B Series VSS DO CO FET1 VM FET2 R2 EB Figure 14 Table 10 Constants for External Components Symbol Part Purpose Min. Typ. FET1 N-channel MOS FET Discharge control   FET2 N-channel MOS FET Charge control   R1 Resistor ESD protection, For power fluctuation 150  330  C1 Capacitor For power fluctuation 0.068 F 0.1 F *2. *3. *4. *5. Remark Threshold voltage  Overdischarge *1 detection voltage  Gate to source withstand voltage  *2 Charger voltage Threshold voltage  Overdischarge detection voltage *1  Gate to source withstand voltage  *2 Charger voltage Resistance should be as small as possible to avoid worsening the 510  overcharge detection accuracy due to current consumption.*3 Connect a capacitor of 0.068 F or 1.0 F higher between VDD pin and VSS pin.*4 Select as large a resistance as possible 4 k to prevent current when a charger is *5 connected in reverse. charge current. If a FET with a threshold voltage equal discharging may be stopped before overdischarge is Protection for reverse connection of a 1 k 2 k charger If the threshold voltage of a FET is low, the FET may not cut the to or higher than the overdischarge detection voltage is used, detected. If the withstand voltage between the gate and source is lower than the charger voltage, the FET may be destroyed. An accuracy of overcharge detection voltage is guaranteed by R1 = 330 . Connecting resistors with other values worsen the accuracy. In case of connecting a larger resistor to R1, the voltage between the VDD pin and VSS pin may exceed the absolute maximum rating because the current flows to the S-8250B Series from the charger due to reverse connection of charger. Connect a resistor of 150  or more to R1 for ESD protection. When connecting a resistor less than 150  to R1 or a capacitor less than 0.068 F to C1, the S-8250B Series may malfunction when power dissipation is largely fluctuated. When a resistor more than 4 k is connected to R2, the charge current may not be cut. R2 *1. Max. Resistor Caution 1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constant. 21 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Precautions  The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation.  Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit.  ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 22 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Characteristics (Typical Data) 1. Current consumption 1. 2 IOPE vs. VDD 6 6 5 5 4 4 IOPE [μA] IOPE [μA] 1. 1 IOPE vs. Ta 3 2 1 0 3 2 1 −40 −25 0 0 25 Ta [°C] 50 75 85 0 25 Ta [°C] 50 75 85 1.5 2.5 3.5 4.5 VDD [V] 5.5 6.5 1. 3 IPDN vs. Ta 100 IPDN [nA] 75 50 25 0 2. Detection voltage 2. 2 VCL vs. Ta 4.32 4.22 4.30 4.20 4.28 4.18 VCL [V] VCU [V] 2. 1 VCU vs. Ta 4.26 4.24 4.14 4.22 −40 −25 4.12 0 25 Ta [°C] 50 75 85 2. 3 VDL vs. Ta 2.40 2.40 2.35 2.35 2.30 2.25 2.20 −40 −25 0 25 Ta [°C] 50 75 85 0 25 Ta [°C] 50 75 85 2. 4 VDU vs. Ta VDU [V] VDL [V] 4.16 2.30 2.25 −40 −25 2.20 0 25 Ta [°C] 50 75 85 −40 −25 23 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series VDD = 3.4 V 2. 6 VDIOV vs. VDD 0.16 0.16 0.14 0.14 VDIOV [V] VDIOV [V] 2. 5 VDIOV vs. Ta Rev.1.1_03 0.12 0.10 0.08 0.12 0.10 0.08 −40 −25 0 25 Ta [°C] 50 2.0 75 85 2.5 3.0 3.5 VDD [V] 4.0 4.5 n=1~3 0.550 0.550 0.525 0.525 VSHORT [V] 2. 8 VSHORT vs. VDD VSHORT [V] 2. 7 VSHORT vs. Ta 0.500 0.475 0.450 −40 −25 0 25 Ta [°C] 50 −0.090 −0.090 −0.095 −0.095 VCIOV [V] VCIOV [V] −0.085 −0.100 −0.105 −0.115 −40 −25 2.5 3.0 3.5 VDD [V] 4.0 4.5 2.5 3.0 3.5 VDD [V] 4.0 4.5 2. 10 VCIOV vs. VDD −0.085 −0.110 24 0.475 0.450 2.0 75 85 2. 9 VCIOV vs. Ta 0.500 −0.100 −0.105 −0.110 0 25 Ta [°C] 50 75 85 −0.115 2.0 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 3. Delay time 3. 1 tCU vs. Ta 3. 2 tDL vs. Ta 225 1600 200 tDL [ms] tCU [ms] 1350 1100 850 600 150 125 100 75 −40 −25 0 25 Ta [°C] 50 75 85 3. 3 tDIOV vs. Ta 55 55 45 45 35 25 15 −40 −25 −40 −25 15 0 25 Ta [°C] 50 75 85 2.0 400 350 350 tSHORT [μs] 450 400 tSHORT [μs] 450 300 250 200 2.5 3.0 3.5 VDD [V] 4.0 4.5 2.5 3.0 3.5 VDD [V] 4.0 4.5 2.5 3.0 3.5 VDD [V] 4.0 4.5 300 250 200 −40 −25 150 0 25 Ta [°C] 50 75 85 3. 7 tCIOV vs. Ta 2.0 3. 8 tCIOV vs. VDD 14 14 12 12 tCIOV [ms] tCIOV [ms] 75 85 50 25 3. 6 tSHORT vs. VDD 10 8 10 8 6 6 4 25 Ta [°C] 35 3. 5 tSHORT vs. Ta 150 0 3. 4 tDIOV vs. VDD tDIOV [ms] tDIOV [ms] 175 4 −40 −25 0 25 Ta [°C] 50 75 85 2.0 25 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03 4. Output resistance 4. 2 RCOL vs. VCO 20 15 RCOL [kΩ] RCOH [kΩ] 4. 1 RCOH vs. VCO 20 10 5 15 10 5 0 1 2 3 4 0 1 VCO [V] 20 20 15 15 10 5 10 5 5 0 1 2 VDO [V] 26 4 4. 4 RDOL vs. VDO RDOL [kΩ] RDOH [kΩ] 4. 3 RDOH vs. VDO 2 3 VCO [V] 3 4 0 0.5 1.0 VDO [V] 1.5 2.0 BATTERY PROTECTION IC FOR 1-CELL PACK S-8250B Series Rev.1.1_03  Marking Specification 1. SNT-6A Top view 6 5 (1) to (3): (4) to (6): 4 Product code (refer to Product name vs. Product code) Lot number (1) (2) (3) (4) (5) (6) 1 2 3 Product name vs. Product code Product Name S-8250BAB-I6T1U S-8250BAC-I6T1U S-8250BAF-I6T1U S-8250BAK-I6T1U S-8250BAL-I6T1U S-8250BAM-I6T1U S-8250BAN-I6T1U S-8250BAS-I6T1U S-8250BAV-I6T1U (1) 4 4 4 4 4 4 4 4 4 Product Code (2) O O O O O O O O O (3) B C F K L M N S V 27 1.57±0.03 6 1 5 4 2 3 +0.05 0.08 -0.02 0.5 0.48±0.02 0.2±0.05 No. PG006-A-P-SD-2.1 TITLE SNT-6A-A-PKG Dimensions No. PG006-A-P-SD-2.1 ANGLE UNIT mm ABLIC Inc. +0.1 ø1.5 -0 4.0±0.1 2.0±0.05 0.25±0.05 +0.1 1.85±0.05 ø0.5 -0 4.0±0.1 0.65±0.05 3 2 1 4 5 6 Feed direction No. PG006-A-C-SD-2.0 TITLE SNT-6A-A-Carrier Tape No. PG006-A-C-SD-2.0 ANGLE UNIT mm ABLIC Inc. 12.5max. 9.0±0.3 Enlarged drawing in the central part ø13±0.2 (60°) (60°) No. PG006-A-R-SD-1.0 SNT-6A-A-Reel TITLE No. PG006-A-R-SD-1.0 ANGLE QTY. UNIT mm ABLIC Inc. 5,000 0.52 1.36 2 0.52 0.2 0.3 1. 2. 1 (0.25 mm min. / 0.30 mm typ.) (1.30 mm ~ 1.40 mm) 0.03 mm SNT 1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.). 2. Do not widen the land pattern to the center of the package ( 1.30 mm ~ 1.40 mm ). Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package. 2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm or less from the land pattern surface. 3. Match the mask aperture size and aperture position with the land pattern. 4. Refer to "SNT Package User's Guide" for details. 1. 2. (0.25 mm min. / 0.30 mm typ.) (1.30 mm ~ 1.40 mm) No. PG006-A-L-SD-4.1 TITLE SNT-6A-A -Land Recommendation No. PG006-A-L-SD-4.1 ANGLE UNIT mm ABLIC Inc. Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com
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