S-8200A Series
www.ablic.com
www.ablicinc.com
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.0_03
© ABLIC Inc., 2010-2015
The S-8200A Series is a protection IC for lithium-ion / lithium polymer rechargeable batteries and includes high-accuracy
voltage detection circuits and delay circuits.
The S-8200A Series is suitable for protecting 1-cell lithium-ion / lithium polymer rechargeable battery packs from overcharge,
overdischarge, and overcurrent.
Features
High-accuracy voltage detection circuit
Overcharge detection voltage
Accuracy 20 mV (Ta = 25°C)
Accuracy 25 mV (Ta = 10°C to 60°C)
Overcharge release voltage
3.1 V to 4.5 V*1
Accuracy 30 mV
Overdischarge detection voltage
2.0 V to 3.4 V (10 mV step)
Accuracy 35 mV
*2
Accuracy 50 mV
Overdischarge release voltage
2.0 V to 3.4 V
Discharge overcurrent detection voltage
0.05 V to 0.20 V (10 mV step)
Accuracy 10 mV
Charge overcurrent detection voltage
0.20 V to 0.05 V (25 mV step) Accuracy 15 mV
Detection delay times are generated only by an internal circuit (external capacitors are unnecessary).
Accuracy 20%
High-withstand voltage (VM pin and CO pin: Absolute maximum rating = 28 V)
0 V battery charge function "available" / "unavailable" is selectable.
Power-down function "available" / "unavailable" is selectable.
Wide operation temperature range
Ta = 40°C to 85°C
Low current consumption
During operation
2.8 A typ., 5.0 A max. (Ta = 25°C)
During power-down
0.1 A max. (Ta = 25°C)
Lead-free (Sn 100%), halogen-free
3.5 V to 4.5 V (5 mV step)
*1. Overcharge release voltage = Overcharge detection voltage Overcharge hysteresis voltage
(Overcharge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.4 V in 50 mV step.)
*2. Overdischarge release voltage = Overdischarge detection voltage Overdischarge hysteresis voltage
(Overdischarge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV step.)
Applications
Lithium-ion rechargeable battery pack
Lithium polymer rechargeable battery pack
Packages
SOT-23-6
SNT-6A
1
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Block Diagram
Output control circuit
0 V battery charge /
charge inhibition circuit
DO
Divider control
circuit
Oscillator control
circuit
VDD
Charger detection circuit
CO
Overcharge
detection
comparator
Discharge overcurrent detection
comparator
RVMD
VM
RVMS
Charge overcurrent detection
comparator
Load short-circuiting detection
comparator
Remark All diodes shown in figure are parasitic diodes.
Figure 1
2
Overdischarge
detection
comparator
VSS
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Product Name Structure
1. Product name
S-8200A xx
-
xxxx
U
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications
M6T1: SOT-23-6, Tape
I6T1: SNT-6A, Tape
*1
*2
Serial code
Sequentially set from AA to ZZ
*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".
2. Packages
Table 1 Package Drawing Codes
Package Name
SOT-23-6
SNT-6A
Dimension
MP006-A-P-SD
PG006-A-P-SD
Tape
MP006-A-C-SD
PG006-A-C-SD
Reel
MP006-A-R-SD
PG006-A-R-SD
Land
PG006-A-L-SD
3
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
3. Product name list
3. 1 SOT-23-6
Table 2
Product Name
Discharge Load shortOverOverOverOvercharge
charge discharge discharge Overcurrent circuiting
Detection
Detection Release Detection Release
Detection
Voltage
Voltage Voltage Voltage
Voltage
Voltage
[VDIOV]
[VSHORT]
[VCU]
[VCL]
[VDL]
[VDU]
S-8200AAC-M6T1U 4.225 V 4.025 V 2.500 V
2.900 V
0.150 V
S-8200AAH-M6T1U 4.375 V 4.175 V 2.300 V
2.300 V
0.130 V
S-8200AAY-M6T1U 4.150 V 4.050 V 2.500 V
2.800 V
0.160 V
S-8200ABE-M6T1U 4.200 V 4.000 V 3.200 V
3.400 V
0.150 V
S-8200ABM-M6T1U 4.280 V 4.180 V 2.300 V
2.300 V
0.130 V
S-8200ABX-M6T1U 4.280 V 4.280 V 2.500 V
2.500 V
0.050 V
S-8200ABZ-M6T1U 4.280 V 4.080 V 3.000 V
3.000 V
0.190 V
S-8200ACF-M6T1U 4.350 V 4.000 V 2.400 V
3.000 V
0.200 V
S-8200ACV-M6T1U 4.350 V 4.150 V 2.400 V
2.500 V
0.100 V
S-8200ACW-M6T1U 4.350 V 4.150 V 2.400 V
2.500 V
0.085 V
*1. Refer to Table 4 about the details of the delay time combinations.
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
Charge
Overcurrent
Detection
Voltage
[VCIOV]
0.150 V
0.100 V
0.100 V
0.100 V
0.125 V
0.050 V
0.075 V
0.100 V
0.100 V
0.100 V
Delay
0 V Battery
Time
Charge
*1
Function Combination
Available
Available
Available
Unavailable
Unavailable
Available
Available
Available
Unavailable
Unavailable
(1)
(2)
(1)
(2)
(1)
(1)
(2)
(3)
(1)
(1)
Powerdown
Function
Unavailable
Available
Unavailable
Available
Available
Available
Available
Available
Available
Available
3. 2 SNT-6A
Table 3
Product Name
Discharge Load shortOverOverOverOvercharge
charge discharge discharge Overcurrent circuiting
Detection
Detection Release Detection Release
Detection
Voltage
Voltage Voltage Voltage
Voltage
Voltage
[VDIOV]
[VCU]
[VCL]
[VDL]
[VDU]
[VSHORT]
S-8200AAA-I6T1U
4.225 V 4.025 V 2.500 V
2.900 V
0.150 V
S-8200AAB-I6T1U
4.250 V 4.050 V 2.400 V
2.900 V
0.050 V
S-8200AAC-I6T1U
4.225 V 4.025 V 2.500 V
2.900 V
0.150 V
S-8200AAD-I6T1U
4.275 V 4.075 V 2.600 V
2.600 V
0.120 V
S-8200AAF-I6T1U
4.225 V 4.025 V 2.800 V
2.800 V
0.150 V
S-8200AAG-I6T1U
4.275 V 4.075 V 2.600 V
2.600 V
0.180 V
S-8200AAH-I6T1U
4.375 V 4.175 V 2.300 V
2.300 V
0.130 V
S-8200ABA-I6T1U
4.425 V 4.225 V 2.300 V
2.300 V
0.165 V
S-8200ABI-I6T1U
4.275 V 4.175 V 2.300 V
2.400 V
0.025 V
S-8200ABK-I6T1U
3.500 V 3.400 V 2.500 V
2.800 V
0.100 V
S-8200ABL-I6T1U
4.390 V 4.190 V 2.500 V
2.500 V
0.130 V
S-8200ABM-I6T1U
4.280 V 4.180 V 2.300 V
2.300 V
0.130 V
S-8200ACN-I6T1U
4.275 V 4.075 V 2.800 V
2.800 V
0.200 V
S-8200ACO-I6T1U
4.320 V 4.120 V 2.800 V
2.800 V
0.220 V
S-8200ACP-I6T1U
4.390 V 4.290 V 2.700 V
2.700 V
0.130 V
S-8200ACQ-I6T1U
4.420 V 4.220 V 2.600 V
2.600 V
0.120 V
S-8200ACR-I6T1U
4.280 V 4.180 V 2.300 V
2.300 V
0.120 V
*1. Refer to Table 4 about the details of the delay time combinations.
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.175 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
0.500 V
Charge
Overcurrent
Detection
Voltage
[VCIOV]
0.150 V
0.100 V
0.150 V
0.100 V
0.150 V
0.125 V
0.100 V
0.100 V
0.050 V
0.100 V
0.125 V
0.125 V
0.150 V
0.200 V
0.125 V
0.125 V
0.100 V
Delay
0 V Battery
Time
Charge
*1
Function Combination
Unavailable
Unavailable
Available
Available
Unavailable
Available
Available
Unavailable
Available
Available
Unavailable
Unavailable
Available
Unavailable
Unavailable
Available
Unavailable
(1)
(1)
(1)
(2)
(1)
(2)
(2)
(2)
(4)
(2)
(1)
(1)
(4)
(5)
(2)
(6)
(6)
Remark Please contact our sales office for the products with detection voltage value other than those specified above.
4
Powerdown
Function
Available
Available
Unavailable
Available
Available
Available
Available
Available
Available
Available
Available
Available
Available
Available
Available
Available
Available
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Table 4
Delay Time
Combination
Overcharge
Detection
Delay Time
[tCU]
Overdischarge
Detection
Delay Time
[tDL]
Discharge Overcurrent
Detection
Delay Time
[tDIOV]
Load Short-circuiting
Detection
Delay Time
[tSHORT]
Charge Overcurrent
Detection
Delay Time
[tCIOV]
(1)
(2)
(3)
(4)
(5)
(6)
1.0 s
1.0 s
256 ms
1.0 s
1.0 s
1.0 s
64 ms
32 ms
32 ms
128 ms
128 ms
128 ms
8 ms
8 ms
8 ms
8 ms
16 ms
16 ms
250 s
250 s
250 s
250 s
500 s
250 s
8 ms
8 ms
16 ms
8 ms
16 ms
8 ms
Remark The delay times can be changed within the range listed in Table 5. For details, please contact our sales office.
Table 5
Delay Time
Symbol
Selection Range
Overcharge detection delay time
Overdischarge detection delay time
tCU
tDL
256 ms
32 ms
512 ms
64 ms*1
Discharge overcurrent detection delay time
Load short-circuiting detection delay Time
Charge overcurrent detection delay time
tDIOV
tSHORT
tCIOV
4 ms
250 s*1
8 ms*1
4 ms
500 s
8 ms*1
Remark
1.0 s
*1
128 ms
Select a value from the left.
Select a value from the left.
16 ms
1 ms
Select a value from the left.
Select a value from the left.
16 ms
Select a value from the left.
*1. This value is the delay time of the standard product.
5
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Pin Configurations
1.
SOT-23-6
Table 6
Top view
Pin No.
6 5 4
Symbol
1
DO
2
VM
3
CO
4
5
6
NC*1
VDD
VSS
1 2 3
Figure 2
Description
Connection pin of discharge control FET gate
(CMOS output)
Voltage detection pin between VM pin and VSS pin
(Overcurrent / charger detection pin)
Connection pin of charge control FET gate
(CMOS output)
No connection
Input pin for positive power supply
Input pin for negative power supply
*1. The NC pin is electrically open.
The NC pin can be connected to VDD pin or VSS pin.
2.
SNT-6A
Top view
1
2
3
Table 7
6
5
4
Figure 3
Pin No.
1
Symbol
NC*1
2
CO
3
DO
4
5
VSS
VDD
6
VM
*1. The NC pin is electrically open.
The NC pin can be connected to VDD pin or VSS pin.
6
Description
No connection
Connection pin of charge control FET gate
(CMOS output)
Connection pin of discharge control FET gate
(CMOS output)
Input pin for negative power supply
Input pin for positive power supply
Voltage detection pin between VM pin and VSS pin
(Overcurrent / charger detection pin)
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Absolute Maximum Ratings
Table 8
(Ta = 25°C unless otherwise specified)
Item
Symbol
Applied Pin
Absolute Maximum Rating
Unit
VSS 0.3 to VSS 12
V
VM
VDD 28 to VDD 0.3
V
DO
VSS 0.3 to VDD 0.3
V
VVM 0.3 to VDD 0.3
*1
650
400*1
40 to 85
V
mW
mW
C
55 to 125
C
Input voltage between VDD pin and VSS pin
VDS
VDD
VM pin input voltage
VVM
DO pin output voltage
VDO
CO pin output voltage
VCO
CO
SOT-23-6
Power dissipation
SNT-6A
Operation ambient temperature
Topr
Storage temperature
Tstg
PD
*1. When mounted on board
[Mounted board]
(1) Board size: 114.3 mm 76.2 mm t1.6 mm
(2) Board name: JEDEC STANDARD51-7
The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
700
Power Dissipation (PD) [mW]
Caution
SOT-23-6
600
500
SNT-6A
400
300
200
100
0
0
50
100
150
Ambient Temperature (Ta) [C]
Figure 4 Power Dissipation of Package (When Mounted on Board)
7
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Electrical Characteristics
1. Ta = 25°C
Table 9
Item
Symbol
(Ta = 25°C unless otherwise specified)
Test
Min.
Typ.
Max.
Unit
Circuit
Condition
Detection Voltage
Overcharge detection voltage
VCU
Overcharge release voltage
VCL
Overdischarge detection voltage
VDL
Overdischarge release voltage
VDU
Discharge overcurrent detection voltage
Load short-circuiting detection voltage
Charge overcurrent detection voltage
0 V Battery Charge Function
VDIOV
VSHORT
VCIOV
0 V battery charge starting charger voltage V0CHA
0 V battery charge inhibition battery
V0INH
voltage
Internal Resistance
Resistance between VM pin and VDD pin RVMD
Resistance between VM pin and VSS pin RVMS
Input Voltage
Operation voltage between VDD pin and
VDSOP1
VSS pin
Operation voltage between VDD pin and
VDSOP2
VM pin
Input Current (With Power-down Function)
IOPE
Current consumption during operation
Current consumption during power-down IPDN
Input Current (Without Power-down Function)
IOPE
Current consumption during operation
Current consumption during overdischarge IOPED
*1
Ta = 10°C to 60°C
VCL VCU
VCL = VCU
VDL VDU
VDL = VDU
0 V battery charge function
"available"
0 V battery charge function
"unavailable"
VCU 0.020
VCU 0.025
VCU
VCU
VCU 0.020
VCU 0.025
V
V
1
1
VCL 0.030
VCL
VCL 0.030
V
1
VCL 0.025
VDL 0.035
VDU 0.050
VCL
VDL
VDU
VCL 0.020
VDL 0.035
VDU 0.050
V
V
V
1
2
2
V
V
V
V
2
2
2
2
VDU 0.035
VDU
VDU 0.035
VDIOV 0.010 VDIOV VDIOV 0.010
VSHORT 0.100 VSHORT VSHORT 0.100
VCIOV 0.015 VCIOV VCIOV 0.015
0.0
0.7
1.0
V
2
0.6
0.8
1.1
V
2
100
10
300
20
900
40
k
k
3
3
1.5
6.5
V
1.5
28
V
VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
1.0
2.8
5.0
0.1
A
A
2
VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
1.0
2.8
5.0
3.5
A
A
2
5
10
20
k
4
5
10
20
k
4
5
10
20
k
4
5
10
20
k
4
tCU 0.8
tDL 0.8
tDIOV 0.8
tSHORT 0.8
tCIOV 0.8
tCU
tDL
tCU1.2
tDL1.2
tDIOV1.2
tSHORT 1.2
tCIOV1.2
5
5
5
5
5
VDD = 1.8 V, VVM = 0 V
VDD = 3.4 V, VVM = 1.0 V
2
2
Output Resistance
CO pin resistance "H"
RCOH
CO pin resistance "L"
RCOL
DO pin resistance "H"
RDOH
DO pin resistance "L"
RDOL
Delay Time
Overcharge detection delay time
Overdischarge detection delay time
Discharge overcurrent detection delay time
Load short-circuiting detection delay time
Charge overcurrent detection delay time
tCU
tDL
tDIOV
tSHORT
tCIOV
VCO = 3.0 V, VDD = 3.4 V,
VVM = 0 V
VCO = 0.4 V, VDD = 4.6 V,
VVM = 0 V
VDO = 3.0 V, VDD = 3.4 V,
VVM = 0 V
VDO = 0.4 V, VDD = 1.8 V,
VVM = 0 V
tDIOV
tSHORT
tCIOV
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
8
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
2. Ta = 40°C to 85°C*1
Table 10
Item
Detection Voltage
Overcharge detection voltage
Symbol
Condition
Min.
Typ.
Max.
Unit
Test
Circuit
VCU 0.045
VCL 0.070
VCU
VCL
VCU 0.030
VCL 0.040
V
V
1
1
VCL 0.050
VDL 0.070
VDU 0.090
VCL
VDL
VDU
VCL 0.030
VDL 0.045
VDU 0.060
V
V
V
1
2
2
V
V
V
V
2
2
2
2
VCU
Overcharge release voltage
VCL
Overdischarge detection voltage
VDL
Overdischarge release voltage
VDU
Discharge overcurrent detection voltage
Load short-circuiting detection voltage
Charge overcurrent detection voltage
0 V Battery Charge Function
VDIOV
VSHORT
VCIOV
0 V battery charge starting charger voltage V0CHA
0 V battery charge inhibition battery
V0INH
voltage
Internal Resistance
Resistance between VM pin and VDD pin RVMD
Resistance between VM pin and VSS pin RVMS
Input Voltage
Operation voltage between VDD pin and
VDSOP1
VSS pin
Operation voltage between VDD pin and
VDSOP2
VM pin
Input Current (With Power-down Function)
IOPE
Current consumption during operation
Current consumption during power-down IPDN
Input Current (Without Power-down Function)
IOPE
Current consumption during operation
Current consumption during overdischarge IOPED
(Ta = 40°C to 85°C*1 unless otherwise specified)
VCL VCU
VCL = VCU
VDL VDU
VDL = VDU
0 V battery charge
function "available"
0 V battery charge
function "unavailable"
VDU 0.070
VDU
VDU 0.045
VDIOV 0.010 VDIOV VDIOV 0.010
VSHORT 0.100 VSHORT VSHORT 0.100
VCIOV 0.015 VCIOV VCIOV 0.015
0.0
0.7
1.5
V
2
0.4
0.8
1.3
V
2
VDD = 1.8 V, VVM = 0 V
VDD = 3.4 V, VVM = 1.0 V
78
7.2
300
20
1310
44
k
k
3
3
1.5
6.5
V
1.5
28
V
VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
0.7
2.8
5.5
0.15
A
A
2
VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
0.7
2.8
5.5
3.8
A
A
2
2.4
10
30
k
4
2.4
10
30
k
4
2.4
10
30
k
4
2.4
10
30
k
4
tCU 0.6
tDL 0.6
tDIOV 0.6
tSHORT 0.6
tCIOV 0.6
tCU
tDL
tCU1.6
tDL1.6
tDIOV1.6
tSHORT 1.6
tCIOV1.6
5
5
5
5
5
2
2
Output Resistance
CO pin resistance "H"
RCOH
CO pin resistance "L"
RCOL
DO pin resistance "H"
RDOH
DO pin resistance "L"
RDOL
Delay Time
Overcharge detection delay time
Overdischarge detection delay time
Discharge overcurrent detection delay time
Load short-circuiting detection delay time
Charge overcurrent detection delay time
tCU
tDL
tDIOV
tSHORT
tCIOV
VCO = 3.0 V, VDD = 3.4 V,
VVM = 0 V
VCO = 0.4 V, VDD = 4.6 V,
VVM = 0 V
VDO = 3.0 V, VDD = 3.4 V,
VVM = 0 V
VDO = 0.4 V, VDD = 1.8 V,
VVM = 0 V
tDIOV
tSHORT
tCIOV
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by
design, not tested in production.
9
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Test Circuits
Caution Unless otherwise specified, the output voltage levels "H" and "L" at CO pin (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to VVM
and the DO pin level with respect to VSS.
1. Overcharge detection voltage, overcharge release voltage
(Test circuit 1)
Overcharge detection voltage (VCU) is defined as the voltage V1 at which VCO goes from "H" to "L" when the voltage V1
is gradually increased from the starting condition of V1 = 3.4 V. Overcharge release voltage (VCL) is defined as the
voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is then gradually decreased. Overcharge hysteresis
voltage (VHC) is defined as the difference between VCU and VCL.
2. Overdischarge detection voltage, overdischarge release voltage
(Test circuit 2)
Overdischarge detection voltage (VDL) is defined as the voltage V1 at which VDO goes from "H" to "L" when the voltage
V1 is gradually decreased from the starting condition of V1 = 3.4 V, V2 = 0 V. Overdischarge release voltage (VDU) is
defined as the voltage V1 at which VDO goes from "L" to "H" when the voltage V1 is then gradually increased.
Overdischarge hysteresis voltage (VHD) is defined as the difference between VDU and VDL.
3. Discharge overcurrent detection voltage
(Test circuit 2)
Discharge overcurrent detection voltage (VDIOV) is defined as the voltage V2 whose delay time for changing VDO from
"H" to "L" is discharge overcurrent delay time (tDIOV) when the voltage V2 is increased from the starting condition of
V1 = 3.4 V, V2 = 0 V.
4. Load short-circuiting detection voltage
(Test circuit 2)
Load short-circuiting detection voltage (VSHORT) is defined as the voltage V2 whose delay time for changing VDO from
"H" to "L" is load short-circuiting delay time (tSHORT) when the voltage V2 is increased from the starting condition of
V1 = 3.4 V, V2 = 0 V.
5. Charge overcurrent detection voltage
(Test circuit 2)
Charge overcurrent detection voltage (VCIOV) is defined as the voltage V2 whose delay time for changing VCO from "H" to
"L" is charge overcurrent delay time (tCIOV) when the voltage V2 is decreased from the starting condition of V1 = 3.4 V,
V2 = 0 V.
6. Current consumption during operation
(Test circuit 2)
The current consumption during operation (IOPE) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = 3.4 V and V2 = 0 V.
7.
Current consumption during power-down, current consumption during overdischarge
(Test circuit 2)
7. 1 With power-down function
The current consumption during power-down (IPDN) is IDD under the set conditions of V1 = V2 = 1.5 V.
7. 2 Without power-down function
The current consumption during overdischarge (IOPED) is IDD under the set conditions of V1 = V2 = 1.5 V.
10
Rev.4.0_03
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
8. Resistance between VM pin and VDD pin
(Test circuit 3)
RVMD is the resistance between VM pin and VDD pin under the set conditions of V1 = 1.8 V, V2 = 0 V.
9. Resistance between VM pin and VSS pin
(Test circuit 3)
RVMS is the resistance between VM pin and VSS pin under the set conditions of V1 = 3.4 V, V2 = 1.0 V.
10. CO pin resistance "H"
(Test circuit 4)
The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V,
V2 = 0 V, V3 = 3.0 V.
11. CO pin resistance "L"
(Test circuit 4)
The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.6 V,
V2 = 0 V, V3 = 0.4 V.
12. DO pin resistance "H"
(Test circuit 4)
The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V,
V2 = 0 V, V4 = 3.0 V.
13. DO pin resistance "L"
(Test circuit 4)
The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V,
V2 = 0 V, V4 = 0.4 V.
14. Overcharge detection delay time
(Test circuit 5)
The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" just after the voltage V1 increases and
exceeds VCU under the set conditions of V1 = 3.4 V, V2 = 0 V.
15. Overdischarge detection delay time
(Test circuit 5)
The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases and
falls below VDL under the set conditions of V1 = 3.4 V, V2 = 0 V.
16. Discharge overcurrent detection delay time
(Test circuit 5)
The discharge overcurrent detection delay time (tDIOV) is the time needed for VDO to go to "L" after the voltage V2
increases and exceeds VDIOV under the set conditions of V1 = 3.4 V, V2 = 0 V.
11
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
17. Load short-circuiting detection delay time
(Test circuit 5)
The load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go to "L" after the voltage V2
increases and exceeds VSHORT under the set conditions of V1 = 3.4 V, V2 = 0 V.
18. Charge overcurrent detection delay time
(Test circuit 5)
The charge overcurrent detection delay time (tCIOV) is the time needed for VCO to go to "L" after the voltage V2
decreases and falls below VCIOV under the set conditions of V1 = 3.4 V, V2 = 0 V.
19. 0 V battery charge starting charger voltage (0 V battery charge function "available")
(Test circuit 2)
The 0 V charge starting charger voltage (V0CHA) is defined as the absolute value of voltage V2 at which VCO goes to
"H" (VCO = VDD) when the voltage V2 is gradually decreased from the starting conditions of V1 = V2 = 0 V.
20. 0 V battery charge inhibition battery voltage (0 V battery charge function "unavailable")
(Test circuit 2)
The 0 V charge inhibition battery voltage (V0INH) is defined as the voltage V1 at which VCO goes to "H" (VCO = VDD)
when the voltage V1 is gradually increased, after setting V1 = 0 V, V2 = 4.0 V.
12
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
IDD
A
R1 = 330
VDD
V1
S-8200A Series
V1
VSS
C1
= 0.1 F
S-8200A Series
VSS
VM
VM
CO
DO
CO
DO
V VDO
V VDO
V VCO
V VCO
V2
COM
COM
Figure 5 Test Circuit 1
IDD
A
VDD
Figure 6 Test Circuit 2
VDD
V1
VDD
V1
S-8200A Series
VSS
VM
DO
CO
S-8200A Series
VSS
DO
A IVM
V2
COM
VM
CO
A IDO
A ICO
V4
V3
V2
COM
Figure 7 Test Circuit 3
Figure 8 Test Circuit 4
VDD
V1
S-8200A Series
VSS
VM
DO
Oscilloscope
CO
Oscilloscope
V2
COM
Figure 9 Test Circuit 5
13
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Operation
Remark Refer to " Battery Protection IC Connection Example".
1. Normal status
The S-8200A Series monitors the voltage of the battery connected between the VDD pin and VSS pin, the voltage
between the VM pin and VSS pin to control charging and discharging. When the battery voltage is in the range from
overdischarge detection voltage (VDL) to overcharge detection voltage (VCU), and the VM pin voltage is in the range from
charge overcurrent detection voltage (VCIOV) to discharge overcurrent detection voltage (VDIOV), the S-8200A Series turns
both the charge and discharge control FETs on. This condition is called the normal status, and in this condition charging
and discharging can be carried out freely.
The resistance (RVMD) between the VM pin and VDD pin, and the resistance (RVMS) between the VM pin and VSS pin are
not connected in the normal status.
Caution When the battery is connected for the first time, the S-8200A Series may not be in the normal status. In
this case, short the VM pin and VSS pin, or set the VM pin voltage at the level of VCIOV or more and at
the level of VDIOV or less by connecting the charger. The S-8200A Series then becomes the normal
status.
2. Overcharge status
2. 1 VCL VCU (Product in which overcharge release voltage differs from overcharge detection voltage)
When the battery voltage becomes higher than VCU during charging in the normal status and detection continues for
the overcharge detection delay time (tCU) or longer, the S-8200A Series turns the charge control FEToff to stop
charging. This condition is called the overcharge status.
RVMD and RVMS are not connected in the overcharge status.
The overcharge status is released in the following two cases.
(1) In the case that the VM pin voltage is lower than VDIOV, the S-8200A Series releases the overcharge status when
the battery voltage falls below overcharge release voltage (VCL).
(2) In the case that the VM pin voltage is higher than or equal to VDIOV, the S-8200A Series releases the overcharge
status when the battery voltage falls below VCU.
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by the Vf
voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through the parasitic
diode in the charge control FET. If this VM pin voltage is higher than or equal to VDIOV, the S-8200A Series releases
the overcharge status when the battery voltage is lower than or equal to VCU.
Caution
14
If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below VCU
even when a heavy load is connected, discharge overcurrent detection and load short-circuiting
detection do not function until the battery voltage falls below VCU. Since an actual battery has an
internal impedance of tens of m, the battery voltage drops immediately after a heavy load that
causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting
detection function.
Rev.4.0_03
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
2. 2 VCL = VCU (Product in which overcharge release voltage is the same as overcharge detection voltage)
When the battery voltage becomes higher than VCU during charging in the normal status and detection continues for
tCU or longer, the S-8200A Series turns the charge control FET off to stop charging. This condition is called the
overcharge status.
RVMD and RVMS are not connected in the overcharge status.
The overcharge status is released in the following two cases.
(1) In the case that the VM pin voltage is higher than or equal to VCIOV, and is lower than VDIOV, the S-8200A Series
releases the overcharge status when the battery voltage falls below VCL.
(2) In the case that the VM pin voltage is higher than or equal to VDIOV, the S-8200A Series releases the overcharge
status when the battery voltage falls below VCU.
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by the Vf
voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through the parasitic
diode in the charging control FET. If this VM pin voltage is higher than or equal to VDIOV, the S-8200A Series releases
the overcharge status when the battery voltage is lower than or equal to VCU.
For the actual application boards, changing the battery voltage and the charger voltage simultaneously enables to
measure VCL. In this case, the charger is always necessary to have the equivalent voltage level to the battery
voltage. The charger keeps VM pin voltage higher than or equal to VCIOV and lower than or equal to VDIOV. The
S-8200A Series releases the overcharge status when the battery voltage falls below VCL.
Caution 1. If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below VCU
even when a heavy load is connected, discharge overcurrent detection and load short-circuiting
detection do not function until the battery voltage falls below VCU. Since an actual battery has an
internal impedance of tens of m, the battery voltage drops immediately after a heavy load that
causes overcurrent is connected, and discharge overcurrent detection and load short-circuiting
detection function.
2. When a charger is connected after overcharge detection, the overcharge status is not released
even if the battery voltage is below VCL. The overcharge status is released when the VM pin voltage
goes over VCIOV by removing the charger.
3. Overdischarge status
When the battery voltage falls below overdischarge detection voltage (VDL) during discharging in the normal status and
the detection continues for the overdischarge detection delay time (tDL) or longer, the S-8200A Series turns the discharge
control FET off to stop discharging. This condition is called the overdischarge status.
Under the overdischarge status, the VM pin and VDD pin are shorted by RVMD in the S-8200A Series. The VM pin
voltage is pulled up by RVMD.
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower than
0.7 V typ., the S-8200A Series releases the overdischarge status when the battery voltage reaches VDL or higher.
When VM pin voltage is not lower than 0.7 V typ., the S-8200A Series releases the overdischarge status when the
battery voltage reaches VDU or higher.
RVMS is not connected in the overdischarge status.
3. 1 With power-down function
Under the overdischarge status, when voltage between the VDD pin and VM pin is 0.8 V typ. or lower, the powerdown function works and the current consumption is reduced to the current consumption during power-down (IPDN).
By connecting a battery charger, the power-down function is released when the VM pin voltage is 0.7 V typ. or lower.
15
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
4. Discharge overcurrent status (discharge overcurrent, load short-circuiting)
When a battery in the normal status is in the status where the VM pin voltage is equal to or higher than VDIOV because
the discharge current is equal to or higher than the specified value and the status lasts for the discharge overcurrent
detection delay time (tDIOV), the discharge control FET is turned off and discharging is stopped. This status is called the
discharge overcurrent status.
In the discharge overcurrent status, the VM pin and VSS pin are shorted by the RVMS in the S-8200A Series. However,
the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected. When the load is
disconnected, the VM pin returns to the VSS pin voltage.
The VM pin voltage returns to VDIOV or lower, the S-8200A Series releases the discharge overcurrent status.
RVMD is not connected in the discharge overcurrent status.
5. Charge overcurrent status
When a battery in the normal status is in the status where the VM pin voltage is equal to or lower than VCIOV because the
charge current is equal to or higher than the specified value and the status lasts for the charge overcurrent detection
delay time (tCIOV), the charge control FET is turned off and charging is stopped. This status is called the charge
overcurrent status.
The S-8200A Series releases the charge overcurrent status when the VM pin voltage returns to VCIOV or higher by
removing the charger.
The charge overcurrent detection function does not work in the overdischarge status.
RVMD and RVMS are not connected in the charge overcurrent status.
6. 0 V battery charge function "available"
This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V battery
charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB and EB pins by connecting a
charger, the charge control FET gate is fixed to the VDD pin voltage.
When the voltage between the gate and source of the charge control FET becomes equal to or higher than the threshold
voltage due to the charger voltage, the charge control FET is turned on to start charging. At this time, the discharge
control FET is off and the charging current flows through the internal parasitic diode in the discharging control FET.
When the battery voltage becomes equal to or higher than VDU, the S-8200A Series enters the normal status.
Caution 1. Some battery providers do not recommend charging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge
function.
2. The 0 V battery charge function has higher priority than the charge overcurrent detection function.
Consequently, a product in which use of the 0 V battery charge function is enabled charges a
battery forcibly and the charge overcurrent cannot be detected when the battery voltage is lower
than VDL.
7. 0 V battery charge function "unavailable"
This function inhibits recharging when a battery that is internally short-circuited (0 V battery) is connected. When the
battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charge control FET gate is fixed to
the EB pin voltage to inhibit charging. When the battery voltage is V0INH or higher, charging can be performed.
Caution Some battery providers do not recommend charging for a completely self-discharged battery. Please
ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function.
16
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
8. Delay circuit
The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter.
Remark
tDIOV and tSHORT start when VDIOV is detected. When VSHORT is detected over tSHORT after VDIOV, the S-8200A
Series turns the discharge control FET off within tSHORT from the time of detecting VSHORT.
VDD
DO pin voltage
tD
VSS
VDD
tSHORT
0 tD tSHORT
Time
VSHORT
VM pin voltage
VDIOV
VSS
Time
Figure 10
17
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Timing Charts
1. Overcharge detection, overdischarge detection
VCU
VCL (VCU VHC)
Battery voltage
VDU (VDL VHD)
VDL
VDD
DO pin voltage
VSS
VDD
CO pin voltage
VSS
VEB
VDD
VM pin voltage
VDIOV
VSS
VCIOV
VEB
Charger connection
Load connection
Overcharge detection delay time (tCU)
Status
*1
(1)
Overdischarge detection delay time (tDL)
(2)
(1)
*1. (1): Normal status
(2): Overcharge status
(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 11
18
(3)
(1)
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
2. Discharge overcurrent detection
VCU
VCL (VCU VHC)
Battery voltage
VDU (VDL VHD)
VDL
VDD
DO pin voltage
VSS
VDD
CO pin voltage
VSS
VDD
VM pin voltage
VSHORT
VDIOV
VSS
Load connection
Status
*1
Discharge overcurrent
detection delay time (tDIOV)
(1)
(2)
Load short-circuiting
detection delay time (tSHORT)
(1)
(2)
(1)
*1. (1): Normal status
(2): Discharge overcurrent status
Remark The charger is assumed to charge with a constant current.
Figure 12
19
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
3. Charge overcurrent detection
VCU
VCL (VCU VHC)
Battery voltage
VDU (VDL VHD)
VDL
VDD
DO pin voltage
VSS
VDD
CO pin voltage
VSS
VEB
VDD
VM pin voltage
VSS
VCIOV
VEB
Charger connection
Load connection
Status
*1
Charge overcurrent detection
delay time (tCIOV)
(2)
(1)
*1. (1): Normal status
(2): Charge overcurrent status
(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 13
20
Overdischarge detection
delay time (tDL)
Charge overcurrent detection
delay time (tCIOV)
(2)
(3)
(1)
(1)
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Battery Protection IC Connection Example
EB
R1
VDD
Battery C1
S-8200A Series
VSS
DO
CO
FET1
VM
FET2
R2
EB
Figure 14
Table 11 Constants for External Components
Symbol
Part
Purpose
Min.
Typ.
Max.
Remark
Threshold voltage Overdischarge
*1
detection voltage
N-channel
Discharge control
FET1
MOS FET
Gate to source withstand voltage
*2
Charger voltage
Threshold voltage Overdischarge
detection voltage*1
N-channel
Charge control
FET2
MOS FET
Gate to source withstand voltage
*2
Charger voltage
Resistance should be as small as
possible to avoid lowering the
ESD protection,
150
330
1 k
R1
Resistor
overcharge detection accuracy due to
For power fluctuation
current consumption.*3
Connect a capacitor of 0.068 F or
C1
Capacitor For power fluctuation
0.068 F
0.1 F
1.0 F
higher between VDD pin and VSS pin.*4
Protection for reverse
Select as large a resistance as possible
R2
Resistor
connection of a
300
2 k
4 k
to prevent current when a charger is
*5
connected in reverse.
charger
*1. If the threshold voltage of a FET is low, the FET may not cut the charge current. If a FET with a threshold voltage equal to
or higher than the overdischarge detection voltage is used, discharging may be stopped before overdischarge is detected.
*2. If the withstand voltage between the gate and source is lower than the charger voltage, the FET may be destroyed.
*3. An accuracy of overcharge detection voltage is guaranteed by R1 = 330 . Connecting resistors with other values worsen
the accuracy. In case of connecting larger resistor to R1, the voltage between the VDD pin and VSS pin may exceed the
absolute maximum rating because the current flows to the S-8200A Series from the charger due to reverse connection of
charger. Connect a resistor of 150 or more to R1 for ESD protection.
*4. When connecting a resistor of 150 or less to R1 or a capacitor of 0.068 F or less to C1, the S-8200A Series may
malfunction when power dissipation is largely fluctuated.
*5. When a resistor more than 4 k is connected to R2, the charge current may not be cut.
Caution 1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above example
of connection. In addition, the example of connection shown above and the constant do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the constant.
21
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Precautions
The application conditions for the input voltage, output voltage, and load current should not exceed the package power
dissipation.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
22
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Characteristics (Typical Data)
1. Current consumption
1. 1 IOPE vs. Ta
1. 2 IPDN vs. Ta
6
0.100
IOPE [μA]
5
0.075
4
3
0.050
2
0.025
1
0
−40 −25
0
0
25
Ta [°C]
50
3
4
VDD [V]
5
75 85
0
25
Ta [°C]
50
75 85
1. 3 IOPE vs. VDD
6
IOPE [μA]
5
4
3
2
1
0
0
1
2
6
7
23
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
2. Overcharge detection / release voltage, overdischarge detection / release voltage,
overcurrent detection voltage, charge overcurrent detection voltage, and delay time
2. 1 VCU vs. Ta
2. 2 VCL vs. Ta
4.26
4.07
4.05
VCL [V]
VCU [V]
4.24
4.22
4.20
4.18
−40 −25
25
Ta [°C]
50
75 85
VDU [V]
VDL [V]
25
Ta [°C]
50
75 85
0
25
Ta [°C]
50
75 85
0
25
Ta [°C]
50
75 85
2.92
2.49
2.47
2.88
2.84
2.45
−40 −25
2.80
0
25
Ta [°C]
50
75 85
2. 5 tCU vs. Ta
−40 −25
2. 6 tDL vs. Ta
1.6
110
1.4
90
1.2
tDL [ms]
tCU [s]
0
2.96
2.51
1.0
70
50
0.8
0.6
−40 −25
2. 4 VDU vs. Ta
2.53
−40 −25
30
0
25
Ta [°C]
50
75 85
2. 7 VDIOV vs. Ta
0.160
14
0.155
12
0.150
0.145
0.140
−40 −25
−40 −25
2. 8 tDIOV vs. VDD
tDIOV [ms]
VDIOV [V]
3.99
3.95
0
2.55
24
4.01
3.97
2. 3 VDL vs. Ta
2.43
4.03
10
8
6
4
0
25
Ta [°C]
50
75 85
2.5
3.0
3.5
VDD [V]
4.0
4.5
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
2. 10 VCIOV vs. Ta
14
−0.135
12
−0.140
VCIOV [V]
tDIOV [ms]
2. 9 tDIOV vs. Ta
10
8
6
4
−40 −25
0
25
Ta [°C]
50
−0.155
−0.165
−40 −25
75 85
14
14
12
12
10
8
6
25
Ta [°C]
50
75 85
0
25
Ta [°C]
50
75 85
10
8
6
4
4
2.5
3.0
3.5
VDD [V]
4.0
4.5
2. 13 VSHORT vs. Ta
0.60
−40 −25
2. 14 tSHORT vs. VDD
400
350
tSHORT [μs]
0.55
0.50
0.45
0.40
0
2. 12 tCIOV vs. Ta
tCIOV [ms]
tCIOV [ms]
−0.150
−0.160
2. 11 tCIOV vs. VDD
VSHORT [V]
−0.145
−40 −25
300
250
200
150
0
25
Ta [°C]
50
75 85
0
25
Ta [°C]
50
75 85
2.5
3.0
3.5
VDD [V]
4.0
4.5
2. 15 tSHORT vs. Ta
400
tSHORT [μs]
350
300
250
200
150
−40 −25
25
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
3. CO pin / DO pin
3. 2 RCOL vs. VCO
20
15
RCOL [kΩ]
RCOH [kΩ]
3. 1 RCOH vs. VCO
20
10
5
15
10
5
0
1
2
3
4
0
1
VCO [V]
20
20
15
15
10
5
5
10
5
0
1
2
VDO [V]
26
4
3. 4 RDOL vs. VDO
RDOL [kΩ]
RDOH [kΩ]
3. 3 RDOH vs. VDO
2
3
VCO [V]
3
4
0
0.5
1.0
VDO [V]
1.5
2.0
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
Rev.4.0_03
Marking Specifications
1.
SOT-23-6
Top view
6
5
(1) to (3):
(4):
4
Product code (refer to Product name vs. Product code)
Lot number
(1) (2) (3) (4)
1
2
3
Product name vs. Product code
Product Name
S-8200AAC-M6T1U
S-8200AAH-M6T1U
S-8200AAY-M6T1U
S-8200ABE-M6T1U
S-8200ABM-M6T1U
S-8200ABX-M6T1U
S-8200ABZ-M6T1U
S-8200ACF-M6T1U
S-8200ACV-M6T1U
S-8200ACW-M6T1U
Product Code
(1)
(2)
(3)
V
3
C
V
3
H
V
3
Y
V
4
E
V
4
M
V
4
X
V
4
Z
S
Y
F
S
Y
V
S
Y
W
27
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8200A Series
2.
Rev.4.0_03
SNT-6A
Top view
6
5
(1) to (3):
(4) to (6):
4
(1) (2) (3)
(4) (5) (6)
1
2
3
Product name vs. Product code
Product Name
S-8200AAA-I6T1U
S-8200AAB-I6T1U
S-8200AAC-I6T1U
S-8200AAD-I6T1U
S-8200AAF-I6T1U
S-8200AAG-I6T1U
S-8200AAH-I6T1U
S-8200ABA-I6T1U
S-8200ABI-I6T1U
S-8200ABK-I6T1U
S-8200ABL-I6T1U
S-8200ABM-I6T1U
S-8200ACN-I6T1U
S-8200ACO-I6T1U
S-8200ACP-I6T1U
S-8200ACQ-I6T1U
S-8200ACR-I6T1U
28
Product Code
(1)
(2)
(3)
V
3
A
V
3
B
V
3
C
V
3
D
V
3
F
V
3
G
V
3
H
V
4
A
V
4
I
V
4
K
V
4
L
V
4
M
S
Y
N
S
Y
O
S
Y
P
S
Y
Q
S
Y
R
Product code (refer to Product name vs. Product code)
Lot number
2.9±0.2
1.9±0.2
6
0.95
4
5
1
2
3
+0.1
0.15 -0.05
0.95
0.35±0.15
No. MP006-A-P-SD-2.1
TITLE
SOT236-A-PKG Dimensions
No.
MP006-A-P-SD-2.1
ANGLE
UNIT
mm
ABLIC Inc.
4.0±0.1(10 pitches:40.0±0.2)
+0.1
ø1.5 -0
+0.2
ø1.0 -0
2.0±0.05
0.25±0.1
4.0±0.1
1.4±0.2
3.2±0.2
3 2 1
4 5 6
Feed direction
No. MP006-A-C-SD-3.1
TITLE
SOT236-A-Carrier Tape
No.
MP006-A-C-SD-3.1
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. MP006-A-R-SD-2.1
TITLE
SOT236-A-Reel
No.
MP006-A-R-SD-2.1
ANGLE
QTY
UNIT
mm
ABLIC Inc.
3,000
1.57±0.03
6
1
5
4
2
3
+0.05
0.08 -0.02
0.5
0.48±0.02
0.2±0.05
No. PG006-A-P-SD-2.1
TITLE
SNT-6A-A-PKG Dimensions
No.
PG006-A-P-SD-2.1
ANGLE
UNIT
mm
ABLIC Inc.
+0.1
ø1.5 -0
4.0±0.1
2.0±0.05
0.25±0.05
+0.1
1.85±0.05
ø0.5 -0
4.0±0.1
0.65±0.05
3 2 1
4
5 6
Feed direction
No. PG006-A-C-SD-2.0
TITLE
SNT-6A-A-Carrier Tape
No.
PG006-A-C-SD-2.0
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PG006-A-R-SD-1.0
SNT-6A-A-Reel
TITLE
No.
PG006-A-R-SD-1.0
ANGLE
QTY.
UNIT
mm
ABLIC Inc.
5,000
0.52
1.36
2
0.52
0.2 0.3
1.
2.
1
(0.25 mm min. / 0.30 mm typ.)
(1.30 mm ~ 1.40 mm)
0.03 mm
SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package ( 1.30 mm ~ 1.40 mm ).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1.
2.
(0.25 mm min. / 0.30 mm typ.)
(1.30 mm ~ 1.40 mm)
No. PG006-A-L-SD-4.1
TITLE
SNT-6A-A
-Land Recommendation
No.
PG006-A-L-SD-4.1
ANGLE
UNIT
mm
ABLIC Inc.
Disclaimers (Handling Precautions)
1.
All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2.
The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4.
Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5.
Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6.
When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7.
The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8.
The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9.
In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
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