REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Add generic part number HA-2841 as device type 03. Add case outline C to
device type 01. Make changes to 1.2.1, 1.3, TABLE I, and FIGURE 2.
94-05-16
M. A. FRYE
B
Drawing updated to reflect current requirements. - ro
00-05-24
R. MONNIN
THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED.
REV
SHEET
REV
SHEET
REV STATUS
REV
B
B
B
B
B
B
B
B
B
B
B
B
B
B
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
RICK C. OFFICER
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
CHECKED BY
RAJESH R. PITHADIA
APPROVED BY
MICHAEL A. FRYE
DRAWING APPROVAL DATE
90-06-28
REVISION LEVEL
B
MICROCIRCUIT, LINEAR, WIDEBAND, FAST
SETTLING, OPERATIONAL AMPLIFIER,
MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1 OF
5962-87785
14
5962-E273-00
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-87785
01
~
~
~
~
C
~
~
~
~
Drawing number
X
~
~
~
~
Device type
(see 1.2.1)
~
~
~
~
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
HA-2541
02
EL-2041
03
HA-2841
Circuit function
Fast settling, unity gain stable, wideband
operational amplifier
Fast settling, unity gain stable, wideband
operational amplifier
Fast settling, unity gain stable, video
operational amplifier
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
C
P
X
2
Descriptive designator
Terminals
GDIP1-T14 or CDIP2-T14
GDIP1-T8 or CDIP2-T8
See figure 1
CQCC1-N20
14
8
12
20
Package style
Dual-in-line package
Dual-in-line package
Can
Square leadless chip carrier
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Voltage between +V and -V terminals ..............................................35 V dc
Differential input voltage (VIN) .......................................................... 6.0 V dc
Voltage at either input terminal .........................................................V+ to VPeak output current (< 10% duty cycle) ............................................50 mA
Maximum power dissipation (PD) .....................................................2.0 W 1/
Storage temperature range ...............................................................-65 C to +150 C
Lead temperature (soldering, 10 seconds) :
Device types 01 and 02 .................................................................+275 C
Device type 03 ..............................................................................+300 C
Junction temperature (TJ) .................................................................+175 C
r
q
q
q
q
q
T
Thermal resistance, junction-to-case ( JC) :
Cases C, P, and 2 .........................................................................See MIL-STD-1835
Case X ..........................................................................................82 C/W
Thermal resistance, junction-to-ambient ( JA): .................................50 C/W
q
q
T
1/
q
q
Derate linearly above TA = +75 C at 20 mW/ C.
STANDARD
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REVISION LEVEL
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2
1.4 Recommended operating conditions.
Positive supply voltage range (+V) ...................................................+12 V dc to +15 V dc
Negative supply voltage range (-V) ..................................................-12 V dc to -15 V dc
Common mode input voltage (VCM) ................................................. (+V – (-V)) / 2
d
Load resistance (RL) .........................................................................1.0 k
q
:
q
Ambient operating temperature range (T A) ......................................-55 C to +125 C
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed
in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in
the solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 MIL-STD-973 MIL-STD-1835 -
Test Method Standard Microcircuits.
Configuration Management.
Interface Standard For Microcircuit Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings (SMD's).
Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MILPRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying
activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan
may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.
These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MILPRF-38535 is required to identify when the QML flow option is used.
STANDARD
MICROCIRCUIT DRAWING
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A
REVISION LEVEL
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SHEET
3
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
specified in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN
listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For
packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the
option of not marking the "5962-" on the device.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535,
appendix A.
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
reviewer.
STANDARD
MICROCIRCUIT DRAWING
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REVISION LEVEL
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4
TABLE I. Electrical performance characteristics.
Test
Input offset voltage
Symbol
Conditions 1/
-55 C TA +125 C
unless otherwise specified
VIO
VCM = 0 V
q d
d
q
Group A
subgroups
Device
type
1
01,02
Min
-2.0
Max
+2.0
03
-4.0
+4.0
01
-6.0
+6.0
02
-10.0
+10.0
03
-8.0
+8.0
01
-35
+35
-50
+50
-15
+15
-20
+20
-10
+10
-20
+20
-35
+35
-50
+50
-15
+15
-20
+20
-10
+10
-20
+20
-7.0
+7.0
-9.0
+9.0
-4.0
+4.0
-6.0
+6.0
-1.0
+1.0
-2.0
+2.0
2,3
Input bias current
+IIB
:
1
VCM = 0 V, +RS = 1.1 k ,
-RS = 100
:
2,3
1
02
2,3
1
03
2,3
-IIB
VCM = 0 V, +RS = 100
-RS = 1.1 k
:,
1
:
01
2,3
1
02
2,3
1
03
2,3
Input offset current
IIO
:
1
VCM = 0 V, +RS = 1.1 k ,
-RS = 1.1 k
:
01
2,3
1
02
2,3
1
03
2,3
Limits
Unit
mV
PA
PA
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued.
Test
Common mode input
range
Symbol
Conditions 1/
-55 C TA +125 C
unless otherwise specified
+VCM
+V = 5.0 V, -V = -25 V
-VCM
Large signal voltage
range
+AVOL
q d
Device
type
1,2,3
01,03
Min
10
02
8
01,03
-10
02
-8
01,03
10
02
7
5,6
All
5
4
01,03
10
02
7
5,6
All
5
'VCM = 10 V, -V = -25 V,
1,2,3
01,02
70
+V = 5.0 V, VOUT = -10 V
1
03
86
+V = 25 V, -V = -5.0 V
+CMRR
4
VOUT = 0 V and 10 V,
:
VOUT = 0 V and -10 V,
RL = 1.0 k
Common mode
rejection ratio
q
Group A
subgroups
RL = 1.0 k
-AVOL
d
:
2,3
-CMRR
+IOUT
'VCM = -10 V, +V = 25 V,
1,2,3
01,02
70
-V = -5.0 V, VOUT = 10 V
1
03
86
1
VOUT = -10 V
1
VOUT = -5 V 2/
1
VOUT = 10 V
1
VOUT = +5 V 2/
Max
V
kV/V
dB
80
01
10
02
25
03
25
2,3
-IOUT
Unit
80
2,3
Output current
Limits
mA
15
01
-10
02
-25
03
-25
2,3
-15
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued.
Test
Output voltage swing
Symbol
Conditions 1/
-55 C TA +125 C
unless otherwise specified
+VOUT
RL = 1.0 k
-VOUT
Quiescent power supply
current
+ICC
-ICC
Power supply rejection
ratio
+PSRR
q d
d
q
Group A
subgroups
Device
type
1,2,3
01,03
Min
10
02
11
01,03
-10
02
-11
:
RL = 1.0 k
:
1,2,3
1,2,3
VOUT = 0 V, IOUT = 0 mA
1,2,3
VOUT = 0 V, IOUT = 0 mA
+V = 5.0 and 15 V,
-V = -15 V
1,2,3
+V = 10 and 20 V,
-V = -15 V
-PSRR
-V = -5.0 V and -15 V,
+V = +15 V
1,2,3
-V = -10 and -20 V,
+V = +15 V
Offset voltage adjustment
+VIO
q
1
TA = +25 C 3/
Unit
Max
V
01
39
02
17
03
11
01
-39
02
-17
03
-11
01
70
02
60
03
70
01
70
02
60
03
70
All
VIO
(adj)
-VIO
Limits
mA
dB
mV
-1.0
q
1
TA = +25 C 3/
All
VIO
(adj)
+1.0
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued.
Symbol
Conditions 1/
-55 C TA +125 C
unless otherwise specified
Differential input 4/
resistance
RIN
Slew rate 4/
+SR
Test
q d
d
q
Group A
subgroups
Device
type
VCM = 0 V, TA = +25 C
4
01,02
Min
40
VOUT = -3.0 V to 3.0 V,
7
01
200
q
:
-SR
RL = 1 k , AV = 1 V/V
8
150
VOUT = 3.0 V to -3.0 V,
7
200
RL = 1 k , AV = 1 V/V
8
150
VOUT = -3.0 V to 3.0 V,
7
:
+SR
:
-SR
130
VOUT = 3.0 V to -3.0 V,
7
180
RL = 1 k , AV = 1 V/V
8
130
VOUT = -3.0 V to 3.0 V,
7
Gain bandwidth 4/
product
Full power bandwidth 4/ 5/
GBWP
FPBW
03
8
187
VOUT = 3.0 V to -3.0 V,
7
200
8
187
:
VOUT = r100 mV,
RL = 1 k:, f1 = 100 kHz,
f2 = 10 MHz, TA = +25qC
VOUT = r200 mV,
RL = 1 k:, fO = 100 kHz,
TA = +25qC
VOUT = r200 mV,
RL = 1 k:, fO = 10 MHz,
TA = +25qC
VPK = 10 V, RL = 1 k:
4
Max
k
:
P
V/ s
200
RL = 1 k , AV = 1 V/V
RL = 1 k , AV = 1 V/V
Unit
180
8
:
-SR
02
RL = 1 k , AV = 1 V/V
:
+SR
Limits
All
38
03
42
MHz
44
4
01
3.0
5,6
4
MHz
2.4
02
2.8
5,6
2.0
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued.
Test
Full power bandwidth 4/ 5/
Symbol
Conditions 1/
-55 C TA +125 C
unless otherwise specified
FPBW
VPK = 10 V, RL = 1 k
q d
d
q
Group A
subgroups
Device
type
4
03
:
Min
3.1
5,6
:
d 10 pF
Closed loop stable 4/
gain
CLSG
RL = 1 k , CL
Rise time 4/ 6/
tr
VOUT = 0 V to +200 mV
Fall time 4/ 6/
tf
VOUT = 0 V to –200 mV
ts
Max
MHz
4,5,6
All
9,10,11
01,02
10
03
6
9,10,11
01,02
10
9
03
5
1.0
V/V
ns
ns
6
9
AV = -1 V/V, 10 V step to
Unit
3.0
10,11
Settling time 4/
Limits
01
150
ns
q
0.1 %, TA = +25 C
300
AV = -1 V/V, 10 V step to
q
0.01 %, TA = +25 C
AV = -1 V/V, 10 V step to
9
02
350
9,10,11
01,02
40
9
03
60
q
0.05 %, TA = +25 C
Overshoot 4/
+OS
VOUT = 0 V to +200 mV
10,11
-OS
VOUT = 0 V to –200 mV
65
9,10,11
01,02
40
9
03
60
10,11
q
Output resistance 4/
ROUT
Open loop, TA = +25 C
Quiescent power 7/
consumption
PC
VOUT = 0 V, IOUT = 0 mA
70
4
01,02
25
:
1,2,3
01
1.17
W
02
.51
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued.
1/
Unless otherwise specified, for dc tests, RS = 100
r
:
:, RL = 100 k:, VOUT = 0 V.
Unless otherwise specified,
for ac tests, AV = 1 V/V and RL = 1 k .
q
Device type 03 is designed to handle IOUT = 10 mA at a 50 % duty cycle for TJ = +175 C. For IOUT = 15 mA and
2/
q
TJ = +175 C, a duty cycle of less than or equal to 33 % is required.
r
3/
Offset adjustment range is VIO (measured) 1.0 mV minimum referred to output. This test is for functionality only
to assure adjustment through 0 V.
4/
If not tested, shall be guaranteed to the limits specified in table I herein.
5/
Full power bandwidth = SR / ( 2 x S x VPK).
6/
Rise and fall times measured between 10 percent and 90 percent point.
7/
Quiescent power consumption is based on quiescent supply current test maximum (no load outputs).
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015 of MIL-STD-883.
q
(2) TA = +125 C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a.
Tests shall be as specified in table II herein.
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Case X
Letter
A
Ib
ID
ID1
e
e1
F
k
k1
L
Inches
Min
.130
.016
.585
.545
Millimeters
Min
Max
3.30
3.81
0.41
0.53
14.86
15.62
13.84
14.10
10.16 BSC
2.54 BSC
0.51
1.02
0.69
0.86
0.69
1.14
12.83
14.27
Max
.150
.021
.615
.555
.400 BSC
.100 BSC
.020
.027
.027
.505
.040
.034
.045
.562
NOTES: 1. The US government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric
and inch-pound units, the inch-pound units shall take precedence.
2. Pin numbers are for reference only and do not appear on package.
FIGURE 1. Case outline.
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Device types
01 and 02
01, 02, and 03
02
03
Case outlines
X
C
2
P
Terminal
number
1
Terminal symbol
NC
NC
NC
BAL
2
NC
NC
BAL
-IN
3
BAL
BAL
NC
+IN
4
BAL
-IN
NC
-V
5
-IN
+IN
-IN
NC
6
+IN
-V
NC
OUT
7
NC
NC
+IN
+V
8
NC
NC
NC
BAL
9
NC
NC
NC
---
10
-V
OUTPUT
-V
---
11
OUTPUT
+V
NC
---
12
+V
BAL
NC
---
13
---
NC
NC
---
14
---
NC
NC
---
15
---
---
OUT
---
16
---
---
NC
---
17
---
---
+V
---
18
---
---
NC
---
19
---
---
NC
---
20
---
---
BAL
---
NC = No connection
FIGURE 1. Terminal connections.
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TABLE II. Electrical test requirements.
MIL-STD-883 test requirements
Subgroups
(in accordance with
MIL-STD-883, method 5005,
table I)
Interim electrical parameters
(method 5004)
---
Final electrical test parameters
(method 5004)
1*, 2,3,4,5,6
Group A test requirements
(method 5005)
1,2,3,4,5,6,7**,8**,9**10**,11**
Groups C and D end-point
electrical parameters
(method 5005)
1
* PDA applies to subgroup 1.
** Subgroups 7, 8, 9, 10, and 11, if not tested, shall be guaranteed to the
limits specified in table I herein.
4.3.2 Groups C and D inspections.
a.
End-point electrical parameters shall be as specified in table II herein.
b.
Steady-state life test conditions, method 1005 of MIL-STD-883.
(1)
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit
shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent
specified in test method 1005 of MIL-STD-883.
(2)
TA = +125 C, minimum.
(3)
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
q
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a
contractor-prepared specification or drawing.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-87785
A
REVISION LEVEL
B
SHEET
13
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished in accordance with MIL-STD-973 using DD Form 1692,
Engineering Change Proposal.
6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus when a system application
requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for
coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962)
should contact DSCC-VA, telephone (614) 692-0525.
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone
(614) 692-0674.
6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MILHDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted
by DSCC-VA.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-87785
A
REVISION LEVEL
B
SHEET
14
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 00-05-24
Approved sources of supply for SMD 5962-87785 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-383535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8778501CA
34371
HA1-2541/883
5962-8778501XA
3/
HA2-2541/883
5962-8778501XC
34371
HA2-2541/883
5962-8778502CA
3/
EL2041J/883B
5962-8778502XA
3/
EL2041G/883B
5962-87785022A
3/
EL2041L/883B
5962-8778503CA
34371
HA1-2841/883
5962-8778503PA
3/
HA7-2841/883
1/ The lead finish shown for each PIN representing a
hermetic package is the most readily available from the
manufacturer listed for that part. If the desired lead finish
is not listed contact the vendor to determine its availability.
2/ Caution. Do not use this number for item acquisition.
Items acquired to this number may not satisfy the
performance requirements of this drawing.
3/ Not available from approved source of supply.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
P.O. Box 883
Melbourne, FL 32902-0883
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
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