S-1317 Series
www.ablic.com
www.ablicinc.com
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR
WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
© ABLIC Inc., 2016
Rev.1.0_01
The S-1317 Series, developed by using the CMOS technology, is a positive voltage regulator IC, which features super low
current consumption and low dropout voltage. This IC has low current consumption of 0.35 A typ. and high-accuracy output
voltage of 1.0%. It is most suitable for use in portable equipment and battery-powered devices.
Features
Output voltage:
Input voltage:
Output voltage accuracy:
Dropout voltage:
Current consumption during operation:
Output current:
Input capacitor:
Output capacitor:
Built-in overcurrent protection circuit:
Operation temperature range:
Lead-free (Sn 100%), halogen-free
1.0 V to 3.5 V, selectable in 0.05 V step
1.5 V to 5.5 V
1.0% (1.0 V to 1.45 V output product: 15 mV) (Ta = 25°C)
20 mV typ. (2.5 V output product, at IOUT = 10 mA) (Ta = 25°C)
0.35 A typ. (Ta = 25°C)
Possible to output 100 mA (at VIN VOUT(S)1.0 V)*1
A ceramic capacitor can be used. (1.0 F or more)
A ceramic capacitor can be used. (1.0 F to 100 F)
Limits overcurrent of output transistor.
Ta = 40°C to 85°C
*1. Please make sure that the loss of the IC will not exceed the power dissipation when the output current is large.
Applications
Constant-voltage power supply for battery-powered device
Constant-voltage power supply for portable communication device, digital camera, and digital audio player
Constant-voltage power supply for home electric appliance
Packages
SOT-23-5
HSNT-4(1010)
1
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Block Diagram
*1
VIN
VOUT
Overcurrent
protection circuit
Reference
voltage circuit
VSS
*1.
Parasitic diode
Figure 1
2
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Product Name Structure
Users can select output voltage and package type for the S-1317 Series. Refer to "1. Product name" regarding the
contents of product name, "2. Packages" regarding the package drawings and "3. Product name list" regarding
details of the product name.
1.
Product name
S-1317
A xx
-
xxxx
U
4
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
M5T1: SOT-23-5, Tape
A4T2: HSNT-4(1010), Tape
Output voltage*2
10 to 35
(e.g., when the output voltage is 1.0 V, it is expressed as 10.)
Product type
*1.
*2.
2.
Refer to the tape drawing.
Contact our sales office when the product which has 0.05 V step is necessary.
Packages
Table 1
Package Name
SOT-23-5
HSNT-4(1010)
Dimension
MP005-A-P-SD
PL004-A-P-SD
Package Drawing Codes
Tape
MP005-A-C-SD
PL004-A-C-SD
Reel
MP005-A-R-SD
PL004-A-R-SD
Land
PL004-A-L-SD
3
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
3.
Product name list
Table 2
Output Voltage
SOT-23-5
HSNT-4(1010)
1.0 V 15 mV
S-1317A10-M5T1U4
S-1317A10-A4T2U4
1.2 V 15 mV
S-1317A12-M5T1U4
S-1317A12-A4T2U4
1.8 V 1.0%
S-1317A18-M5T1U4
S-1317A18-A4T2U4
2.5 V 1.0%
S-1317A25-M5T1U4
S-1317A25-A4T2U4
3.0 V 1.0%
S-1317A30-M5T1U4
S-1317A30-A4T2U4
Remark Please contact our sales office for products with specifications other than the above.
4
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Pin Configurations
1.
SOT-23-5
Table 3
Top view
5
4
1 2 3
Pin No.
1
2
3
4
5
Symbol
VIN
VSS
NC*1
NC*1
VOUT
Description
Input voltage pin
GND pin
No connection
No connection
Output voltage pin
Figure 2
*1. The NC pin is electrically open.
The NC pin can be connected to the VIN pin or the VSS pin.
2.
HSNT-4(1010)
Table 4
Top view
1
2
4
3
Bottom view
4
3
Pin No.
1
2
3
4
Symbol
VOUT
VSS
NC*2
VIN
Description
Output voltage pin
GND pin
No connection
Input voltage pin
1
2
*1
Figure 3
*1. Connect the heat sink of backside at shadowed area to the board, and set electric potential open or GND.
However, do not use it as the function of electrode.
*2. The NC pin is electrically open.
The NC pin can be connected to the VIN pin or the VSS pin.
5
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Absolute Maximum Ratings
Table 5
Item
(Ta = 25C unless otherwise specified)
Absolute Maximum Rating
Unit
Symbol
Input voltage
VIN
VSS 0.3 to VSS 6.0
Output voltage
VOUT
VSS 0.3 to VIN 0.3
Output current
IOUT
120
Operation ambient temperature
Topr
40 to 85
Storage temperature
Tstg
40 to 125
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
damage. These values must therefore not be exceeded under any conditions.
V
V
mA
C
C
physical
Thermal Resistance Value
Table 6
Item
Junction-to-ambient thermal resistance*1
*1.
JA
Condition
Board A
Board B
SOT-23-5
Board C
Board D
Board E
Board A
Board B
HSNT-4(1010)
Board C
Board D
Board E
Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark
6
Symbol
Refer to " Power Dissipation" and "Test Board" for details.
Min.
Typ.
192
160
378
317
Max.
Unit
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
C/W
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Electrical Characteristics
Table 7
Item
Output voltage*1
Output current
*2
Symbol
Condition
VOUT(E)
VIN = VOUT(S) 1.0 V,
IOUT = 10 mA
IOUT
VIN VOUT(S) 1.0 V
1.0 V VOUT(S) < 1.5 V
1.5 V VOUT(S) 3.5 V
1.0 V VOUT(S) < 1.1 V
1.1 V VOUT(S) < 1.2 V
1.2 V VOUT(S) < 1.3 V
1.3 V VOUT(S) < 1.4 V
1.4 V VOUT(S) < 1.5 V
1.5 V VOUT(S) < 1.7 V
1.7 V VOUT(S) < 1.8 V
1.8 V VOUT(S) < 2.0 V
2.0 V VOUT(S) < 2.5 V
2.5 V VOUT(S) < 2.8 V
2.8 V VOUT(S) < 3.0 V
3.0 V VOUT(S) 3.5 V
(Ta =25C unless otherwise specified)
Test
Min.
Typ.
Max.
Unit
Circuit
VOUT(S)
VOUT(S)
VOUT(S)
V
1
0.015
0.015
VOUT(S)
VOUT(S)
VOUT(S)
V
1
0.99
1.01
*5
100
mA
3
0.50
V
1
0.40
V
1
0.30
V
1
0.20
V
1
0.10
V
1
0.050
0.080
V
1
0.040
0.060
V
1
0.040
0.050
V
1
0.030
0.040
V
1
0.020
0.030
V
1
0.019
0.021
V
1
0.018
0.020
V
1
Dropout voltage*3
Vdrop
IOUT = 10 mA
Line regulation
VOUT1
VINVOUT
VOUT(S) 0.5 V VIN 5.5 V, IOUT = 10 mA
0.05
0.2
%/V
1
VOUT2
VOUT
TaVOUT
VIN = VOUT(S) 1.0 V, 1 A IOUT 50 mA
VIN = VOUT(S) 1.0 V, IOUT = 10 mA,
40C Ta 85C
20
40
mV
1
130
ppm/C
1
ISS1
VIN = VOUT(S) 1.0 V, no load
0.35
0.53
A
2
1.5
5.5
V
60
mA
3
Load regulation
Output voltage
temperature coefficient*4
Current consumption
during operation
Input voltage
Short-circuit current
VIN
Ishort
VIN = VOUT(S) 1.0 V, VOUT = 0 V
*1. VOUT(S): Set output voltage
VOUT(E): Actual output voltage
Output voltage when fixing IOUT (= 10 mA) and inputting VOUT(S) 1.0 V
*2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current.
*3. Vdrop = VIN1(VOUT3 0.98)
VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input voltage.
VOUT3 is the output voltage when VIN = VOUT(S) 1.0 V and IOUT = 10 mA.
*4. A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
VOUT
VOUT
[mV/°C]*1 = VOUT(S) [V]*2 TaV
[ppm/°C]*3 1000
Ta
OUT
*1. Change in temperature of output voltage
*2. Set output voltage
*3. Output voltage temperature coefficient
*5. Due to limitation of the power dissipation, this value may not be satisfied. Attention should be paid to the power
dissipation when the output current is large.
This specification is guaranteed by design.
7
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Test Circuits
VIN
VOUT
V
VSS
Figure 4
A
Test Circuit 1
VIN
VOUT
VSS
Figure 5
Test Circuit 2
VIN
VOUT
VSS
Figure 6
8
Test Circuit 3
A
V
A
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Standard Circuit
Input
CIN
VOUT
VIN
*1
Output
CL
*2
VSS
Single GND
*1.
*2.
GND
CIN is a capacitor for stabilizing the input.
CL is a capacitor for stabilizing the output.
Figure 7
Caution
The above connection diagram and constants will not guarantee successful operation. Perform
thorough evaluation including the temperature characteristics with an actual application to set the
constants.
Condition of Application
Input capacitor (CIN):
Output capacitor (CL):
Caution
A ceramic capacitor with capacitance of 1.0 F or more is recommended.
A ceramic capacitor with capacitance of 1.0 F to 100 F is recommended.
Generally, in a voltage regulator, an oscillation may occur depending on the selection of the external
parts. Perform thorough evaluation including the temperature characteristics with an actual
application using the above capacitors to confirm no oscillation occurs.
Selection of Input Capacitor (CIN) and Output Capacitor (CL)
The S-1317 Series requires CL between the VOUT pin and the VSS pin for phase compensation. The operation is
stabilized by a ceramic capacitor with capacitance of 1.0 F to 100 F. When using an OS capacitor, a tantalum
capacitor or an aluminum electrolytic capacitor, the capacitance must also be 1.0 F to 100 F. However, an oscillation
may occur depending on the equivalent series resistance (ESR).
Moreover, the S-1317 Series requires CIN between the VIN pin and the VSS pin for a stable operation.
Generally, an oscillaiton may occur when a voltage regulator is used under the conditon that the impedance of the power
supply is high. Note that the output voltage transient characteristics vary depending on the capacitance of CIN and CL and
the value of ESR.
Caution Perform thorough evaluation including the temperature characteristics with an actual application to
select CIN and CL.
9
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Explanation of Terms
1.
Output voltage (VOUT)
This voltage is output at an accuracy of 1.0% or 15 mV*2 when the input voltage, the output current and the
temperature are in a certain condition*1.
*1.
*2.
Differs depending on the product.
When VOUT < 1.5 V: 15 mV, when VOUT 1.5 V: 1.0%
Caution
2.
If the certain condition is not satisfied, the output voltage may exceed the accuracy range of
1.0% or 15 mV. Refer to " Electrical Characteristics" for details.
VOUT1
VINVOUT
Line regulation
Indicates the dependency of the output voltage against the input voltage. The value shows how much the output
voltage changes due to a change in the input voltage after fixing output current constant.
3.
Load regulation (VOUT2)
Indicates the dependency of the output voltage against the output current. The value shows how much the output
voltage changes due to a change in the output current after fixing input voltage constant.
4.
Dropout voltage (Vdrop)
Indicates the difference between input voltage (VIN1) and the output voltage when the output voltage becomes 98%
of the output voltage value (VOUT3) at VIN = VOUT(S) 1.0 V after the input voltage (VIN) is decreased gradually.
Vdrop = VIN1 (VOUT3 0.98)
10
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
5.
VOUT
Output voltage temperature coefficient
TaVOUT
The shaded area in Figure 8 is the range where VOUT varies in the operation temperature range when the output
voltage temperature coefficient is 130 ppm/C.
Example of S-1317A10 typ. product
VOUT
[V]
0.13 mV/C
*1
VOUT(E)
0.13 mV/C
40
*1.
25
85
Ta [C]
VOUT(E) is the value of the output voltage measured at Ta = 25C.
Figure 8
A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
VOUT
VOUT
[mV/°C]*1 = VOUT(S) [V]*2 TaV
[ppm/°C]*3 1000
Ta
OUT
*1. Change in temperature of output voltage
*2. Set output voltage
*3. Output voltage temperature coefficient
11
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Operation
1.
Basic operation
Figure 9 shows the block diagram of the S-1317 Series to describe the basic operation.
The error amplifier compares the feedback voltage (Vfb) whose output voltage (VOUT) is divided by the feedback
resistors (Rs and Rf) with the reference voltage (Vref). The error amplifier controls the output transistor,
consequently, the regulator starts the operation that holds VOUT constant without the influence of the input voltage
(VIN).
VIN
*1
Current
Supply
Error amplifier
Vref
VOUT
Rf
Vfb
Reference voltage
circuit
Rs
VSS
*1.
Parasitic diode
Figure 9
2.
Output transistor
In the S-1317 Series, a low on-resistance P-channel MOS FET is used between the VIN pin and the VOUT pin as
the output transistor. In order to keep VOUT constant, the ON resistance of the output transistor varies appropriately
according to the output current (IOUT).
Caution Since a parasitic diode exists between the VIN pin and the VOUT pin due to the structure of the
transistor, the IC may be damaged by a reverse current if VOUT becomes higher than VIN.
Therefore, be sure that VOUT does not exceed VIN0.3 V.
3.
Overcurrent protection circuit
The S-1317 Series has a built-in overcurrent protection circuit to limit the overcurrent of the output transistor.
When the VOUT pin is shorted to the VSS pin, that is, at the time of the output short-circuit, the output current is
limited to 60 mA typ. due to the overcurrent protection circuit operation. The S-1317 Series restarts regulating
when the output transistor is released from the overcurrent status.
Caution This overcurrent protection circuit does not work as for thermal protection. If this IC long keeps
short circuiting inside, pay attention to the conditions of input voltage and load current so that,
under the usage conditions including short circuit, the loss of the IC will not exceed power
dissipation.
12
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Precautions
Generally, when a voltage regulator is used under the condition that the load current value is small (1 A or less), the
output voltage may increase due to the leakage current of an output transistor.
Generally, when a voltage regulator is used under the condition that the temperature is high, the output voltage may
increase due to the leakage current of an output transistor.
Generally, when a voltage regulator is used under the condition that the impedance of the power supply is high, an
oscillation may occur. Perform thorough evaluation including the temperature characteristics with an actual application
to select CIN.
Generally, in a voltage regulator, an oscillation may occur depending on the selection of the external parts. The
following use conditions are recommended in the S-1317 Series, however, perform thorough evaluation including the
temperature characteristics with an actual application to select CIN and CL.
Input capacitor (CIN):
Output capacitor (CL):
A ceramic capacitor with capacitance of 1.0 F or more is recommended.
A ceramic capacitor with capacitance of 1.0 F to 100 F is recommended.
Generally, in a voltage regulator, the values of an overshoot and an undershoot in the output voltage vary depending
on the variation factors of input voltage start-up, input voltage fluctuation and load fluctuation etc., or the capacitance of
CIN or CL and the value of the equivalent series resistance (ESR), which may cause a problem to the stable
operation. Perform thorough evaluation including the temperature characteristics with an actual application to select CIN
and CL.
Generally, in a voltage regulator, if the VOUT pin is steeply shorted with GND, a negative voltage exceeding the
absolute maximum ratings may occur in the VOUT pin due to resonance phenomenon of the inductance and the
capacitance including CL on the application. The resonance phenomenon is expected to be weakened by inserting a
series resistor into the resonance path, and the negative voltage is expected to be limited by inserting a protection
diode between the VOUT pin and the VSS pin.
Make sure of the conditions for the input voltage, output voltage and the load current so that the internal loss does not
exceed the power dissipation.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
When considering the output current value that the IC is able to output, make sure of the output current value specified
in Table 7 in " Electrical Characteristics" and footnote *5 of the table.
Wiring patterns on the application related to the VIN pin, the VOUT pin and the VSS pin should be designed so that the
impedance is low. When mounting CIN between the VIN pin and the VSS pin and CL between the VOUT pin and the
VSS pin, connect the capacitors as close as possible to the respective destination pins of the IC.
In the package equipped with heat sink of backside, mount the heat sink firmly. Since the heat radiation differs
according to the condition of the application, perform thorough evaluation with an actual application to confirm no
problems happen.
ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
13
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Characteristics (Typical Data)
Output voltage vs. Output current (When load current increases) (Ta = 25C)
1.
1. 1
VOUT = 1.0 V
1. 2
1.2
3.0
1.0
0.6
0.4
VOUT [V]
VOUT [V]
2.5
VIN = 1.3 V
VIN = 1.5 V
VIN = 2.0 V
VIN = 3.0 V
VIN = 5.5 V
0.8
0.2
100
1.0
200
300
IOUT [mA]
400
0
500
100
200
300
IOUT [mA]
400
500
VOUT = 3.5 V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VOUT [V]
1.5
0.0
0
VIN = 3.8 V
VIN = 4.0 V
VIN = 4.5 V
VIN = 5.5 V
0
100
200
300
IOUT [mA]
400
Remark
In determining the output current, attention should
be paid to the following.
1. The minimum output current value and
footnote *5 of Table 7 in " Electrical
Characteristics"
2. Power dissipation
500
Output voltage vs. Input voltage (Ta = 25C)
2.
2. 1
VOUT = 1.0 V
2. 2
1.2
1.0
0.9
VOUT [V]
VOUT [V]
1.1
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
0.8
0.7
0.6
0.6
VOUT [V]
2. 3
1.0
1.4
1.8
VIN [V]
2.2
2.6
5.0
5.5
VOUT = 3.5 V
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3.0
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
3.0
14
VIN = 2.8 V
VIN = 3.0 V
VIN = 3.5 V
VIN = 4.5 V
VIN = 5.5 V
2.0
0.5
0.0
1. 3
VOUT = 2.5 V
3.5
4.0
4.5
VIN [V]
VOUT = 2.5 V
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
2.0
2.5
3.0
3.5
VIN [V]
4.0
4.5
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
3.
Dropout voltage vs. Output current
3. 1
VOUT = 1.0 V
3. 2
1.2
Vdrop [V]
0.8
Vdrop [V]
Ta = +85C
Ta = +25C
Ta = 40C
1.0
0.6
0.4
0.2
0.0
Vdrop [V]
3. 3
4.
0
20
40
60
IOUT [mA]
80
100
80
100
VOUT = 2.5 V
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
Ta = +85C
Ta = +25C
Ta = 40C
0
20
40
60
IOUT [mA]
80
100
VOUT = 3.5 V
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
Ta = +85C
Ta = +25C
Ta = 40C
0
20
40
60
IOUT [mA]
Dropout voltage vs. Set output voltage
1.2
Vdrop [V]
1.0
0.8
0.6
0.4
IOUT = 0.1 mA
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
0.2
0.0
1.0
1.5
2.0
2.5
VOUT(S) [V]
3.0
3.5
15
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Output voltage vs. Ambient temperature
VOUT [V]
5. 1
VOUT = 1.0 V
5. 2
2.70
1.05
2.60
1.00
0.95
0.90
5. 3
VOUT = 2.5 V
1.10
VOUT [V]
5.
2.50
2.40
−40 −25
0
25
Ta [°C]
50
75 85
0
25
Ta [°C]
50
75 85
2.30
−40 −25
0
25
Ta [°C]
50
75 85
VOUT = 3.5 V
3.80
VOUT [V]
3.70
3.60
3.50
3.40
3.30
3.20
Current consumption vs. Input voltage
ISS1 [A]
6. 1
VOUT = 1.0 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Ta = +85C
Ta = +25C
Ta = 40C
0.0
ISS1 [A]
6. 3
1.0
2.0
3.0
4.0
VIN [V]
5.0
6.0
5.0
6.0
VOUT = 3.5 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Ta = +85C
Ta = +25C
Ta = 40C
0.0
16
6. 2
ISS1 [A]
6.
−40 −25
1.0
2.0
3.0
4.0
VIN [V]
VOUT = 2.5 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Ta = +85C
Ta = +25C
Ta = 40C
0.0
1.0
2.0
3.0
4.0
VIN [V]
5.0
6.0
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Current consumption vs. Ambient temperature
ISS1 [A]
7. 3
8.
VOUT = 1.0 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
7. 2
VIN = 2.0 V
ISS1 [A]
ISS1 [A]
7. 1
VIN = 5.5 V
−40 −25
0
25
Ta [C]
50
VOUT = 2.5 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
75 85
VIN = 3.5 V
VIN = 5.5 V
−40 −25
0
25
Ta [C]
50
75 85
VOUT = 3.5 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VIN = 4.5 V
VIN = 5.5 V
−40 −25
0
25
Ta [C]
50
75 85
Current consumption vs. Output current
ISS1 [A]
8. 1
ISS1 [A]
8. 3
VOUT = 1.0 V
40
35
30
25
20
15
10
5
0
8. 2
ISS1 [A]
7.
VIN = 2.0 V
VIN = 5.5 V
0
20
40
60
IOUT [mA]
80
100
VOUT = 2.5 V
40
35
30
25
20
15
10
5
0
VIN = 3.5 V
VIN = 5.5 V
0
20
40
60
IOUT [mA]
80
100
VOUT = 3.5 V
40
35
30
25
20
15
10
5
0
VIN = 4.5 V
VIN = 5.5 V
0
20
40
60
IOUT [mA]
80
100
17
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Reference Data
Characteristics of input transient response (Ta = 25C)
VIN [V]
VIN [V]
IOUT = 50 mA, CIN = CL = 1 F, VIN = 3.5 V 4.5 V, tr = tf = 5.0 s
3.0
5.5
2.9
5.0
2.8
4.5
2.7 VIN
4.0
2.6
3.5
2.5
3.0
2.4 VOUT
2.5
2.3
2.0
1.5
2.2
−200 0
200 400 600 800 1000 1200
t [s]
VIN [V]
VIN [V]
VOUT [V]
VOUT = 3.5 V
IOUT = 1 mA, CIN = CL = 1 F, VIN = 4.5 V 5.5 V, tr = tf = 5.0 s
4.0
6.5
3.9
6.0
3.8
5.5
3.7
5.0
VIN
3.6
4.5
3.5
4.0
3.4 VOUT
3.5
3.3
3.0
2.5
3.2
−200 0
200 400 600 800 1000 1200
t [s]
IOUT = 50 mA, CIN = CL = 1 F, VIN = 4.5 V 5.5 V, tr = tf = 5.0 s
4.0
6.5
3.9
6.0
3.8
5.5
3.7
5.0
VIN
3.6
4.5
3.5
4.0
3.4 VOUT
3.5
3.3
3.0
2.5
3.2
−200 0
200 400 600 800 1000 1200
t [s]
VIN [V]
VOUT [V]
VOUT [V]
IOUT = 50 mA, CIN = CL = 1 F, VIN = 2.0 V 3.0 V, tr = tf = 5.0 s
1.5
4.0
1.4
3.5
1.3
3.0
1.2 VIN
2.5
1.1
2.0
1.0
1.5
0.9 VOUT
1.0
0.8
0.5
0.0
0.7
−200 0
200 400 600 800 1000 1200
t [s]
VOUT = 2.5 V
IOUT = 1 mA, CIN = CL = 1 F, VIN = 3.5 V 4.5 V, tr = tf = 5.0 s
3.0
5.5
2.9
5.0
2.8
4.5
2.7 VIN
4.0
2.6
3.5
2.5
3.0
2.4 VOUT
2.5
2.3
2.0
1.5
2.2
−200 0
200 400 600 800 1000 1200
t [s]
1. 3
VOUT [V]
IOUT = 1 mA, CIN = CL = 1 F, VIN = 2.0 V 3.0 V, tr = tf = 5.0 s
1.5
4.0
1.4
3.5
1.3
3.0
1.2 VIN
2.5
1.1
2.0
1.0
1.5
VOUT
0.9
1.0
0.8
0.5
0.0
0.7
−200 0
200 400 600 800 1000 1200
t [s]
1. 2
18
VOUT = 1.0 V
VIN [V]
VOUT [V]
1. 1
VOUT [V]
1.
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
IOUT [mA]
VIN = 3.5 V, CIN = CL = 1 F, IOUT = 10 mA 50 mA, tr = tf = 5.0 s
3.0
75
50
2.9
25
2.8
0
2.7 IOUT
25
2.6
50
2.5
75
2.4 VOUT
100
2.3
125
2.2
100 0
100 200 300 400 500 600
t [s]
IOUT [mA]
VOUT [V]
IOUT [mA]
VOUT = 3.5 V
VIN = 4.5 V, CIN = CL = 1 F, IOUT = 1 mA 10 mA, tr = tf = 5.0 s
4.0
75
3.9
50
3.8
25
3.7
0
IOUT
−25
3.6
−50
3.5
3.4 VOUT
−75
3.3
−100
−125
3.2
−400 0
400 800 1200 1600 2000 2400
t [s]
VIN = 4.5 V, CIN = CL = 1 F, IOUT = 10 mA 50 mA, tr = tf = 5.0 s
4.0
75
50
3.9
25
3.8
0
3.7 IOUT
−25
3.6
−50
3.5
−75
3.4 VOUT
−100
3.3
−125
3.2
−800 0
800 1600 2400 3200 4000 4800
t [s]
IOUT [mA]
VOUT [V]
VIN = 2.0 V, CIN = CL = 1 F, IOUT = 10 mA 50 mA, tr = tf = 5.0 s
1.5
75
1.4
50
1.3
25
1.2 IOUT
0
25
1.1
50
1.0
0.9 VOUT
75
0.8
100
125
0.7
200 0
200 400 600 800 1000 1200
t [s]
VOUT = 2.5 V
VIN = 3.5 V, CIN = CL = 1 F, IOUT = 1 mA 10 mA, tr = tf = 5.0 s
3.0
75
2.9
50
2.8
25
2.7
0
IOUT
25
2.6
50
2.5
VOUT
2.4
75
2.3
100
125
2.2
100 0
100 200 300 400 500 600
t [s]
2. 3
VOUT [V]
IOUT [mA]
VIN = 2.0 V, CIN = CL = 1 F, IOUT = 1 mA 10 mA, tr = tf = 5.0 s
1.5
75
1.4
50
1.3
25
1.2
0
IOUT
1.1
25
1.0
50
VOUT
0.9
75
0.8
100
125
0.7
200 0
200 400 600 800 1000 1200
t [s]
2. 2
VOUT [V]
VOUT = 1.0 V
IOUT [mA]
VOUT [V]
2. 1
Characteristics of load transient response (Ta = 25C)
VOUT [V]
2.
19
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
3.
Ripple rejection (Ta = 25C)
3. 1
3. 2
VOUT = 1.0 V
VOUT = 2.5 V
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
10
3. 3
100
VIN = 3.5 V, CL = 1.0 F
Ripple Rejection [dB]
Ripple Rejection [dB]
VIN = 2.0 V, CL = 1.0 F
100
90
80
70
60
50
40
30
20
10
0
1k
10k
100k
Frequency [Hz]
100
90
80
70
60
50
40
30
20
10
0
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
10
1M
100
1k
10k
100k
Frequency [Hz]
1M
VOUT = 3.5 V
Ripple Rejection [dB]
VIN = 4.5 V, CL = 1.0 F
100
90
80
70
60
50
40
30
20
10
0
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
10
4.
100
1k
10k
100k
Frequency [Hz]
1M
Example of equivalent series resistance vs. Output current characteristics (Ta = 25C)
CIN = CL = 1.0 F
100
RESR []
VIN
CIN
Stable
VOUT
S-1317 Series
CL
0
0.01
VSS
100
*1
RESR
IOUT [mA]
*1.
Figure 10
20
CL: TDK Corporation C3216X7R1H105K160AB
Figure 11
5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.35 A SUPER LOW CURRENT CONSUMPTION
Rev.1.0_01
S-1317 Series
Power Dissipation
SOT-23-5
HSNT-4(1010)
Tj = 125C max.
0.8
B
0.6
A
0.4
0.2
0.0
0
25
50
75
100
125
150
175
Tj = 125C max.
1.0
Power dissipation (PD) [W]
Power dissipation (PD) [W]
1.0
0.8
0.6
0.4 B
0.2 A
0.0
0
25
Ambient temperature (Ta) [C]
Board
A
B
C
D
E
Power Dissipation (PD)
0.52 W
0.63 W
50
75
100
125
150
175
Ambient temperature (Ta) [C]
Board
A
B
C
D
E
Power Dissipation (PD)
0.26 W
0.32 W
21
SOT-23-3/3S/5/6 Test Board
IC Mount Area
(1) Board A
Item
Size [mm]
Material
Number of copper foil layer
Copper foil layer [mm]
1
2
3
4
Thermal via
Specification
114.3 x 76.2 x t1.6
FR-4
2
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.070
-
(2) Board B
Item
Size [mm]
Material
Number of copper foil layer
Copper foil layer [mm]
Thermal via
1
2
3
4
Specification
114.3 x 76.2 x t1.6
FR-4
4
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
-
No. SOT23x-A-Board-SD-2.0
ABLIC Inc.
HSNT-4(1010) Test Board
IC Mount Area
(1) Board A
Item
Size [mm]
Material
Number of copper foil layer
Copper foil layer [mm]
1
2
3
4
Thermal via
Specification
114.3 x 76.2 x t1.6
FR-4
2
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.070
-
(2) Board B
Item
Size [mm]
Material
Number of copper foil layer
Copper foil layer [mm]
Thermal via
1
2
3
4
Specification
114.3 x 76.2 x t1.6
FR-4
4
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
-
No. HSNT4-B-Board-SD-1.0
ABLIC Inc.
2.9±0.2
1.9±0.2
4
5
1
2
+0.1
0.16 -0.06
3
0.95±0.1
0.4±0.1
No. MP005-A-P-SD-1.3
TITLE
SOT235-A-PKG Dimensions
No.
MP005-A-P-SD-1.3
ANGLE
UNIT
mm
ABLIC Inc.
4.0±0.1(10 pitches:40.0±0.2)
+0.1
ø1.5 -0
+0.2
ø1.0 -0
2.0±0.05
0.25±0.1
4.0±0.1
1.4±0.2
3.2±0.2
3 2 1
4
5
Feed direction
No. MP005-A-C-SD-2.1
TITLE
SOT235-A-Carrier Tape
No.
MP005-A-C-SD-2.1
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. MP005-A-R-SD-1.1
SOT235-A-Reel
TITLE
No.
MP005-A-R-SD-1.1
ANGLE
QTY.
UNIT
mm
ABLIC Inc.
3,000
0.38±0.02
0.65
3
4
1
2
1.00±0.04
0.20±0.05
+0.05
0.08 -0.02
The heat sink of back side has different electric
potential depending on the product.
Confirm specifications of each product.
Do not use it as the function of electrode.
No. PL004-A-P-SD-1.1
TITLE
HSNT-4-B-PKG Dimensions
No.
PL004-A-P-SD-1.1
ANGLE
UNIT
mm
ABLIC Inc.
2.0±0.05
+0.1
ø1.5 -0
4.0±0.05
0.25±0.05
+0.1
1.12±0.05
2
1
3
4
ø0.5 -0
2.0±0.05
0.5±0.05
Feed direction
No. PL004-A-C-SD-2.0
TITLE
HSNT-4-B-C a r r i e r Tape
No.
PL004-A-C-SD-2.0
ANGLE
UNIT
mm
ABLIC Inc.
+1.0
9.0 - 0.0
11.4±1.0
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PL004-A-R-SD-1.0
HSNT-4-B-Reel
TITLE
PL004-A-R-SD-1.0
No.
QTY.
ANGLE
UNIT
mm
ABLIC Inc.
10,000
Land Pattern
0.30min.
0.38~0.48
0.38~0.48
0.07
0.65±0.02
(1.02)
Caution It is recommended to solder the heat sink to a board
in order to ensure the heat radiation.
PKG
Metal Mask Pattern
Aperture ratio
Aperture ratio
Caution
Mask aperture ratio of the lead mounting part is 100%.
Mask aperture ratio of the heat sink mounting part is 40%.
Mask thickness: t0.10mm to 0.12 mm
100%
40%
t0.10mm ~ 0.12 mm
TITLE
No. PL004-A-L-SD-2.0
HSNT-4-B
-Land Recommendation
PL004-A-L-SD-2.0
No.
ANGLE
UNIT
mm
ABLIC Inc.
Disclaimers (Handling Precautions)
1.
All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2.
The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4.
Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5.
Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6.
When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7.
The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8.
The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9.
In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
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