S-1133B60-U5T1U

S-1133 Series www.ablic.com www.ablicinc.com HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 © ABLIC Inc., 2006-2015 The S-1133 Series is a positive voltage regulator with a low dropout voltage, high output voltage accuracy, and low current consumption (300 mA output current) developed based on CMOS technology. A 1 F small ceramic capacitor can be used*1. It operates with low current consumption of 60 A typ. The S-1133 Series includes an overcurrent protection circuit that prevents the output current from exceeding the current capacity of the output transistor and a thermal shutdown circuit that prevents damage due to overheating. In addition to the types in which output voltage is set inside the IC, a type for which output voltage can be set via an external resistor is added to a lineup (S-1133x00 Series). SOT-89-5 and super-small SNT-8A packages realize high-density mounting. This, in addition to low current consumption, makes the S-1133 Series ideal for mobile devices. *1. A ceramic capacitor of 2.2 F or more can be used for products whose output voltage is 1.7 V or less.  Features  Output voltage (internally set):  Output voltage (externally set):  Input voltage:  Output voltage accuracy:  Dropout voltage:  Current consumption:  Output current:  Input and output capacitors:  Ripple rejection:  Built-in overcurrent protection circuit:  Built-in thermal shutdown circuit:  Built-in ON / OFF circuit:  Operation temperature range:  Lead-free, Sn 100%, halogen-free*2 *1. *2. 1.2 V to 6.0 V, selectable in 0.1 V step. 1.8 V to 8.2 V, settable via external resistor (S-1133B00/S-1133A00) 2.0 V to 10 V 1.0% (1.2 V to 1.4 V output product: 15 mV) 130 mV typ. (3.0 V output product, IOUT = 100 mA) During operation: 60 A typ., 90 A max. During power-off: 0.1 A typ., 1.0 A max. Possible to output 300 mA (VIN  VOUT(S)  1.0 V)*1 A ceramic capacitor of 1.0 F or more can be used. (A ceramic capacitor of 2.2 F or more can be used for products whose output voltage is 1.7 V or less.) 70 dB typ. (1.2 V output product, f = 1.0 kHz) Limits overcurrent of output transistor. Prevents damage caused by heat. Ensures long battery life. Ta = 40C to 85C Attention should be paid to the power dissipation of the package when the output current is large. Refer to “ Product Name Structure” for details.  Applications  Power supply for battery-powered devices  Power supply for communication devices  Power supply for home electric appliances  Packages  SOT-89-5  SNT-8A 1 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Block Diagrams 1. Types in which output voltage is internally set (S-1133x12 to S-1133x60) *1 VOUT VIN Thermal shutdown circuit Overcurrent protection circuit ON / OFF circuit ON / OFF Reference voltage circuit VSS *1. Parasitic diode Figure 1 2. Types in which output voltage is externally set (S-1133B00 and S-1133A00 only) *1 VOUT VIN Thermal shutdown circuit Overcurrent protection circuit VADJ ON / OFF circuit ON / OFF Reference voltage circuit VSS *1. Parasitic diode Figure 2 2 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Product Name Structure  The product types, output voltage, and package types for the S-1133 Series can be selected at the user’s request. Refer to the “1. Product name” for the meanings of the characters in the product name, “2. Package” regarding the package drawings and “3. Product name list” for the full product names. 1. Product name 1. 1 SOT-89-5 S-1133 x xx  U5T1 x Environmental code U: Lead-free (Sn 100%), halogen-free G: Lead-free (for details, please contact our sales office) Package abbreviation and packing specifications*1 U5T1: SOT-89-5, Tape Output voltage 00: Externally set 12 to 60: Internally set (e.g., when the output voltage is 1.2 V, it is expressed as 12.) Product type*2 A: ON / OFF pin negative logic B: ON / OFF pin positive logic *1. *2. 1. 2 Refer to the tape drawing. Refer to “3. ON / OFF pin” in “ Operation”. SNT-8A S-1133 x xx  I8T1 U Environmental code U: Lead-free (Sn 100%), halogen-free Package abbreviation and packing specifications*1 I8T1: SNT-8A, Tape Output voltage 00: Externally set 12 to 60: Internally set (e.g., when the output voltage is 1.2 V, it is expressed as 12.) Product type*2 A: ON / OFF pin negative logic B: ON / OFF pin positive logic *1. Refer to the tape drawing. *2. Refer to “3. ON / OFF pin” in “ Operation”. 3 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series 2. Packages Package Name SOT-89-5 SNT-8A 4 Package UP005-A-P-SD PH008-A-P-SD Drawing Code Tape Reel UP005-A-C-SD UP005-A-R-SD PH008-A-C-SD PH008-A-R-SD Land UP005-A-L-S1 PH008-A-L-SD HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series 3. Product name list Table 1 (1/2) Output Voltage SOT-89-5 SNT-8A Externally set S-1133B00-U5T1x S-1133B00-I8T1U 1.2 V 15 mV S-1133B12-U5T1x S-1133B12-I8T1U 1.3 V 15 mV S-1133B13-U5T1x S-1133B13-I8T1U 1.4 V 15 mV S-1133B14-U5T1x S-1133B14-I8T1U 1.5 V 1.0% S-1133B15-U5T1x S-1133B15-I8T1U 1.6 V 1.0% S-1133B16-U5T1x S-1133B16-I8T1U 1.7 V 1.0% S-1133B17-U5T1x S-1133B17-I8T1U 1.8 V 1.0% S-1133B18-U5T1x S-1133B18-I8T1U 1.9 V 1.0% S-1133B19-U5T1x S-1133B19-I8T1U 2.0 V 1.0% S-1133B20-U5T1x S-1133B20-I8T1U 2.1 V 1.0% S-1133B21-U5T1x S-1133B21-I8T1U 2.2 V 1.0% S-1133B22-U5T1x S-1133B22-I8T1U 2.3 V 1.0% S-1133B23-U5T1x S-1133B23-I8T1U 2.4 V 1.0% S-1133B24-U5T1x S-1133B24-I8T1U 2.5 V 1.0% S-1133B25-U5T1x S-1133B25-I8T1U 2.6 V 1.0% S-1133B26-U5T1x S-1133B26-I8T1U 2.7 V 1.0% S-1133B27-U5T1x S-1133B27-I8T1U 2.8 V 1.0% S-1133B28-U5T1x S-1133B28-I8T1U 2.9 V 1.0% S-1133B29-U5T1x S-1133B29-I8T1U 3.0 V 1.0% S-1133B30-U5T1x S-1133B30-I8T1U 3.1 V 1.0% S-1133B31-U5T1x S-1133B31-I8T1U 3.2 V 1.0% S-1133B32-U5T1x S-1133B32-I8T1U 3.3 V 1.0% S-1133B33-U5T1x S-1133B33-I8T1U 3.4 V 1.0% S-1133B34-U5T1x S-1133B34-I8T1U 3.5 V 1.0% S-1133B35-U5T1x S-1133B35-I8T1U 3.6 V 1.0% S-1133B36-U5T1x S-1133B36-I8T1U 3.7 V 1.0% S-1133B37-U5T1x S-1133B37-I8T1U 3.8 V 1.0% S-1133B38-U5T1x S-1133B38-I8T1U 3.9 V 1.0% S-1133B39-U5T1x S-1133B39-I8T1U 4.0 V 1.0% S-1133B40-U5T1x S-1133B40-I8T1U 4.1 V 1.0% S-1133B41-U5T1x S-1133B41-I8T1U 4.2 V 1.0% S-1133B42-U5T1x S-1133B42-I8T1U 4.3 V 1.0% S-1133B43-U5T1x S-1133B43-I8T1U 4.4 V 1.0% S-1133B44-U5T1x S-1133B44-I8T1U 4.5 V 1.0% S-1133B45-U5T1x S-1133B45-I8T1U 4.6 V 1.0% S-1133B46-U5T1x S-1133B46-I8T1U 4.7 V 1.0% S-1133B47-U5T1x S-1133B47-I8T1U 4.8 V 1.0% S-1133B48-U5T1x S-1133B48-I8T1U 4.9 V 1.0% S-1133B49-U5T1x S-1133B49-I8T1U 5.0 V 1.0% S-1133B50-U5T1x S-1133B50-I8T1U 5.1 V 1.0% S-1133B51-U5T1x S-1133B51-I8T1U 5.2 V 1.0% S-1133B52-U5T1x S-1133B52-I8T1U 5.3 V 1.0% S-1133B53-U5T1x S-1133B53-I8T1U 5.4 V 1.0% S-1133B54-U5T1x S-1133B54-I8T1U 5.5 V 1.0% S-1133B55-U5T1x S-1133B55-I8T1U 5.6 V 1.0% S-1133B56-U5T1x S-1133B56-I8T1U 5 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series Table 1 (2/2) Output Voltage SNT-8A S-1133B57-U5T1x S-1133B57 I8T1U 5.8 V 1.0% S-1133B58-U5T1x S-1133B58-I8T1U 5.9 V 1.0% S-1133B59-U5T1x S-1133B59-I8T1U 6.0 V 1.0% S-1133B60-U5T1x S-1133B60-I8T1U Remark 1. 2. 3. 6 SOT-89-5 5.7 V 1.0% Please contact our sales office for type A products. x: G or U Please select products of environmental code = U for Sn 100%, halogen-free products. HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Pin Configurations 1. SOT-89-5 Table 2 Top view 5 4 Pin No. Symbol VADJ 1 NC*1 1 2 3 *1. Description Output voltage adjustment pin (S-1133B00/S-1133A00 only) No connection (S-1133x12 to S-1133x60) GND pin ON / OFF pin Voltage input pin Voltage output pin 2 VSS 3 ON / OFF 4 VIN 5 VOUT The NC pin is electrically open. The NC pin can be connected to the VIN pin or the VSS pin. Figure 3 2. SNT-8A Top view 1 2 3 4 Table 3 8 7 6 5 Pin No. Pin Name *1 1 VOUT 2 VOUT*1 NC*2 3 VADJ Figure 4 *2 Functions Voltage output pin Voltage output pin No connection (S-1133x12 to S-1133x60) Output voltage adjustment pin (S-1133B00/S-1133A00 only) NC No connection 5 VSS GND pin 6 ON / OFF 4 7 *3 VIN ON / OFF pin Voltage input pin *3 *1. VIN 8 Voltage input pin Although pins of number 1 and 2 are connected internally, be sure to short-circuit them nearest in use. *2. The NC pin is electrically open. The NC pin can be connected to the VIN pin or the VSS pin. *3. Although pins of number 7 and 8 are connected internally, be sure to short-circuit them nearest in use. 7 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Absolute Maximum Ratings Table 4 Item Input voltage Output voltage Symbol VIN VON / OFF VADJ VOUT SOT-89-5 PD SNT-8A Operation ambient temperature Topr Storage temperature Tstg *1. When mounted on printed circuit board [Mounted Board] (1) Board size : 114.3 mm  76.2 mm  t1.6 mm (2) Board name : JEDEC STANDARD51-7 Power dissipation Caution (Ta  25 C unless otherwise specified) Absolute Maximum Rating Unit VSS  0.3 to VSS  12 V VSS  0.3 to VSS  12 V VSS  0.3 to VSS  12 V VSS  0.3 to VIN  0.3 V 1000*1 mW 450*1 mW 40 to 85 C 40 to 125 C The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation (PD) [mW] 1200 SOT-89-5 800 SNT-8A 400 0 0 150 100 50 Ambient Temperature (Ta) [C] Figure 5 Power Dissipation of Packages (Mounted on Printed Circuit Board) Caution 8 The thermal shutdown circuit may operate when the junction temperature is around 150 C. HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Electrical Characteristics 1. Types in which output voltage is internally set (S-1133x12 to S-1133x60) Table 5 Item Output voltage*1 *2 Output current Dropout voltage*3 Line regulation Load regulation Output voltage *4 temperature coefficient Current consumption during operation Current consumption during power-off Input voltage ON / OFF pin input voltage “H” ON / OFF pin input voltage “L” ON / OFF pin input current “H” ON / OFF pin input current “L” Ripple rejection Short-circuit current Thermal shutdown detection temperature Thermal shutdown release temperature Symbol VOUT(E) IOUT Vdrop VOUT1 VIN VOUT Conditions VIN  VOUT(S)  1.0 V, IOUT  100 mA 1.2 V  VOUT(S)  1.4 V 1.5 V  VOUT(S)  6.0 V VIN  VOUT(S)  1.0 V IOUT  100 mA VOUT(S)  1.2 V VOUT(S)  1.3 V VOUT(S)  1.4 V 1.5 V  VOUT(S)  1.9 V 2.0 V  VOUT(S)  2.4 V 2.5 V  VOUT(S)  2.9 V 3.0 V  VOUT(S)  3.2 V 3.3 V  VOUT(S)  6.0 V VOUT(S)  0.5 V  VIN  10 V, IOUT  100 mA (Ta  25 C unless otherwise specified) Test Min. Typ. Max. Unit Circuit VOUT(S) VOUT(S) V 1 VOUT(S)  0.015  0.015 VOUT(S) VOUT(S) V 1 VOUT(S)  1.01  0.99 *5 300   mA 3 0.8 0.84 0.88 V 1  0.74 0.78 V 1  0.64 0.68 V 1  0.54 0.58 V 1  0.15 0.23 V 1  0.14 0.21 V 1  0.13 0.19 V 1  0.10 0.15 V 1  0.02 0.2 %/V 1  15 40 mV 1  130  ppm/C 1  60 90 A 2  0.1 1.0 A 2 VIN VIN  VOUT(S)  1.0 V, 1.0 mA  IOUT  100 mA VIN  VOUT(S)  1.0 V, IOUT  30 mA, 40 C  Ta  85 C VIN  VOUT(S)  1.0 V, ON / OFF pin  ON, no load VIN  VOUT(S)  1.0 V, ON / OFF pin  OFF, no load  2.0  10 V  VSH VIN  VOUT(S)  1.0 V, RL  1.0 k 1.5   V 4 VSL VIN  VOUT(S)  1.0 V, RL  1.0 k   0.25 V 4 ISH VIN  VOUT(S)  1.0 V, VON / OFF  7 V 0.1  0.1 A 4 ISL VIN  VOUT(S)  1.0 V, VON / OFF  0 V 0.1  0.1 A 4 VIN  VOUT(S)  1.0 V, 1.2 V  VOUT(S)  1.5 V f  1.0 kHz, 1.6 V  VOUT(S)  3.0 V Vrip  0.5 Vrms, 3.1 V  VOUT(S)  6.0 V IOUT  50 mA VIN  VOUT(S)  1.0 V, ON / OFF pin  ON, VOUT  0 V  70  dB 5  65  dB 5  60  dB 5  200  mA 3 TSD Junction temperature  150  C  TSR Junction temperature  120  C  VOUT2 VOUT Ta VOUT ISS1 ISS2 RR Ishort 9 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series *1. VOUT(S): Set output voltage VOUT(E): Actual output voltage Output voltage when fixing IOUT ( 100 mA) and inputting VOUT(S)  1.0 V *2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current. *3. Vdrop  VIN1  (VOUT3  0.98) VOUT3 is the output voltage when VIN  VOUT(S)  1.0 V and IOUT  100 mA. VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input voltage. *4. A change in the temperature of the output voltage [mV/°C] is calculated using the following equation. VOUT VOUT [mV/°C]*1 = VOUT(S) [V]*2  TaV [ppm/°C]*3  1000 Ta OUT *1. Change in temperature of output voltage *2. Set output voltage *3. Output voltage temperature coefficient *5. The output current can be at least this value. Due to restrictions on the package power dissipation, this value may not be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This specification is guaranteed by design. 10 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series 2. Types in which output voltage is externally set (S-1133B00 and S-1133A00 only) Table 6 Item Output voltage of adjust *1 pin Output voltage range Internal resistance value of adjust pin Output current*2 Dropout voltage*3 Symbol VVADJ VROUT 1.800 1.818 V 6 1.8  8.2 V 11  200  k  300   0.24  0.28 mA V 8 6  0.02 0.2 %/V 6  15 40 mV 6  130  ppm/C 6  60 90 A 7  0.1 1.0 A 7 2.0  10 V  *5 VIN VSH VIN  VOUT(S)  1.0 V, RL  1.0 k 1.5   V 9 VSL VIN  VOUT(S)  1.0 V, RL  1.0 k   0.25 V 9 ISH VIN  VOUT(S)  1.0 V, VON / OFF  7 V 0.1  0.1 A 9 ISL VIN  VOUT(S)  1.0 V, VON / OFF  0 V 0.1  0.1 A 9 VVADJ  VOUT, VIN  VOUT(S)  1.0 V, f  1.0 kHz, Vrip  0.5 Vrms, IOUT  50 mA, VOUT(S)  1.8 V  65  dB 10 Ishort VIN  VOUT(S)  1.0 V, ON / OFF pin  ON, VOUT  0 V  200  mA 8 TSD Junction temperature  150  C  TSR Junction temperature  120  C  Load regulation VOUT2 Output voltage *4 temperature coefficient Current consumption during operation Current consumption during power-off Input voltage ON / OFF pin input voltage “H” ON / OFF pin input voltage “L” ON / OFF pin input current “H” ON / OFF pin input current “L” VOUT Ta VOUT Thermal shutdown detection temperature Thermal shutdown release temperature  1.782 VIN  VOUT(S)  1.0 V IOUT  100 mA, VVADJ  VOUT, VOUT(S)  1.8 V VVADJ  VOUT, VOUT(S)  0.5 V  VIN  10 V, IOUT  100 mA VVADJ  VOUT, VIN  VOUT(S)  1.0 V, 1.0 mA  IOUT  100 mA VIN  VOUT(S)  1.0 V, IOUT  30 mA, 40 C  Ta  85 C VIN  VOUT(S)  1.0 V, VOUT  VVADJ, ON / OFF pin  ON, no load VIN  VOUT(S)  1.0 V, VOUT  VVADJ, ON / OFF pin  OFF, no load  IOUT Vdrop VOUT1 VIN VOUT Short-circuit current VVADJ  VOUT, VIN  VOUT(S)  1.0 V, IOUT  100 mA  RVADJ Line regulation Ripple rejection Conditions (Ta  25 C unless otherwise specified) Test Min. Typ. Max. Unit Circuit ISS1 ISS2 RR 11 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series *1. VOUT(S): Set output voltage ( = 1.8 V) *2. The output current at which the output voltage becomes 95% of VVADJ after gradually increasing the output current. *3. Vdrop  VIN1  (VOUT3  0.98) VOUT3 is the output voltage when VIN  VOUT(S)  1.0 V and IOUT  100 mA. VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input voltage. *4. A change in the temperature of the output voltage [mV/C] is calculated using the following equation. VOUT VOUT [mV/°C]*1 = VOUT(S) [V]*2  TaV [ppm/°C]*3  1000 Ta OUT *1. Change in temperature of output voltage *2. Set output voltage *3. Output voltage temperature coefficient *5. The output current can be at least this value. Due to restrictions on the package power dissipation, this value may not be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This specification is guaranteed by design. 12 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Test Circuits 1. VIN  VOUT A  ON / OFF V VSS Set to ON Figure 6 2.  A VOUT VIN ON / OFF VSS Set to VIN or GND Figure 7  3. VIN VOUT ON / OFF A  V VSS Set to ON Figure 8 4. VOUT VIN   A ON / OFF V VSS RL Figure 9 5. VIN VOUT  ON / OFF VSS V RL Set to ON Figure 10 13 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series 6. VIN  VOUT VADJ ON / OFF A  V VSS Set to ON Figure 11 7.  A VOUT VADJ VIN ON / OFF VSS Set to VIN or GND Figure 12  8. VIN VOUT VADJ ON / OFF A  V VSS Set to ON Figure 13 9. VIN  A VOUT VADJ ON / OFF VSS  V RL Figure 14 10. VIN VOUT VADJ ON / OFF VSS  V RL Set to ON Figure 15 11. VIN ON / OFF VSS Set to ON Figure 16 14  VOUT VADJ  V A HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Standard Circuit Input Output VIN CIN*1 VOUT ON / OFF VSS Single GND CL *2 GND *1. CIN is a capacitor for stabilizing the input. A ceramic capacitor of 2.2 F or more can be used as the output capacitor for products whose output voltage is 1.7 V or less. *2. A ceramic capacitor of 1.0 F or more can be used for CL. A ceramic capacitor of 2.2 F or more can be used as the output capacitor for products whose output voltage is 1.7 V or less. Figure 17 Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant.  Condition of Application Input capacitor (CIN) : Output capacitor (CL) : ESR of output capacitor : *1. 1.0 F or more*1 1.0 F or more*1 1.0  or less 2.2 F or more for products whose output voltage is 1.7 V or less Caution Generally a series regulator may cause oscillation, depending on the selection of external parts. Check that no oscillation occurs with the application using the above capacitor.  Selection of Input and Output Capacitors (CIN, CL) The S-1133 Series requires an output capacitor between the VOUT pin and the VSS pin for phase compensation. Operation *1 is stabilized by a ceramic capacitor with an output capacitance of 1.0 F or more in the entire temperature range. When using an OS capacitor, a tantalum capacitor, or an aluminum electrolytic capacitor, the capacitance must be 1.0 F or more, and the ESR must be 1.0  or less. The value of the output overshoot or undershoot transient response varies depending on the value of the output capacitor. Perform thorough evaluation using the actual application, including temperature characteristics. *1. The capacitance is 2.2 F or more for products whose output voltage is 1.7 V or less. 15 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Explanation of Terms 1. Low dropout voltage regulator This voltage regulator has the low dropout voltage due to its built-in low on-resistance transistor. 2. Low ESR A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1133 Series enables use of a low ESR capacitor, such as a ceramic capacitor, for the output-side capacitor CL. A capacitor whose ESR is 1.0  or less can be used. 3. Output voltage (VOUT) The accuracy of the output voltage is ensured at 1.0% under the specified conditions of fixed input voltage*1, fixed output current, and fixed temperature. *1. Differs depending on the product. Caution If the above conditions change, the output voltage value may vary and exceed the accuracy range of the output voltage. Please see the electrical characteristics and attached characteristics data for details. Remark In the types of the S-1133 Series in which the output voltage is 1.2 to 1.4 V, the output voltage accuracy is 15 mV. VOUT1  4. Line regulation  VINVOUT  Indicates the dependency of the output voltage on the input voltage. That is, the values show how much the output voltage changes due to a change in the input voltage with the output current remaining unchanged. 5. Load regulation (VOUT2) Indicates the dependency of the output voltage on the output current. That is, the values show how much the output voltage changes due to a change in the output current with the input voltage remaining unchanged. 6. Dropout voltage (Vdrop) Indicates the difference between the input voltage (VIN1) and the output voltage when; decreasing input voltage (VIN) gradually until the output voltage has dropped out to the value of 98% of output voltage (VOUT3), which is at VIN  VOUT(S)  1.0 V. Vdrop  VIN1  (VOUT3  0.98) 16 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series VOUT  7. Output voltage temperature coefficient  TaVOUT  The shaded area in Figure 18 is the range where VOUT varies in the operation temperature range when the output voltage temperature coefficient is 130 ppm/C. Example of S-1133B30 typ. product VOUT [V] 0.39 mV/C *1 VOUT(E) 0.39 mV/C 40 *1. 25 85 Ta [C] VOUT(E) is the value of the output voltage measured at Ta = 25C. Figure 18 A change in the temperature of the output voltage [mV/°C] is calculated using the following equation. VOUT VOUT [mV/°C]*1 = VOUT(S) [V]*2  TaV [ppm/°C]*3  1000 Ta OUT *1. Change in temperature of output voltage *2. Set output voltage *3. Output voltage temperature coefficient 17 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Operation 1. Basic operation Figure 19 shows the block diagram of the S-1133 Series. The error amplifier compares the reference voltage (Vref) with feedback voltage (Vfb), which is the output voltage resistance-divided by feedback resistors (Rs and Rf). It supplies the gate voltage necessary to maintain the constant output voltage which is not influenced by the input voltage and temperature change, to the output transistor. VIN *1 Current supply Error amplifier Vref VOUT  Rf  Vfb Reference voltage circuit Rs VSS *1. Parasitic diode Figure 19 2. Output transistor In the S-1133 Series, a low on-resistance P-channel MOS FET is used as the output transistor. Be sure that VOUT does not exceed VIN  0.3 V to prevent the voltage regulator from being damaged due to reverse current flowing from the VOUT pin through a parasitic diode to the VIN pin, when the potential of VOUT became higher than VIN. 18 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series 3. ON / OFF pin This pin starts and stops the regulator. When the ON / OFF pin is set to OFF level, the entire internal circuit stops operating, and the built-in P-channel MOS FET output transistor between the VIN pin and the VOUT pin is turned off, reducing current consumption significantly. The VOUT pin becomes the VSS level due to the internally divided resistance of several hundreds k between the VOUT pin and the VSS pin. The structure of the ON / OFF pin is as shown in Figure 20. The ON / OFF pin is neither pulled down nor pulled up internally, so do not use it in the floating status. In addition, note that the current consumption increases if a voltage of 0.3 V to VIN  0.3 V is applied to the ON / OFF pin. When not using the ON / OFF pin, connect it to the VSS pin in the product A type, and connect it to the VIN pin in B type. Table 7 Product Type ON/OFF Pin Internal Circuit VOUT Pin Voltage Current Consumption A “L”: ON Operate Set value ISS1 A “H”: OFF Stop VSS level ISS2 B “L”: OFF Stop VSS level ISS2 B “H”: ON Operate Set value ISS1 VIN ON / OFF VSS Figure 20 19 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series 4. Thermal shutdown circuit The S-1133 Series implements a thermal shutdown circuit to protect the device from damage due to overheating. When the junction temperature rises to 150 C typ., the thermal shutdown circuit operates and the regulator operation stops. When the junction temperature drops to 120 C typ., the thermal shutdown circuit is released and the regulator operation resumes. If the thermal shutdown circuit starts operating due to self-heating, the regulator operation stops and the output voltage falls. When the regulator operation has stopped, no self-heat is generated and the temperature of the IC is lowered. When the temperature has dropped, the thermal shutdown circuit is released, the regulator operation resumes, and self-heat is generated again. By repeating this procedure, the output voltage waveform forms pulses. Stop or restart of regulation continues unless decreasing either or both of the input voltage and the output current in order to reduce the internal power consumption, or decreasing the ambient temperature. Table 8 Thermal Shutdown Circuit Operation: 150 C typ.*1 Release: 120 C typ.*1 *1. Junction temperature VOUT Pin Voltage VSS level Set value 5. Externally setting output voltage The S-1133 Series provides the types in which output voltage can be set via the external resistor (S-1133B00/S1133A00). The output voltage can be set by connecting a resistor (Ra) between the VOUT pin and the VADJ pin, and a resistor (Rb) between the VADJ pin and the VSS pin. The output voltage is determined by the following formulas. VOUT  1.8  Ra  la ······················ (1) By substituting Ia  IVADJ  1.8/Rb to above formula (1), VOUT  1.8  Ra  (IVADJ  1.8/Rb)  1.8  (1.0  Ra/Rb)  Ra  IVADJ ············ (2) In above formula (2), Ra  IVADJ is a factor for the output voltage error. Whether the output voltage error is minute is judged depending on the following (3) formula. By substituting IVADJ  1.8/RVADJ to Ra  IVADJ VOUT  1.8  (1.0  Ra/Rb)  1.8  Ra/RVADJ ······················ (3) If RVADJ is sufficiently larger than Ra, the error is judged as minute. VOUT VIN IVADJ VADJ RVADJ Ia Ra 1.8 V Ib Rb VOUT VSS Figure 21 The following expression is in order to determine output voltage VOUT = 3.0 V. If resistance Rb = 2 k, substitute RVADJ = 200 k typ. into (3), Resistance Ra = (3.0 / 1.8-1)  ((2 k  200 k) / (2 k + 200 k)) ≒ 1.3 k Caution The above connection diagrams and constants will not guarantee successful operation. thorough evaluation using the actual application to set the constants. 20 Perform HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Precautions  Wiring patterns for the VIN pin, the VOUT pin and GND should be designed so that the impedance is low. When mounting an output capacitor between the VOUT pin and the VSS pin (CL) and a capacitor for stabilizing the input between the VIN pin and the VSS pin (CIN), the distance from the capacitors to these pins should be as short as possible.  When setting the output voltage using the external resistor, connect the resistors, Ra between the VOUT pin and the VADJ pin and Rb between the VADJ pin and the VSS pin close to the respective pins.  In the product that users set the output voltage externally, it is possible to set a voltage arbitrarily; by feeding back the voltage which is from the VOUT pin to the VADJ pin, after dividing it with the dividers connected between the VOUT pin and the VADJ pin, and the VADJ pin and the VSS pin. Note that if any device other than the divider specified above is connected between the VOUT pin and the VADJ pin or the VADJ pin and the VSS pin, S-1133 Series may not work stably as a voltage regulator IC.  Note that generally the output voltage may increase when a series regulator is used at low load current (1.0 mA or less).  Note that generally the output voltage may increase due to the leakage current from an output driver when a series regulator is used at high temperature.  Generally a series regulator may cause oscillation, depending on the selection of external parts. The following conditions are recommended for the S-1133 Series. However, be sure to perform sufficient evaluation under the actual usage conditions for selection, including evaluation of temperature characteristics. Input capacitor (CIN): Output capacitor (CL): Equivalent series resistance (ESR): *1. 1.0 F or more*1 1.0 F or more*1 1.0  or less The capacitance is 2.2 F or more for products whose output voltage is 1.7 V or less.  The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitance is small or an input capacitor is not connected.  If the output capacitance is small, power supply's fluctuation and the characteristics of load fluctuation become worse. Sufficiently evaluate the output voltage's fluctuation with the actual device.  Overshoot may occur in the output voltage momentarily if the voltage is rapidly raised at power-on or when the power supply fluctuates. Sufficiently evaluate the output voltage at power-on with the actual device.  When the thermal shutdown circuit starts operating and the regulator stops, input voltage may exceed the absolute maximum ratings. It will be affected largely when input voltage, output current and inductance of power supply are high. Perform thorough evaluation using the actual application.  The application conditions for the input voltage, the output voltage, and the load current should not exceed the package power dissipation.  Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit.  In determining the output current, attention should be paid to the output current value specified in Table 5 and Table 6 in “ Electrical Characteristics” and footnote *5 of the table.  ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 21 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Characteristics (Typical Data) (1) Output voltage vs. Output current (when load current increases) (Ta  25 C)     =                     S-1133B30             S-1133B12             =                   S-1133B60        =              Remark In determining the output current, attention should be paid to the following. 1. The minimum output current value and footnote *5 in Table 5 and Table 6 in “ Electrical Characteristics” 2. The package power dissipation (2) Output voltage vs. Input voltage (Ta  25 C) 1.25 3.0 1.20 2.9 IOUT = 1 mA 2.8 30 mA 2.7 100 mA IOUT = 1 mA 30 mA 100 mA 1.15 1.10 1.05 1.00 VOUT [V] S-1133B30 3.1 VOUT [V] S-1133B12 1.30 1.0 1.5 2.0 2.5 VIN [V] 2.6 3.0 3.5 6.5 7.0 VOUT [V] S-1133B60 6.5 6.0 IOUT = 1 mA 5.5 30 mA 5.0 4.5 22 100 mA 4.5 5.0 5.5 6.0 VIN [V] 2.5 2.5 3.0 3.5 4.0 VIN [V] 4.5 5.0 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series (3) Dropout voltage vs. Output current          - ° ° °        S-1133B60 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0   S-1133B30 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 40C 25C Vdrop [V]   S-1133B12 85C 0 50 100 150 200 250 300 350 IOUT [mA] Vdrop [V] 40C 25C 85C 0 50 100 150 200 250 300 350 IOUT [mA] Vdrop [V] (4) Dropout voltage vs. Set output voltage 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 300 mA 100 mA 50 mA 30 mA 10 mA 0 1 2 4 3 VOUT(S) [V] 5 6 7 23 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series (5) Output voltage vs. Ambient temperature              S-1133B30     S-1133B12 -  -    °     °               - -  °       S-1133B60           - - (6) Current consumption vs. Input voltage S-1133B30 60 ISS1 [μA] 50 25C 40 40C 85C 30 20 20 0 0 1 2 3 4 5 6 VIN [V] 7 8 9 10 50 ISS1 [μA] 30 10 0 85C 40 25C 30 20 40C 10 0 0 1 2 3 4 5 6 VIN [V] 7 8 9 10 25C 85C 40 10 S-1133B60 60 24 50 ISS1 [μA] S-1133B12 60 40C 0 1 2 3 4 5 6 VIN [V] 7 8 9 10 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series (7) Ripple rejection (Ta  25 C) S-1133B30 S-1133B12 100      Ripple Rejection [dB] VIN  2.2 V, COUT  2.2 F IOUT = 1 mA 80 50 mA 60 40 20 100 mA 0 10 100 1K 10K 100K Frequency [Hz] 1M VIN  4.0 V, COUT  1.0 F  "#$% =  !                      S-1133B60 VIN  7.0 V, COUT  1.0 F  "#$% =  !                 25 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Reference Data (1) Input transient response characteristics (Ta  25 C) 3.0 2.5 1.24 2.0 1.20 1.5 VOUT 1.16 1.12 20 0 4 3.08 3 3.04 VOUT 3.00 1.0 2.96 0.5 2.92 20 40 60 80 100 120 140 160 180 t [μs] 2 VIN [V] VIN 1.28 VIN [V] VOUT [V] 1.32 S-1133B30 IOUT  100 mA, tr  tf  5.0 s, COUT  1.0 F, CIN  1.0 F 3.16 6 VIN 3.12 5 VOUT [V] S-1133B12 IOUT  100 mA, tr  tf  5.0 s, COUT  2.2 F, CIN  2.2 F 1.36 3.5 1 0 20 0 20 40 60 80 100 120 140 160 180 t [μs] 6 6.04 VOUT 6.00 5.96 5.92 5 VIN [V] VOUT [V] S-1133B60 IOUT  100 mA, tr  tf  5.0 s, COUT  1.0 F, CIN  1.0 F 6.16 9 VIN 6.12 8 7 6.08 4 3 20 0 20 40 60 80 100 120 140 160 180 t [μs] (2) Load transient response characteristics (Ta  25 C) 1.3 1.2 VOUT 1.1 1.0 40 20 0 20 40 60 80 100 120 140 160 t [μs] 100 3.12 50 3.08 0 50 6.04 6.00 150 2.92 26 50 50 100 5.96 5.92 100 0 VOUT 40 20 0 20 40 60 80 100 120 140 160 t [μs] 3.00 2.96 150 IOUT [mA] VOUT [V] 6.08 IOUT 3.04 100 S-1133B60 VIN  7.0 V, COUT  1.0 F, CIN  1.0 F, IOUT  50 mA  100 mA 6.16 150 6.12 VOUT [V] 1.4 IOUT IOUT [mA] VOUT [V] 1.5 S-1133B30 VIN  4.0 V, COUT  1.0 F, CIN  1.0 F, IOUT  50 mA  100 mA 3.16 150 IOUT VOUT 100 50 0 50 100 40 20 0 20 40 60 80 100 120 140 160 t [μs] 150 IOUT [mA] S-1133B12 VIN  2.2 V, COUT  2.2 F, CIN  2.2 F, IOUT  50 mA  100 mA 1.6 150 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series (3) ON / OFF pin transient response characteristics (Ta  25 C) S-1133B30 VIN  4.0 V, COUT  1.0 F, CIN  1.0 F, IOUT  100 mA 10 6 0 1 2 1 VOUT 40 20 0 20 40 60 80 100 120 140 160 t [μs] VON/OFF 6 4 2 4 0 6 2 S-1133B60 VIN  7.0 V, COUT  1.0 F, CIN  1.0 F, IOUT  100 mA 8 14 12 6 VON/OFF 10 4 8 2 0 6 VOUT 4 2 2 4 0 6 2 8 40 20 0 20 40 60 80 100 120 140 160 t [μs] VOUT [V] VOUT [V] 2 2 0 8 4 VON/OFF [V] VON/OFF 3 4 2 0 VOUT 40 20 0 20 40 60 80 100 120 140 160 t [μs] 2 4 6 VON/OFF [V] VOUT [V] 4 VON/OFF [V] S-1133B12 VIN  2.2 V, COUT  2.2 F, CIN  2.2 F, IOUT  100 mA 5 6 27 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series  Marking Specifications 1. SOT-89-5 Top view 1 (1) to (3) : (4) to (6) : Product code (Refer to Product name vs. Product code.) Lot number (4) (5) (6) 4 (1) (2) (3) 5 2 3 Product name vs. Product code Product name (1) Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Product code (2) (3) 8 A 8 B 8 C 8 D 8 E 8 F 8 G 8 H 8 I 8 J 8 K 8 L 8 M 8 N 8 O 8 P 8 Q 8 R 8 S 8 T 8 U 8 V 8 W 8 X 8 Y Product name (1) Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Product code (2) (3) 8 Z 9 A 9 B 9 C 9 D 9 E 9 F 9 G 9 H 9 I 9 J 9 K 9 L 9 M 9 N 9 O 9 P 9 Q 9 R 9 S 9 T 9 U 9 V 9 W 9 X S-1133B00-U5T1x S-1133B36-U5T1x S-1133B12-U5T1x S-1133B37-U5T1x S-1133B13-U5T1x S-1133B38-U5T1x S-1133B14-U5T1x S-1133B39-U5T1x S-1133B15-U5T1x S-1133B40-U5T1x S-1133B16-U5T1x S-1133B41-U5T1x S-1133B17-U5T1x S-1133B42-U5T1x S-1133B18-U5T1x S-1133B43-U5T1x S-1133B19-U5T1x S-1133B44-U5T1x S-1133B20-U5T1x S-1133B45-U5T1x S-1133B21-U5T1x S-1133B46-U5T1x S-1133B22-U5T1x S-1133B47-U5T1x S-1133B23-U5T1x S-1133B48-U5T1x S-1133B24-U5T1x S-1133B49-U5T1x S-1133B25-U5T1x S-1133B50-U5T1x S-1133B26-U5T1x S-1133B51-U5T1x S-1133B27-U5T1x S-1133B52-U5T1x S-1133B28-U5T1x S-1133B53-U5T1x S-1133B29-U5T1x S-1133B54-U5T1x S-1133B30-U5T1x S-1133B55-U5T1x S-1133B31-U5T1x S-1133B56-U5T1x S-1133B32-U5T1x S-1133B57-U5T1x S-1133B33-U5T1x S-1133B58-U5T1x S-1133B34-U5T1x S-1133B59-U5T1x S-1133B35-U5T1x S-1133B60-U5T1x Remark 1. x: G or U 2. Please select products of environmental code = U for Sn 100%, halogen-free products. 28 HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR Rev.3.1_02 S-1133 Series 2. SNT-8A 8 Top view 7 6 5 (1) (2) to (4) (5), (6) (7) to (11) (1) (2) (3) (4) Blank Product code (Refer to Product name vs. Product code) Blank Lot number (5) (6) (7) (8) (9) (10) (11) 1 2 3 4 Product name vs. Product code Product name S-1133B00-I8T1U S-1133B12-I8T1U S-1133B13-I8T1U S-1133B14-I8T1U S-1133B15-I8T1U S-1133B16-I8T1U S-1133B17-I8T1U S-1133B18-I8T1U S-1133B19-I8T1U S-1133B20-I8T1U S-1133B21-I8T1U S-1133B22-I8T1U S-1133B23-I8T1U S-1133B24-I8T1U S-1133B25-I8T1U S-1133B26-I8T1U S-1133B27-I8T1U S-1133B28-I8T1U S-1133B29-I8T1U S-1133B30-I8T1U S-1133B31-I8T1U S-1133B32-I8T1U S-1133B33-I8T1U S-1133B34-I8T1U S-1133B35-I8T1U (2) Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Product code (3) (4) 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 A B C D E F G H I J K L M N O P Q R S T U V W X Y Product name S-1133B36-I8T1U S-1133B37-I8T1U S-1133B38-I8T1U S-1133B39-I8T1U S-1133B40-I8T1U S-1133B41-I8T1U S-1133B42-I8T1U S-1133B43-I8T1U S-1133B44-I8T1U S-1133B45-I8T1U S-1133B46-I8T1U S-1133B47-I8T1U S-1133B48-I8T1U S-1133B49-I8T1U S-1133B50-I8T1U S-1133B51-I8T1U S-1133B52-I8T1U S-1133B53-I8T1U S-1133B54-I8T1U S-1133B55-I8T1U S-1133B56-I8T1U S-1133B57-I8T1U S-1133B58-I8T1U S-1133B59-I8T1U S-1133B60-I8T1U (2) Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Product code (3) (4) 8 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 Z A B C D E F G H I J K L M N O P Q R S T U V W X 29 4.5±0.1 1.5±0.1 1.6±0.2 5 4 0.3 45° 1 2 3 1.5±0.1 1.5±0.1 0.4±0.05 0.4±0.1 0.4±0.1 0.45±0.1 No. UP005-A-P-SD-2.0 TITLE SOT895-A-PKG Dimensions No. UP005-A-P-SD-2.0 ANGLE UNIT mm ABLIC Inc. 4.0±0.1(10 pitches : 40.0±0.2) ø1.5 +0.1 -0 2.0±0.05 +0.1 ø1.5 -0 0.3±0.05 8.0±0.1 2.0±0.1 4.75±0.1 3 2 1 4 5 Feed direction No. UP005-A-C-SD-2.0 TITLE SOT895-A-Carrier Tape UP005-A-C-SD-2.0 No. ANGLE UNIT mm ABLIC Inc. 16.5max. 13.0±0.3 Enlarged drawing in the central part (60°) (60°) No. UP005-A-R-SD-1.1 TITLE SOT895-A-Reel No. UP005-A-R-SD-1.1 ANGLE UNIT QTY. mm ABLIC Inc. 1,000 0.7 0.7 1.0 2.0 1.5 1.5 No. UP005-A-L-S1-1.0 TITLE SOT895-A -Land Recommendation UP005-A-L-S1-1.0 No. ANGLE UNIT mm ABLIC Inc. 1.97±0.03 8 7 6 5 3 4 +0.05 1 0.5 2 0.08 -0.02 0.48±0.02 0.2±0.05 No. PH008-A-P-SD-2.1 TITLE SNT-8A-A-PKG Dimensions No. PH008-A-P-SD-2.1 ANGLE UNIT mm ABLIC Inc. +0.1 ø1.5 -0 2.25±0.05 4.0±0.1 2.0±0.05 ø0.5±0.1 0.25±0.05 0.65±0.05 4.0±0.1 4 321 5 6 78 Feed direction No. PH008-A-C-SD-2.0 TITLE SNT-8A-A-Carrier Tape No. PH008-A-C-SD-2.0 ANGLE UNIT mm ABLIC Inc. 12.5max. 9.0±0.3 Enlarged drawing in the central part ø13±0.2 (60°) (60°) No. PH008-A-R-SD-1.0 TITLE SNT-8A-A-Reel No. PH008-A-R-SD-1.0 QTY. ANGLE UNIT mm ABLIC Inc. 5,000 0.52 2.01 2 0.52 0.2 0.3 1. 2. 1 (0.25 mm min. / 0.30 mm typ.) (1.96 mm ~ 2.06 mm) 1. 2. 3. 4. 0.03 mm SNT 1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.). 2. Do not widen the land pattern to the center of the package (1.96 mm to 2.06mm). Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package. 2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm or less from the land pattern surface. 3. Match the mask aperture size and aperture position with the land pattern. 4. Refer to "SNT Package User's Guide" for details. 1. 2. (0.25 mm min. / 0.30 mm typ.) (1.96 mm ~ 2.06 mm) TITLE No. PH008-A-L-SD-4.1 SNT-8A-A -Land Recommendation PH008-A-L-SD-4.1 No. ANGLE UNIT mm ABLIC Inc. Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com