S-89130/89140 Series
www.ablic.com
www.ablicinc.com
MINI ANALOG SERIES
CMOS OPERATIONAL AMPLIFIER
© ABLIC Inc., 2011
Rev.1.0_02
The mini-analog series is a group of ICs that incorporate a general purpose analog circuit in a small package.
S-89130/89140 Series is a CMOS type operational amplifier that has a phase compensation circuit, and operates at a low
voltage with low current consumption. S-89130/89140 Series can operate within a wide temperature range of 40C to
125C.
This product is a dual operational amplifier (two circuits).
Features
Lower operating voltage :
Low current consumption (per circuit) :
VDD 2.7 V to 5.5 V
IDD 1.00 mA typ. (S-89130 Series, VDD 5.0 V)
IDD 0.27 mA typ. (S-89140 Series, VDD 5.0 V)
Low input offset voltage :
VIO 6.0 mV max. (S-89130 Series)
VIO 7.0 mV max. (S-89140 Series)
Operational temperature range :
40C to 125C
No external capacitors required for internal phase compensation
Lead-free (Sn 100%), halogen-free *1
*1.
Refer to “ Product Name Structure” for details.
Applications
Current sensing
Signal amplification
Buffer
Active filter
Electronics devices
Packages
SNT-8A
TMSOP-8
Caution This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or
automobile equipment including car audio, keyless entry and engine control unit, contact to ABLIC
Inc. is indispensable.
1
MINI ANALOG SERIES
S-89130/89140 Series
CMOS OPERATIONAL AMPLIFIER
Rev.1.0_02
Block Diagram
VDD
IN1()
IN1()
OUT1
IN2()
IN2()
OUT2
VSS
Figure 1
2
MINI ANALOG SERIES
Rev.1.0_02
CMOS OPERATIONAL AMPLIFIER
S-89130/89140 Series
Product Name Structure
Users can select the product type for the S-89130/89140 Series. Refer to “1. Product name” regarding the contents
of product name, “2. Packages” regarding the package drawings and “3. Product name list” regarding the product
type.
1.
Product name
S-891
x
0
B
C
xxxx
U
Environmental code
U
: Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
I8T1 : SNT-8A, tape
K8T2 : TMSOP-8, tape
Number of circuits
B
:2
Current consumption (per circuit)
3
: IDD 1.00 mA (VDD 5.0 V)
4
: IDD 0.27 mA (VDD 5.0 V)
*1.
2.
Refer to the tape specifications
Packages
Package Name
SNT-8A
TMSOP-8
3.
Package
PH008-A-P-SD
FM008-A-P-SD
Drawing Code
Tape
Reel
PH008-A-C-SD
PH008-A-R-SD
FM008-A-C-SD
FM008-A-R-SD
Land
PH008-A-L-SD
Product name list
Table 1
Product name
Current consumption
*1
(per circuit)
S-89130BC-I8T1U
S-89130BC-K8T2U
S-89140BC-I8T1U
S-89140BC-K8T2U
*1. The value when VDD 5.0 V
1.00 mA
1.00 mA
0.27 mA
0.27 mA
Gain-bandwidth*1
3.0 MHz
3.0 MHz
1.0 MHz
1.0 MHz
Package
SNT-8A
TMSOP-8
SNT-8A
TMSOP-8
3
MINI ANALOG SERIES
S-89130/89140 Series
CMOS OPERATIONAL AMPLIFIER
Rev.1.0_02
Pin Configurations
1.
SNT-8A
Table 2
SNT-8A
Top view
1
8
2
7
3
6
4
5
Pin No.
1
2
3
4
5
6
7
8
Symbol
OUT1
IN1()
IN1()
VSS
IN2()
IN2()
OUT2
VDD
Description
Output pin 1
Inverted input pin 1
Non-inverted input pin 1
GND pin
Non-inverted input pin 2
Inverted input pin 2
Output pin 2
Positive power supply pin
Figure 2
2.
TMSOP-8
Table 3
TMSOP-8
Top view
1
8
2
7
3
6
4
5
Figure 3
4
Pin No.
1
2
3
4
5
6
7
8
Symbol
OUT1
IN1()
IN1()
VSS
IN2()
IN2()
OUT2
VDD
Description
Output pin 1
Inverted input pin 1
Non-inverted input pin 1
GND pin
Non-inverted input pin 2
Inverted input pin 2
Output pin 2
Positive power supply pin
MINI ANALOG SERIES
Rev.1.0_02
CMOS OPERATIONAL AMPLIFIER
S-89130/89140 Series
Absolute Maximum Ratings
Table 4
Parameter
Power supply voltage
Input voltage
Output voltage
Differential input voltage
Symbol
VDD
VIN(+), VIN(-)
VOUT
VIND
ISOURCE
ISINK
Output pin current
SNT-8A
TMSOP-8
Operating ambient temperature
Junction temperature
Storage temperature
Power dissipation
When mounted on board
[Mounted board]
(1) Board size :
(2) Board name :
Caution
PD
Topr
Tj
Tstg
114.3 mm 76.2 mm t1.6 mm
JEDEC STANDARD51-7
The absolute maximum ratings are rated values exceeding which the product could
suffer physical damage. These values must therefore not be exceeded under any
conditions.
1000
Power Dissipation (PD) [mW]
*1.
(Ta 25C unless otherwise specified)
Absolute Maximum Rating
Unit
VSS0.3 to VSS7.0
V
VSS0.3 to VSS7.0
V
VSS0.3 to VDD0.3
V
7.0
V
20.0
mA
20.0
mA
550*1
mW
800*1
mW
40 to 125
C
55 to 150
C
55 to 150
C
800
TMSOP-8
600
SNT-8A
400
200
0
0
50
100
150
Ambient Temperature (Ta) [C]
Figure 4
Power Dissipation of Package (When Mounted on Board)
5
MINI ANALOG SERIES
S-89130/89140 Series
CMOS OPERATIONAL AMPLIFIER
Rev.1.0_02
Electrical Characteristics
1.
S-89130 Series
Table 5
Parameter
Symbol
Conditions
Range of operating power supply
VDD
voltage
1. 1
(Ta 25°C unless otherwise specified)
Test
Min.
Typ.
Max.
Unit
Circuit
2.7
5.5
V
VDD 5.0 V
Table 6
DC Electrical Characteristics (VDD 5.0 V)
Parameter
(Ta 25°C unless otherwise specified)
Symbol
Conditions
Min.
Typ.
Max.
Unit
Test
Circuit
1.00
1.25
mA
5
Current consumption (per circuit) IDD
VCMR VOUT VDD / 2
Input offset voltage
VCMR VDD / 2
6.0
3.0
6.0
mV
1
VCMR VDD / 2
3
V/C
1
Input offset voltage drift
VIO
VIO
Ta
Input offset current
IIO
1
pA
Input bias current
IBIAS
1
pA
Common-mode input voltage
range
VCMR
0.1
3.8
V
2
Voltage gain (open loop)
AVOL
VOUT VSS0.5 V to VDD0.5 V
VCMR VDD / 2, RL 1.0 M
88
110
dB
8
VOH
RL 1.0 M
4.9
V
3
VOL
RL 1.0 M
0.1
V
4
CMRR
VCMR VSS0.1 V to VDD1.2 V
70
85
dB
2
PSRR
VDD 2.7 V to 5.5 V
70
90
dB
1
Source current
ISOURCE
VOUT VDD0.12 V
5.0
mA
6
Sink current
ISINK
VOUT 0.12 V
5.0
mA
7
Maximum output swing voltage
Common-mode input signal
rejection ratio
Power supply voltage rejection
ratio
Table 7
AC Electrical Characteristics (VDD 5.0 V)
Parameter
Conditions
Min.
Typ.
Max.
Unit
Slew rate
SR
RL 1.0 M, CL 15 pF (Refer to Figure 13)
2.0
V/s
Gain-bandwidth product
GBP
CL 0 pF
3.0
MHz
6
Symbol
(Ta 25°C unless otherwise specified)
MINI ANALOG SERIES
Rev.1.0_02
1. 2
CMOS OPERATIONAL AMPLIFIER
S-89130/89140 Series
VDD 2.7 V
Table 8
DC Electrical Characteristics (VDD 2.7 V)
Parameter
(Ta 25°C unless otherwise specified)
Symbol
Conditions
Min.
Typ.
Max.
Unit
Test
Circuit
0.90
1.20
mA
5
Current consumption (per circuit) IDD
VCMR VOUT VDD / 2
Input offset voltage
VCMR VDD / 2
6.0
3.0
6.0
mV
1
VCMR VDD / 2
3
V/C
1
VIO
VIO
Ta
Input offset voltage drift
Input offset current
IIO
1
pA
Input bias current
IBIAS
1
pA
VCMR
0.1
1.5
V
2
AVOL
VOUT VSS 0.5 V to VDD0.5 V
VCMR VDD / 2, RL 1.0 M
80
110
dB
8
VOH
RL 1.0 M
2.6
V
3
VOL
RL 1.0 M
0.1
V
4
CMRR
VCMR VSS0.1 V to VDD1.2 V
65
85
dB
2
PSRR
VDD 2.7 V to 5.5 V
70
90
dB
1
Source current
ISOURCE
VOUT VDD0.12 V
5.0
mA
6
Sink current
ISINK
VOUT 0.12 V
5.0
mA
7
Common-mode
range
input
voltage
Voltage gain (open loop)
Maximum output swing voltage
Common-mode input signal
rejection ratio
Power supply voltage rejection
ratio
Table 9
AC Electrical Characteristics (VDD 2.7 V)
Parameter
Symbol
(Ta 25°C unless otherwise specified)
Conditions
Min.
Typ.
Max.
Unit
Slew rate
SR
RL 1.0 M, CL 15 pF (Refer to Figure 13)
2.0
V/s
Gain-bandwidth product
GBP
CL 0 pF
3.0
MHz
7
MINI ANALOG SERIES
S-89130/89140 Series
2.
CMOS OPERATIONAL AMPLIFIER
Rev.1.0_02
S-89140 Series
Table 10
Parameter
Symbol
Conditions
Range of operating power supply
VDD
voltage
2. 1
(Ta 25°C unless otherwise specified)
Test
Min.
Typ.
Max.
Unit
Circuit
2.7
5.5
V
VDD 5.0 V
Table 11
DC Electrical Characteristics (VDD 5.0 V)
Parameter
(Ta 25°C unless otherwise specified)
Symbol
Conditions
Min.
Typ.
Max.
Unit
Test
Circuit
0.27
0.35
mA
5
Current consumption (per circuit) IDD
VCMR VOUT VDD / 2
Input offset voltage
VCMR VDD / 2
7.0
3.0
7.0
mV
1
VCMR VDD / 2
3
V/C
1
Input offset voltage drift
VIO
VIO
Ta
Input offset current
IIO
1
pA
Input bias current
IBIAS
1
pA
Common-mode input voltage
range
VCMR
0.1
3.8
V
2
Voltage gain (open loop)
AVOL
VOUT VSS0.5 V to VDD0.5 V
VCMR VDD / 2, RL 1.0 M
88
110
dB
8
VOH
RL 1.0 M
4.9
V
3
VOL
RL 1.0 M
0.1
V
4
CMRR
VCMR VSS0.1 V to VDD1.2 V
70
85
dB
2
PSRR
VDD2.7 V to 5.5 V
70
90
dB
1
Source current
ISOURCE
VOUT VDD 0.12 V
5.0
mA
6
Sink current
ISINK
VOUT 0.12 V
5.0
mA
7
Maximum output swing voltage
Common-mode input signal
rejection ratio
Power supply voltage rejection
ratio
Table 12
AC Electrical Characteristics (VDD 5.0 V)
Parameter
Symbol
(Ta 25°C unless otherwise specified)
Conditions
Min.
Typ.
Max.
Unit
0.5
V/s
1.0
MHz
Slew rate
SR
RL 1.0 M, CL 15 pF (Refer to Figure 13)
Gain-bandwidth product
GBP
CL 0 pF
8
MINI ANALOG SERIES
Rev.1.0_02
2. 2
CMOS OPERATIONAL AMPLIFIER
S-89130/89140 Series
VDD 2.7 V
Table 13
DC Electrical Characteristics (VDD 2.7 V)
Parameter
(Ta 25°C unless otherwise specified)
Symbol
Conditions
Min.
Typ.
Max.
Unit
Test
Circuit
0.25
0.33
mA
5
Current consumption (per circuit) IDD
VCMR VOUT VDD / 2
Input offset voltage
VCMR VDD / 2
7.0
3.0
7.0
mV
1
VCMR VDD / 2
3
V/C
1
Input offset voltage drift
VIO
VIO
Ta
Input offset current
IIO
1
pA
Input bias current
IBIAS
1
pA
Common-mode input voltage
range
VCMR
0.1
1.5
V
2
Voltage gain (open loop)
AVOL
VOUT VSS 0.5 V to VDD 0.5 V
VCMR VDD / 2, RL 1.0 M
80
110
dB
8
VOH
RL 1.0 M
2.6
V
3
VOL
RL 1.0 M
0.1
V
4
CMRR
VCMR VSS 0.1 V to VDD 1.2 V
65
85
dB
2
PSRR
VDD 2.7 V to 5.5 V
70
90
dB
1
Source current
ISOURCE
VOUT VDD 0.12 V
5.0
mA
6
Sink current
ISINK
VOUT 0.12 V
5.0
mA
7
Maximum output swing voltage
Common-mode input signal
rejection ratio
Power supply voltage rejection
ratio
Table 14
AC Electrical Characteristics (VDD 2.7 V)
Parameter
Symbol
(Ta 25°C unless otherwise specified)
Conditions
Min.
Typ.
Max.
Unit
0.5
V/s
1.0
MHz
Slew rate
SR
RL 1.0 M, CL 15 pF (Refer to Figure 13)
Gain-bandwidth product
GBP
CL 0 pF
9
MINI ANALOG SERIES
S-89130/89140 Series
CMOS OPERATIONAL AMPLIFIER
Rev.1.0_02
Test Circuit (Per Circuit)
1.
Power supply voltage rejection ratio, input offset voltage
VDD
Power supply voltage rejection ratio (PSRR)
The power supply voltage rejection ratio (PSRR) can be
calculated by the following expression, with VOUT measured at
each VDD.
RF
RS
VOUT
RS
RF
Test conditions:
VDD 2.7 V: VDD VDD1, VOUT VOUT1,
VDD 5.5 V: VDD VDD2, VOUT VOUT2
PSRR 20 log
VCMR VDD / 2
RFRS
RS
Common-mode input signal rejection ratio, common-mode input voltage range
VDD
Common-mode input signal rejection ratio (CMRR)
The common-mode input signal rejection ratio (CMRR) can be
calculated by the following expression, with VOUT measured at
each VIN.
RF
RS
RS
RF
VIN
VDD / 2
Figure 6
10
Input offset voltage (VIO)
VDD
RS
VIO VOUT
2
RFRS
Figure 5
2.
VDD1 VDD2
VDD1
VDD2
VOUT1 2 VOUT2 2
VOUT
Test conditions:
VIN VCMR Max.: VIN VIN1, VOUT VOUT1,
VIN VCMR Min.: VIN VIN2, VOUT VOUT2
CMRR 20 log
RFRS
VIN1 VIN2
RS
VOUT1 VOUT2
Common-mode input voltage range (VCMR)
The common mode input voltage range (VCMR) is the range of
VIN in which the common mode input signal rejection ratio
(CMRR) is satisfied when VIN is varied.
MINI ANALOG SERIES
Rev.1.0_02
3.
CMOS OPERATIONAL AMPLIFIER
S-89130/89140 Series
Maximum output swing voltage (VOH)
VDD
Maximum output swing voltage (VOH)
VOH
Test conditions
VDD
VIN1 2 0.1 V
VDD
VIN2 2 0.1 V
RL 1 M
RL
VIN1
VDD / 2
VIN2
Figure 7
4.
Maximum output swing voltage (VOL)
VDD
VDD / 2
Maximum output swing voltage (VOL)
RL
VIN1
VOL
Test conditions:
VDD
VIN1 2 0.1 V
VDD
VIN2 2 0.1 V
RL 1 M
VIN2
Figure 8
5.
Current consumption
VDD
Current consumption (IDD)
A
VCMR = VDD / 2
Figure 9
11
MINI ANALOG SERIES
S-89130/89140 Series
6.
CMOS OPERATIONAL AMPLIFIER
Rev.1.0_02
Source current
VDD
Source current (ISOURCE)
Test conditions:
VOUT VDD 0.12 V
VDD
VIN1 2 0.1 V
VDD
VIN2 2 0.1 V
VIN1
A
VOUT
VIN2
Figure 10
7.
Sink current
VDD
VOUT
A
VIN1
VIN2
Figure 11
12
Sink current (ISINK)
Test conditions:
VOUT VSS 0.12 V
VDD
VIN1 2 0.1 V
VDD
VIN2 2 0.1 V
MINI ANALOG SERIES
Rev.1.0_02
8.
CMOS OPERATIONAL AMPLIFIER
S-89130/89140 Series
Voltage gain (open loop)
VDD
RS
RF
VDDN
D.U.T
RS
NULL
VOUT
RF
1 M
VCMR VDD / 2
VSSN
VM
VDD / 2
Figure 12
Voltage-gain (open loop) (AVOL)
The voltage gain (AVOL) can be calculated by the following expression, with measured VOUT at each VM.
Test conditions:
VM VDD 0.5 V: VM VM1, VOUT VOUT1,
VM 0.5 V: VM VM2, VOUT VOUT2
AVOL 20 log
9.
RFRS
VM1 VM2
RS
VOUT1 VOUT2
Slew rate (SR)
Measured by the voltage follower circuit.
tR tF 20 ns (0 V to VCMR Max.)
IN() VCMR Max.
IN() 0 V
VOUT ( IN())
tTHL
VCMR Max.
VCMR Max. 0.9
VCMR Max. 0.1
VOUT ( IN())
tTLH
VCMR Max. 0.8
tTLH
VCMR Max. 0.8
SR
tTHL
SR
Figure 13
13
MINI ANALOG SERIES
S-89130/89140 Series
CMOS OPERATIONAL AMPLIFIER
Rev.1.0_02
Precautions
Do not apply an electrostatic discharge to this IC that exceeds performance ratings of the built-in electrostatic
protection circuit.
ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
Use this IC with the output current 20 mA or less.
This IC operates stably even directly connecting a load capacitance 100 pF or less to the output pin, as seen in
Figure 14. When using a load capacitance 100 pF or larger, set a resistor 47 or more, as seen in Figure 15. In
case of connecting a filter for noise prevention, and using a load capacitance 100 pF or more, also set a resistor
47 or more as seen in Figure 16.
VDD
VIN
VIN
VOUT
Load
capacitance
100 pF or less
VSS
Figure 14
VDD
VIN
VIN
VOUT
47 or more
Load
capacitance
VSS
Figure 15
VDD
Filter
VIN
VIN
VOUT
47 or more
Load
capacitance
VSS
Figure 16
Caution
14
The above connection diagram and constant will not guarantee successful operation.
Perform through evaluation using the actual application to set the constant.
MINI ANALOG SERIES
CMOS OPERATIONAL AMPLIFIER
S-89130/89140 Series
Rev.1.0_02
Characteristics (Typical Data)
1.
Current consumption (per circuit) vs. Power supply voltage
1. 1
S-89130 Series
1. 2
S-89140 Series
IDDVDD, VSS 0 V, VCMR VOUT VDD / 2
IDDVDD, VSS 0 V, VCMR VOUT VDD / 2
1.2
0.4
0.3
0.8
+25°C
Ta = −40°C
0.6
IDD [mA]
IDD [mA]
1.0
+125°C
0.4
0.2
0.1
0.2
0
0
2
3
4
5
6
2
3
VDD [V]
4
VDD [V]
5
6
Voltage gain vs. Frequency
2. 1
S-89130 Series
140
120
100
80
60
40
20
0
Ta = −40°C
+25°C
+125°C
0.1
2. 2
AVOLf, VDD 5.0 V, VSS 0 V
1
AVOL [dB]
AVOL [dB]
AVOLf, VDD 2.7 V, VSS 0 V
140
120
100
80
60
40
20
0
10 100 1k 10k 100k 1M 10M
f [Hz]
Ta = −40°C
+25°C
+125°C
0.1
1
10 100 1k 10k 100k 1M 10M
f [Hz]
S-89140 Series
AVOLf, VDD 2.7 V, VSS 0 V
140
120
100
80
60
40
20
0
AVOLf, VDD 5.0 V, VSS 0 V
Ta = −40°C
+25°C
+125°C
0.1
1
10 100 1k 10k 100k 1M 10M
f [Hz]
AVOL [dB]
AVOL [dB]
2.
+125°C
+25°C
Ta = −40°C
140
120
100
80
60
40
20
0
Ta = −40°C
+25°C
+125°C
0.1
1
10 100 1k 10k 100k 1M 10M
f [Hz]
15
MINI ANALOG SERIES
S-89130/89140 Series
Rev.1.0_02
Output current
3. 1
ISOURCE vs. Power supply voltage
ISOURCE [mA]
3. 1. 1
S-89130 Series
S-89140 Series
ISOURCEVDD, VOUT VDD 0.12 V, VSS 0 V
ISOURCEVDD, VOUT VDD 0.12 V, VSS 0 V
14
12
10
8
6
4
2
0
14
12
10
8
6
4
2
0
Ta = −40°C
+25°C
+125°C
2
3. 2
3. 1. 2
ISOURCE [mA]
3.
CMOS OPERATIONAL AMPLIFIER
3
4
VDD [V]
5
6
Ta = −40°C
+25°C
+125°C
2
3
S-89130 Series
3. 2. 2
ISINKVDD, VOUT 0.12 V, VSS 0 V
10
8
Ta = −40°C
6
ISINK [mA]
ISINK [mA]
8
+25°C
4
+125°C
2
Ta = −40°C
6
+25°C
4
+125°C
2
0
0
2
3
4
5
6
2
3
VDD [V]
4
5
6
VDD [V]
Output voltage (VOUT) vs. ISOURCE
3. 3. 1
S-89130 Series
VOUTISOURCE, VDD 2.7 V, VSS 0 V
VOUTISOURCE, VDD 5.0 V, VSS 0 V
3.0
6
2.5
2.0
+25°C
1.5
1.0
Ta = −40°C
5
Ta = −40°C
VOUT [V]
VOUT [V]
6
S-89140 Series
ISINKVDD, VOUT 0.12 V, VSS 0 V
10
+125°C
0.5
4
3
+125°C
2
+25°C
1
0
0
0
16
5
ISINK vs. Power supply voltage
3. 2. 1
3. 3
4
VDD [V]
20
40
60
ISOURCE [mA]
80
100
0
20
40
60
ISOURCE [mA]
80
100
MINI ANALOG SERIES
Rev.1.0_02
3. 3. 2
CMOS OPERATIONAL AMPLIFIER
S-89130/89140 Series
S-89140 Series
VOUTISOURCE, VDD 2.7 V, VSS 0 V
VOUTISOURCE, VDD 5.0 V, VSS 0 V
3.0
6
5
Ta = −40°C
2.0
VOUT [V]
VOUT [V]
2.5
1.5
1.0
+25°C
+125°C
0.5
3
0
0
20
40
60
ISOURCE [mA]
80
100
0
40
60
ISOURCE [mA]
80
100
S-89130 Series
VOUTISINK, VDD 2.7 V, VSS 0 V
VOUTISINK, VDD 5.0 V, VSS 0 V
3.0
6
2.5
5
+25°C
2.0
VOUT [V]
VOUT [V]
20
Output voltage (VOUT) vs. ISINK
3. 4. 1
+125°C
1.5
1.0
Ta = −40°C
0.5
+125°C
3
Ta = −40°C
+25°C
2
0
0
3. 4. 2
4
1
0
20
40
60
ISINK [mA]
80
100
0
20
40
60
ISINK [mA]
80
100
S-89140 Series
VOUTISINK, VDD 2.7 V, VSS 0 V
VOUTISINK, VDD 5.0 V, VSS 0 V
3.0
6
+125°C
2.0
5
+25°C
VOUT [V]
2.5
VOUT [V]
+25°C
+125°C
2
1
0
3. 4
Ta = −40°C
4
1.5
1.0
Ta = −40°C
0.5
4
+125°C
3
+25°C
Ta = −40°C
2
1
0
0
0
20
40
60
ISINK [mA]
80
100
0
20
40
60
ISINK [mA]
80
100
17
MINI ANALOG SERIES
S-89130/89140 Series
4.
CMOS OPERATIONAL AMPLIFIER
Rev.1.0_02
Input bias current vs. Temperature
IBIASTa, VDD 5.0 V, VSS 0 V, VCMR VDD / 2
60
IBIAS[nA]
50
40
30
20
10
0
40 25
18
0
25
50
Ta [°C]
75
100
125
1.97±0.03
8
7
6
5
3
4
+0.05
1
0.5
2
0.08 -0.02
0.48±0.02
0.2±0.05
No. PH008-A-P-SD-2.1
TITLE
SNT-8A-A-PKG Dimensions
No.
PH008-A-P-SD-2.1
ANGLE
UNIT
mm
ABLIC Inc.
+0.1
ø1.5 -0
2.25±0.05
4.0±0.1
2.0±0.05
ø0.5±0.1
0.25±0.05
0.65±0.05
4.0±0.1
4 321
5 6 78
Feed direction
No. PH008-A-C-SD-2.0
TITLE
SNT-8A-A-Carrier Tape
No.
PH008-A-C-SD-2.0
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PH008-A-R-SD-1.0
TITLE
SNT-8A-A-Reel
No.
PH008-A-R-SD-1.0
QTY.
ANGLE
UNIT
mm
ABLIC Inc.
5,000
0.52
2.01
2
0.52
0.2 0.3
1.
2.
1
(0.25 mm min. / 0.30 mm typ.)
(1.96 mm ~ 2.06 mm)
1.
2.
3.
4.
0.03 mm
SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.96 mm to 2.06mm).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1.
2.
(0.25 mm min. / 0.30 mm typ.)
(1.96 mm ~ 2.06 mm)
TITLE
No. PH008-A-L-SD-4.1
SNT-8A-A
-Land Recommendation
PH008-A-L-SD-4.1
No.
ANGLE
UNIT
mm
ABLIC Inc.
2.90±0.2
8
5
1
4
0.13±0.1
0.2±0.1
0.65±0.1
No. FM008-A-P-SD-1.2
TITLE
TMSOP8-A-PKG Dimensions
No.
FM008-A-P-SD-1.2
ANGLE
UNIT
mm
ABLIC Inc.
2.00±0.05
4.00±0.1
4.00±0.1
1.00±0.1
+0.1
1.5 -0
1.05±0.05
0.30±0.05
3.25±0.05
4
1
5
8
Feed direction
No. FM008-A-C-SD-2.0
TITLE
TMSOP8-A-Carrier Tape
FM008-A-C-SD-2.0
No.
ANGLE
UNIT
mm
ABLIC Inc.
16.5max.
13.0±0.3
Enlarged drawing in the central part
13±0.2
(60°)
(60°)
No. FM008-A-R-SD-1.0
TITLE
TMSOP8-A-Reel
No.
FM008-A-R-SD-1.0
QTY.
ANGLE
UNIT
mm
ABLIC Inc.
4,000
Disclaimers (Handling Precautions)
1.
All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2.
The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4.
Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5.
Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
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8.
The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
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9.
In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
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careful when handling these with the bare hands to prevent injuries, etc.
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described herein does not convey any license under any intellectual property rights or any other rights belonging to
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representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
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