TOPT16-800C0
TOPTriac
Rev.01 - 22 August 2018
Product data sheet
1. General description
Planar passivated Temperature and Overload Protected Triac with high commutation performance
in a SOT78 (TO-220AB) plastic package. This TOPTriac conveniently self protects by turning off in
the event of excessive temperature. It is triggered negatively using continuous DC or current pulses.
TOPTriac is ideal for applications where heatsinking is limited. TOPTriac is safe to use in short-term
overload under normal duty cycle conditions. TOPTriac gives the additional assurance that it will
self-protect, if pushed to thermal overload, under abnormal duty cycle or fault conditions.
2. Features and benefits
•
•
•
•
•
•
•
•
•
Over-temperature self-protection function
Eliminates risk of overload failure due to limited heatsinking
Pin compatible with standard triacs
Exclusive negative gate triggering
Full cycle AC conduction
Hi-Com technology for maximum immunity to false triggering
High immunity to false turn-on by dV/dt
High minimum IGT for guaranteed immunity to gate noise
Planar passivated for voltage ruggedness and reliability
3. Applications
•
•
•
•
•
Any circuit where protection against overload and/or over temperature is required
Motor controls and starters – e.g. refrigeration compressors
High power density motors – e.g. vacuum cleaners, window blinds, food processors
Heating and cooking appliances
Water boilers
4. Quick reference data
Table 1. Quick reference data
Symbol Parameter
Conditions
Min
Typ
Max
Unit
-
-
800
V
VDRM
repetitive peak off-state
voltage
IT(RMS)
RMS on-state current
full sine wave; Tmb ≤ 101 °C; Fig. 1;
Fig. 2; Fig. 3
-
-
16
A
ITSM
non-repetitive peak onstate current
full sine wave; Tj(init) = 25 °C;
tp = 20 ms; Fig. 4; Fig. 5
-
-
140
A
Tj
junction temperature
conducting mode
-
-
125
°C
150
°C
self-protection mode
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Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VD = 12 V; IT = 100 mA; LD+ G-;
Tj = 25 °C; Fig. 7
5
-
35
mA
VD = 12 V; IT = 100 mA; LD- G-;
Tj = 25 °C; Fig. 7
5
-
35
mA
Static characteristics
IGT
gate trigger current
IH
holding current
VD = 12 V; Tj = 25 °C; Fig. 9
-
-
35
mA
VT
on-state voltage
IT = 18 A; Tj = 25 °C; Fig. 10
-
1.3
1.5
V
Dynamic characteristics
dVD/dt
rate of rise of off-state
voltage
VDM = 536 V; Tj = 125 °C; (VDM = 67%
of VDRM); exponential waveform; gate
open circuit
500
-
-
V/μs
dIcom/dt
rate of change of
commutating current
VD = 400 V; IT(RMS) = 16 A; dVcom/
dt = 20 V/μs; (snubberless condition);
gate open circuit
15
-
-
A/ms
5. Pinning information
Table 2. Pinning information
Pin
Symbol
Description
Simplified outline
1
CM
common
2
LD
load
3
mb
G
LD
gate
mounting base; load
Graphic symbol
mb
1
2
3
6. Ordering information
Table 3. Ordering information
Type number
Package
TOPT16-800C0
Name
Description
Version
TO-220AB
Plastic single-ended package;heatsink mounted;1 mounting
hole; 3 leads TO-220AB
SOT78
7. Marking
Table 4. Marking codes
Type number
TOPT16-800C0
TOPT16-800C0
Product data sheet
Marking Code
TOPT16-800C0
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8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDRM
repetitive peak off-state voltage
IT(RMS)
RMS on-state current
ITSM
non-repetitive peak on-state
current
Min
Max
Unit
-
800
V
full sine wave; Tmb ≤ 101 °C; Fig. 1; Fig. 2;
Fig. 3
-
16
A
full sine wave; Tj(init) = 25 °C;
tp = 20 ms; Fig 4; Fig 5
-
140
A
full sine wave; Tj(init) = 25 °C;
tp = 16.7 ms
-
150
A
I2t
I2t for fusing
tp = 10 ms; sine-wave pulse
-
98
A2s
dIT/dt
rate of rise of on-state current
IG = 70 mA
-
100
A/μs
IGM
peak gate current
-
2
A
PGM
peak gate power
-
5
W
PG(AV)
average gate power
-
0.5
W
Tstg
storage temperature
-40
150
°C
Tj
junction temperature
conducting mode
-
125
°C
self-protection mode
-
150
°C
over any 20 ms period
Fig. 1. RMS on-state current as a function of mounting
base temperature; maximum values
f = 50 Hz; Tmb = 101 °C
Fig. 2. RMS on-state current as a function of surge
duration; maximum values
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α = conduction angle
a = form factor = IT(RMS) / IT(AV)
Fig. 3. Total power dissipation as a function of RMS on-state current; maximum values
tp ≤ 20 ms
(1) dIT/dt limit
Fig. 4. Non-repetitive peak on-state current as a function of pulse width; maximum values
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f = 50 Hz
Fig. 5. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum
values
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9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Rth(j-mb)
thermal resistance
from junction to
mounting base
Rth(j-a)
thermal resistance
from junction to
ambient free air
Conditions
Min
Typ
Max
Unit
full cycle; Fig. 6
-
-
1.2
K/W
in free air
-
60
-
K/W
Fig. 6. Transient thermal impedance from junction to mounting base as a function of pulse width
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10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VD = 12 V; IT = 100 mA; LD+ G-;
Tj = 25 °C; Fig. 7
5
-
35
mA
VD = 12 V; IT = 100 mA; LD- G-;
Tj = 25 °C; Fig. 7
5
-
35
mA
VD = 12 V; IG = 100 mA; LD+ G-;
Tj = 25 °C; Fig. 8
-
-
60
mA
VD = 12 V; IG = 100 mA; LD- G-;
Tj = 25 °C; Fig. 8
-
-
50
mA
Static characteristics
IGT
IL
gate trigger current
latching current
IH
holding current
VD = 12 V; Tj = 25 °C; Fig. 9
-
-
35
mA
VT
on-state voltage
IT = 18 A; Tj = 25 °C; Fig. 10
-
1.3
1.5
V
VGT
gate trigger voltage
VD = 12V; IT = 100 mA;Tj = 25 °C;
Fig. 11
-
1.4
2.3
V
VD = 400V; IT = 100 mA;Tj = 125 °C;
Fig. 11
0.5
-
-
V
VD = 800 V; Tj = 125 °C
-
0.1
0.5
mA
ID
off-state current
Dynamic characteristics
dVD/dt
rate of rise of off-state
voltage
VDM = 536 V; Tj = 125 °C; (VDM = 67%
of VDRM); exponential waveform; gate
open circuit
500
-
-
V/μs
dIcom/dt
rate of change of
commutating current
VD = 400 V; IT(RMS) = 16 A; dVcom/
dt = 20 V/μs; (snubberless condition);
gate open circuit;
15
-
-
A/ms
Over-temperature protection characteristics
Ttrip
trip junction
temperature
see application information
125
-
150
°C
VG(trip)
trip gate voltage
IG = 2 mA; see application information
0.3
-
-
V
IG = 50 mA; see application information
-
-
0.9
V
Tj = 25 °C; VG = VG(trip); circuit-applied
current requirement; see application
information section
0.5
-
-
mA
Tj < 150 °C; VG = VGT; circuit-applied
current requirement; see application
information section
-
-
2
mA
Operating requirement for pulsed gate triggering
IG(bl)
gate bleed current
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(1) LD+ G(2) LD- G-
(1) LD+ G(2) LD- G-
Fig. 7. Normalized gate trigger current as a function of Fig. 8. Normalized latching current as a function of
junction temperature
junction temperature
bidc4-009
3
IH
IH(25°C)
2
(1)
(2)
1
0
-50
0
50
100
Tj (°C)
150
Vo = 1.024 V; Rs = 0.021 Ω
(1) Tj = 125 °C; typical values
(2) Tj = 125 °C; maximum values
(3) Tj = 25 °C; maximum values
(1) LD+ G(2) LD- GFig. 9. Normalized holding current as a function of
junction temperature
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Fig. 10. On-state current as a function of on-state
voltage
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(1) LD+ G(2) LD- GFig. 11. Normalized gate trigger voltage as a function of junction temperature
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11. Application information
TOPTriac is a three terminal device that will plug into existing triac circuits. There are
some unique features that must be understood to gain its full benefits.
11.1 The Gate terminal is also a Feedback terminal
TOPTriac can be triggered like any normal triac. In this conventional mode, the Gate
acts as an input. However, the Gate can also be an output, since it provides voltage
signatures that indicate the status of TopTriac. The controlling microcontroller can
analyse the feedback and act upon it, according to the needs of the application.
11.2 Normal triggering
TOPTriac is triggered with negative gate current and may be triggered from 5 V logic or
higher voltage supply with suitable series gate resistor. VGT is higher than for standard
triacs, so series gate resistors will be a little lower. For 35 mA IGT and 5 V trigger voltage,
the current-limiting resistance will typically be 82 Ω instead of 100 Ω for standard triacs.
DC gate triggering is the simplest method that automatically achieves safe latch-off after
the over-temperature trip protection has been activated.
Alternatively, pulse triggering may be applied to the gate in combination with a low level
bleed current (IG(bl)), to sustain the trip condition after the over-temperature trip protection
has been activated.
11.3 Over-temperature protection
If an overload current or insufficient cooling causes the junction temperature to rise
above Ttrip, TOPTriac will disable its gate drive to prevent further conduction before it
loses control or becomes damaged. When the over-temperature trip is activated, the
Gate-to-Common voltage VG-CM reduces from the VGT to the VG(trip) level (please refer to
the VGT and VG(trip) characteristics).
Continuous DC gate drive sustains continued safe latch-off even after TOPTriac
temperature has dropped below Ttrip. This allows a controlled reset by removing and
reapplying gate drive after the fault condition has been removed.
Pulsed gate drive, which may be preferred for phase control or for efficiency reasons,
is combined with a low level bleed current IG(bI) to sustain latch-off when the over-
temperature trip is activated. (Please refer to the IG(bI) limiting values for the minimum
and maximum allowable bleed current that may be applied during pulse triggering).
11.4 Resetting after over-temperature
As long as continuous gate current is applied after over-temperature trip, TOPTriac
will remain deactivated even after the TOPTriac temperature has dropped below Ttrip.
This is the safest protection method that allows the removal of the fault condition before
controlled reset is implemented.
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The simplest reset is user-controlled, where TOPTriac will remain in the safe shutdown
condition until gate drive or power is removed and reapplied.
Automatic reset will not require user intervention, but it may be ‘unintelligent/dumb’ open
loop that does not involve a feedback stimulus, or ‘intelligent/smart’ closed loop that does
respond to gate feedback.
User-controlled reset. The user removes and reapplies power to the application or
presses a ‘reset’ button that momentarily removes the gate drive.
Open loop automatic reset. If there is a known or predictable overload conditon in
the application that may cause an occasional overheat, a periodic discontinuity may be
programmed into the gate drive (e.g. at the end of the program stage, once per hour, day
or week, depending on the application) that allows automatic reset. For DC gate drive,
removal of the gate drive achieves reset. For pulsed gate drive, IG(bI) must be removed
and reapplied.
The previous two examples will work for applications that do not require immediate
reaction to a fault conditon, hence gate feedback monitoring is not needed.
Closed loop automatic reset. Applications where an immediate reaction to an overtemperature trip is needed will require monitoring of TOPTriac status. This is possible by
monitoring VG-CM while gate drive is being applied. During normal conduction, the higher
level VGT will be apparent with a square wave at mains frequency superimposed upon it.
(The square wave on the gate results from the load current.) During the over-temperature
trip condition, the lower level VG(trip) will be apparent and there will be no AC ripple
because no load current is flowing. The difference can be detected by the microcontroller,
which can take the appropriate action that has been programmed according to the needs
of the application.
The following four figures show oscilloscope current and voltage waveforms for the four
principal operating modes of TOPTriac: DC triggering, normal conduction and overtemperature tripped; pulse triggering, normal conduction and over-temperature tripped.
The pulse triggering waveforms show phase control at the peak of the mains sine wave
at half power setting.
Channel 1 shows gate current (20mA/div).
Channel 2 shows load current (5A/div).
Channel 3 shows gate voltage VG-CM (1V/div).
Channel 4 shows load voltage VLD-CM (200V/div).
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003aaj331
003aaj330
Fig. 13. DC triggering, over-temperature tripped
Fig. 12. DC triggering, normal conduction
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Fig. 14. Pulse triggering, normal conduction
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Fig. 15. Pulse triggering, over-temperature tripped
11.5 Important characteristics
Ttrip is the junction temperature at which TOPTriac will disable itself. It will be above 125
°C and below 150 °C .
VGT is the gate voltage characteristic during normal triggering. It is higher than for normal
triacs. VGT is used in the calculation of RG to set the gate trigger current.
VG(trip) is the gate voltage characteristic when in the over-temperature trip condition. It
is lower than VGT. VG(trip) is used in the calculation of RG(bI) to set the gate bleed current
IG(bI).
IG(bI) is used during pulse triggering. It is the continuous DC bleed current that must flow
out of the gate to achieve clean latch-off at the trip point and maintain this safe latch-off
condition as TOPTriac cools down to ambient temperature.
The min IG(bI) value is the minimum bleed current to sustain latch-off after cooling.
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The max IG(bI) value is the maximum bleed current that will not trigger TOPTriac up to
maximum trip temperature.
11.6 How to calculate the bleed resistor RG(bI)
When pulse triggering it is critical that the bleed current is set correctly.
If IG(bI) is too low (lower than 0.5 mA), TOPTriac may not be able to provide reliable overtemperature protection during continuous fault conditions. Normal trip may be achieved
at Ttrip, but self-reset may occur as it cools, leading to on-off cycling. This constitutes a
loss of control and should be avoided.
If IG(bI) is too high (higher than 2 mA), TOPTriac may trigger uncontrollably at elevated
temperature that is below the trip temperature (This is another form of loss of control that
must not be allowed). However, it will still self-protect as intended above trip temperature.
The following examples show how to calculate the minimum and maximum RG(bI). The
chosen value should be approximately mid-way between the two extremes.
Example 1 (3.3 V logic supply)
Maximum IG(bI) is 2 mA. During normal conduction when IG(bI) must not be high enough to
cause false triggering, VGT applies and should be used in our calculations. Minimum VGT
@ Tj(max) is 0.5 V.
Therefore minimum RG(bI):
RG(bl) = (3.3 - 0.5) / 2 mA = 1.4 kOhm
Minimum IG(bI) is 0.5 mA. When tripped, VG(trip) applies and should be used in our
calculations. IG(bI) must remain high enough to maintain the trip condition, even when
VG(trip) is at a maximum. Maximum VG(trip) is 0.9 V.
Therefore minimum RG(bI):
RG(bl) = (3.3 - 0.9) / 0.5 mA = 4.8 kOhm
Suggested RG(bI) is 3 kΩ.
Example 2 (5 V logic supply)
Min RG(bI):
RG(bl) = (5 - 0.5) / 2 mA = 2.25 kOhm
Max RG(bI):
RG(bl) = (5 - 0.9) / 0.5 mA = 8.2 kOhm
Suggested RG(bI) is 5.1 kΩ.
Example 3 (12 V auxiliary gate drive supply)
Min RG(bI):
RG(bl) = (12 - 0.5) / 2 mA = 5.75 kOhm
Max RG(bI):
RG(bl) = (12 - 0.9) / 0.5 mA = 22.2 kOhm
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Suggested RG(bI) is 15 kΩ.
11.7 Application schematics
The following schematics show possible implementations of TOPTriac. Gate trigger
current is from a 5 V minimum logic supply. It is possible to trigger from a 3.3 V
microcontroller by using a transistor level shifter to a higher voltage gate drive power
supply, which may be 5 V minimum or the 12 V supply that may already be available for
other loads such as lighting, indication and sounders.
For DC triggering, reset is achieved by removing the gate drive at any time and
reapplying it after TOPTriac temperature has dropped below Ttrip.
For pulse triggering, reset is achieved by removing and reapplying the gate bleed
current IG(bI) after TOPTriac temperature has dropped below Ttrip.
IG(bI) is set by RG(bI). It is best derived directly from the low voltage microcontroller supply
(up to 5V max) and will most likely be direct drive from the microcontroller output.
In all of the following circuits, gate trigger and gate bleed current are applied by logic zero
drive from the microcontroller.
Fig. 16. DC triggering from 5 V microcontroller
Fig. 17. Pulse triggering from 5 V microcontroller
Fig. 18. DC triggering from 3.3 V microcontroller
Fig. 19. Pulse triggering from 3.3 V microcontroller
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12. Package outline
Plastic single-ended package;heatsink mounted;1 mounting hole; 3 leads TO-220AB
E
TO220
A
A1
D1
D
D2
q
ØP
L1
E1
L
b1
e
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make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
13. Legal information
Data sheet status
Document
status [1][2]
Product
status [3]
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[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
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This document contains data from the
preliminary specification.
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product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Product
[short] data
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[1 ]
[2]
[3]
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the quality and reliability of the device.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific WeEn Semiconductors product is automotive
qualified, the product is not suitable for automotive use. It is neither qualified
nor tested in accordance with automotive testing or application requirements.
WeEn Semiconductors accepts no liability for inclusion and/or use of nonautomotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without WeEn Semiconductors’ warranty
of the product for such automotive applications, use and specifications, and
(b) whenever customer uses the product for automotive applications beyond
WeEn Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies WeEn Semiconductors for
any liability, damages or failed product claims resulting from customer
design and use of the product for automotive applications beyond WeEn
Semiconductors’ standard warranty and WeEn Semiconductors’ product
specifications.
All information provided in this document is subject to legal disclaimers.
22 August 2018
©
WeEn Semiconductors Co., Ltd. 2018. All rights reserved
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TOPT16-800C0
WeEn Semiconductors
TOPTriac
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
TOPT16-800C0
Product data sheet
All information provided in this document is subject to legal disclaimers.
22 August 2018
©
WeEn Semiconductors Co., Ltd. 2018. All rights reserved
17 / 18
TOPT16-800C0
WeEn Semiconductors
TOPTriac
14. Contents
1. General description........................................................1
2. Features and benefits....................................................1
3. Applications....................................................................1
4. Quick reference data......................................................1
5. Pinning information........................................................2
6. Ordering information......................................................2
7. Marking............................................................................2
8. Limiting values...............................................................3
9. Thermal characteristics.................................................6
10. Characteristics.............................................................7
11. Application information.............................................10
12. Package outline..........................................................15
13. Legal information.......................................................16
14. Contents.......................................................................18
© WeEn Semiconductors Co., Ltd. 2018. All rights reserved
For more information, please visit: http://www.ween-semi.com
For sales office addresses, please send an email to: salesaddresses@ween-semi.com
Date of release: 22 August 2018
TOPT16-800C0
Product data sheet
All information provided in this document is subject to legal disclaimers.
22 August 2018
©
WeEn Semiconductors Co., Ltd. 2018. All rights reserved
18 / 18