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S-89531ACNC-HCCTFG

S-89531ACNC-HCCTFG

  • 厂商:

    ABLIC(艾普凌科)

  • 封装:

    TSSOP5

  • 描述:

    IC COMPARATOR CMOS 0.7UA SC-88A

  • 数据手册
  • 价格&库存
S-89531ACNC-HCCTFG 数据手册
S-89530A/89531A Series MINI ANALOG SERIES 0.7 µA Rail-to-Rail CMOS COMPARATOR www.ablic.com www.ablicinc.com Rev.4.1_02 © ABLIC Inc., 2001-2015 The mini analog series is a group of ICs that incorporate a general-purpose analog circuit in an ultra-small package. The S-89530A/89531A Series are CMOS type comparators that feature Rail-to-Rail*1 I/O and can be driven at a lower voltage and lower current consumpsion than existing comparators, making the S-89530A/89531A for use in battery-powered compact portable devices. *1. Rail-to-Rail is a registered trademark of Motorola Inc.  Features  Can be driven lower voltage than existing VDD  0.9 V to 5.5 V general-purpose comparators: IDD  0.7 A (Typ.)  Low current consumption:  Rail-to-Rail wide input and output voltage range: VCMR  VSS to VDD  Low input offset voltage: 5.0 mV max.  Lead-free, Sn100%, halogen-free *1 *1. Refer to “ Product Code List” for details.  Applications  Cellular phones  PDAs  Notebook PCs  Digital cameras  Digital video cameras  Package Package Name Package NP005-B-P-SD SC-88A Drawing Code Tape NP005-B-C-SD Reel NP005-B-R-SD  Product Code List Input Offset Voltage VIO  10 mV max. VIO  5 mV max. Remark : G, S or U Table 1 Product Name (Single) S-89530ACNC-HCBTF S-89531ACNC-HCCTF 1 MINI ANALOG SERIES 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series Rev.4.1_02  Pin Configuration SC-88A Top view VDD 5 Table 2 OUT 4 Internal Equivalent Circuit Pin No. Symbol Description 1 2 3 4 5 IN() VSS IN() OUT VDD Non-inverted input pin GND pin Inverted input pin Output pin Positive power supply pin   Figure  Figure Figure Figure 3 1 2 IN () VSS IN () Figure 1  Internal Equivalent Circuits (1) Output pin (2) Input pin VDD VDD VSS VSS Figure 2 2 (3) VDD pin VDD VSS Figure 3 Figure 4 3 3 2 4 MINI ANALOG SERIES Rev.4.1_02 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series  Absolute Maximum Ratings Table 3 Parameter Power supply voltage Input voltage Output voltage Differential input voltage Symbol VDD VIN VOUT VIND Power dissipation PD Operating temperature Storage temperature Topr Tstg (Ta  25C unless otherwise specified) Ratings Unit VSS0.3 to VSS7.0 V VSS0.3 to VSS7.0 (7.0 max.) V VSS0.3 to VDD0.3 (7.0 max.) V 5.5 V 200 (When not mounted on board) mW 350*1 mW 40 to 85 C 55 to 125 C *1. When mounted on board [Mounted board] (1) Board size : 114.3 mm  76.2 mm  t1.6 mm (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation (PD) [mW] 400 Figure 5 350 300 250 200 150 100 50 0 0 100 150 50 Ambient Temperature (Ta) [C] Power Dissipation of Package (When Mounted on Board)  Recommended Operating Voltage Range Table 4 Parameter Operating power supply voltage range Symbol Range Unit VDD 0.9 to 5.5 V 3 MINI ANALOG SERIES 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series Rev.4.1_02  Electrical Characteristics The S-89530ACNC and S-89531ACNC only differ in the input offset voltage. the same. All other specifications are 1. VDD  3.0 V Table 5 DC Characteristics (VDD  3.0 V) Parameter Supply current Symbol Conditions (Ta  25C unless otherwise specified) Measurement Min. Typ. Max. Unit circuit IDDH VIN1  VSS, VIN2  VDD, RL    0.7 1.4 IDDL VIN1  VDD, VIN2  VSS, RL    0.25 0.5 S-89530A: VCMR  1.5 V 10 5 10 S-89531A: VCMR  1.5 V 5 3 5 A Figure 11 mV Figure 7 pA  Input offset voltage VIO Input offset current IIO   1  Input bias current IBIAS   1  Common-mode input voltage range VCMR  0  3.0 V Figure 8 dB  Voltage gain (open loop) AVOL VCMR  1.5  86  Maximum output swing voltage VOH RL  1 M 2.98   VOL RL  1 M   0.02 Common-mode input signal rejection ratio CMRR VSS  VCMR  VDD 45 65  dB Figure 8 Power supply voltage rejection ratio PSRR VDD  0.9 V to 5.5 V 66 75  dB Figure 6 Source current*1 ISOURCE VOUT  VDD  0.1 V 380 500  VOUT  0 V 4000 5500  A Figure 12 Sink current ISINK VOUT  0.1 V 400 550  VOUT  VDD 4800 6000  A Figure 13 *1. V, RL  1 M Figure 9 V Figure 10 Be sure to use the product with a source current of no more than 7 mA. Table 6 AC Characteristics (VDD  3.0 V) Parameter Rise propagation delay time Fall propagation delay time Rise response time Fall response time 4 Symbol (Ta  25C unless otherwise specified) Conditions tPLH tPHL tTLH tTHL Overdrive  100 mV CL  15 pF (Refer to Figure 14) Min. Typ. Max.  110   280   10   30  Unit s MINI ANALOG SERIES Rev.4.1_02 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series 2. VDD  1.8 V Table 7 DC Characteristics (VDD  1.8 V) Parameter Supply current Symbol Conditions (Ta  25C unless otherwise specified) Measurement Min. Typ. Max. Unit circuit IDDH VIN1  VSS, VIN2  VDD, RL    0.7 1.4 IDDL VIN1  VDD, VIN2  VSS, RL    0.25 0.5 S-89530A: VCMR  0.9 V 10 5 10 S-89531A: VCMR  0.9 V 5 3 5 A Figure 11 mV Figure 7 pA  Input offset voltage VIO Input offset current IIO   1  Input bias current IBIAS   1  Common-mode input voltage range VCMR  0  1.8 V Figure 8  80  dB  Voltage gain (open loop) AVOL VCMR  0.9 Maximum output swing voltage VOH RL  1 M 1.78   VOL RL  1 M   0.02 VSS  VCMR  VDD 35 55  VSS  VCMR  VDD  0.2 V 45 60  VDD  0.9 V to 5.5 V 66 75  VOUT  VDD  0.1 V 200 250  VOUT  0 V 1000 1500  VOUT  0.1 V 220 300  VOUT  VDD 1200 1800  Common-mode input signal rejection ratio CMRR Power supply voltage rejection ratio PSRR Source current ISOURCE Sink current ISINK V, RL  1 M Figure 9 V Figure 10 dB Figure 8 dB Figure 6 A Figure 12 A Figure 13 Table 8 AC Characteristics (VDD  1.8 V) Parameter Rise propagation delay time Fall propagation delay time Rise response time Fall response time Symbol (Ta  25C unless otherwise specified) Conditions tPLH tPHL tTLH tTHL Overdrive  100 mV CL  15 pF (Refer to Figure 14) Min. Typ. Max.  90   160   8   25  Unit s 5 MINI ANALOG SERIES 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series Rev.4.1_02 3. VDD  0.9 V Table 9 DC Characteristics (VDD  0.9 V) Parameter Supply current Symbol Conditions (Ta  25C unless otherwise specified) Measurement Min. Typ. Max. Unit circuit IDDH VIN1  VSS, VIN2  VDD, RL    0.7 1.3 IDDL VIN1  VDD, VIN2  VSS, RL    0.25 0.5 S-89530A: VCMR  0.45 V 10 5 10 S-89531A: VCMR  0.45 V 5 3 5 A Figure 11 mV Figure 7 pA  Input offset voltage VIO Input offset current IIO   1  Input bias current IBIAS   1  Common-mode input voltage range VCMR  0  0.9 V Figure 8 V, RL  1 M  74  dB  Voltage gain (open loop) AVOL VCMR  0.45 Maximum output swing voltage VOH RL  1 M 0.88   VOL RL  1 M   0.02 VSS  VCMR  VDD 25 50  VSS  VCMR  VDD  0.3 V 40 60  VDD  0.9 V to 5.5 V 66 75  VOUT  VDD  0.1 V 10 45  VOUT  0 V 12 70  VOUT  0.1 V 10 65  VOUT  VDD 12 120  Common-mode input signal rejection ratio CMRR Power supply voltage rejection ratio PSRR Source current ISOURCE Sink current ISINK Figure 9 V Figure 10 dB Figure 8 dB Figure 6 A Figure 12 A Figure 13 Table 10 AC Characteristics (VDD  0.9 V) Parameter Rise propagation delay time Fall propagation delay time Rise response time Fall response time 6 Symbol (Ta  25C unless otherwise specified) Conditions tPLH tPHL tTLH tTHL Overdrive  100 mV CL  15 pF (Refer to Figure 14) Min. Typ. Max.  65   65   5   20  Unit s MINI ANALOG SERIES Rev.4.1_02 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series  Measurement Circuits 1. Power supply voltage rejection ratio VDD   VIN  The power supply voltage rejection ratio (PSRR) is calculated by the following expression, with the value of VIO measured at each VDD. VOUT Measurement conditions: When VDD  0.9 V: VDD  VDD1, VIO  VIO1 When VDD  5.5 V: VDD  VDD2, VIO  VIO2  VDD1  VDD2    VIO1  VIO2  PSRR  20log 0.45 V Figure 6 2. Input offset voltage VDD  Input offset voltage (VIO) VIN   VOUT The input offset voltage (VIO) is defined as VIN at which VOUT changes by changing VIN. VCMR  VDD/2 Figure 7 7 MINI ANALOG SERIES 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series Rev.4.1_02 3. Common-mode input signal rejection rate, common-mode input voltage range  VDD   VIN1 VOUT Common-mode input signal rejection ratio (CMRR) The common-mode input signal rejection ratio, CMRR, can be calculated by the following expression, with the offset voltage (VIO) defined as VIN1 minus VIN2 at which VOUT is changed by changing VIN1. Measurement conditions: When VIN2  VCMR (max.): VIO  VIO1 When VIN2  VCMR (min.): VIO  VIO2 CMRR  20log  VCMR(max.)  VCMR(min.)  VIO1  VIO2  VIN2  Figure 8    Common-mode input voltage range (VCMR) The common-mode input voltage range is the range of VIN2 within which VOUT satisfies the common mode input signal rejection ratio specification. 4. Maximum output swing voltage VDD   VOH  Maximum output swing voltage (VOH) Measurement conditions: VIN1  VDD  0.1 V 2 VDD  0.1 V VIN2  2 RL  1 M RL VIN1 VIN2 VDD/2 Figure 9 VDD VDD/2 RL   VIN1 VIN2 Figure 10 8 VOL  Maximum output swing voltage (VOL) Measurement conditions: VIN1  VDD  0.1 V 2 VDD  0.1 V VIN2  2 RL  1 M MINI ANALOG SERIES Rev.4.1_02 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series 5. Supply current  Supply current (IDDH) Measurement conditions: VIN1  VSS VIN2  VDD VDD A   VIN1 VOUT  Supply current (IDDL) Measurement conditions: VIN1  VDD VIN2  VSS VIN2 Figure 11 6. Source current  Source current (ISOURCE) VDD Measurement conditions:   VIN1 VDD  0.1 V 2 VDD  0.1 V VIN2  2 VOUT  VDD  0.1 V or VOUT  0 V VIN1  A VIN2 VOUT Figure 12 7. Sink current VDD VOUT A   VIN1  Sink current (ISINK) Measurement conditions: VIN1  VDD  0.1 V 2 VDD VIN2   0.1 V 2 VOUT  0.1 V or VOUT  VDD VIN2 Figure 13 9 MINI ANALOG SERIES 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series Rev.4.1_02 8. Propagation delay time/transient response time IN() t PLH, t PHL Input rise/fall time: 20 ns IN()  VDD/2 100 mV 100 mV IN() t TLH VOUT VOH  VDD  0.9 VOL  VDD  0.1 VOUT t THL Figure 14  Cautions  When RL  100 k, VOH may rise only 0.65 V if the temperature is 40C and VDD  0.9 V. If the temperature is 20C, however, VOH rises to 0.8 V, which is 100 mV below VDD, when VDD  0.9 V, even if RL  100 k. If VDD is 1.2 V, VOH rises to 0.88 V, which is 20 mV below VDD when RL  100 k, even at 40C. The temperature characteristics data described above can be used as reference data. Note that 100% testing under these conditions has not been performed. 10  Be sure to use the product with a source current of no more than 7 mA.  Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. MINI ANALOG SERIES Rev.4.1_02 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series  Characteristics (Reference Data) 1. Current consumption vs. Power supply voltage IDDH vs. VDD IDDL vs. VDD 0.5 1.5 85C 0.4 I DDL ( A) IDDH (A) 85C 25C 1.2 0.9 0.6 25C 0.3 0.2 Ta  40C 0.1 0.3 Ta  40C 0.0 0.0 0 0 1 2 3 VDD (V) 4 5 2. Output current 2-1. ISOURCE vs. Power supply voltage 1200 800 600 400 6 25C 1000 800 600 400 85C 200 5 Ta  40C 1400 25C 1000 4 VOUT  0.1 V Ta  40C 1200 3 V DD (V) 1600 I SINK ( A) ISOURCE ( A) 1400 2 ISINK vs. Power supply voltage VOUT  VDD  0.1 V 1600 1 6 85C 200 0 0 0 1 2 3 V DD (V) 4 5 6 0 1 2 3 VDD (V) 4 5 6 11 MINI ANALOG SERIES 0.7 A Rail-to-Rail CMOS COMPARATOR S-89530A/89531A Series 2-2. Output voltage (VOH) vs. ISOURCE VDD  3.0 V, VSS  0 V 3.0 Ta  40C 2.0 VOH (V) VOH (V) 2.5 25C 1.5 1.0 85C 0.5 0.0 0 2000 4000 6000 VDD  1.8 V, VSS  0 V 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 Ta  40C 25C 85C 0 8000 500 1000 VOH (V) 1500 2000 I SOURCE (A) ISOURCE (A) VDD  0.9 V, VSS  0 V 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 85C 25C Ta  40C 0 20 40 60 80 ISOURCE ( A) 100 120 Output Voltage (VOL) vs. ISINK 2-3. VDD  3.0 V, VSS  0 V 3.0 85C 25C 2.0 VOL (V) VOL (V) 2.5 Ta  40C 1.5 1.0 0.5 0.0 0 1000 2000 3000 4000 5000 6000 7000 8000 ISINK (A) VDD  0.9 V, VSS  0 V 0.9 85C 0.6 VOL (V) 25C Ta  40C 0.3 0.0 0 12 Rev.4.1_02 50 100 ISINK (A) 150 200 VDD  1.8 V, VSS  0 V 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 85C 25C Ta  40C 0 500 1000 1500 ISINK (A) 2000 2500 3000 2.0±0.2 1.3±0.1 5 1 4 2 0.65 3 +0.1 0.15 -0.05 0.65 0.2 +0.1 -0.05 No. NP005-B-P-SD-1.2 TITLE SC88A-B-PKG Dimensions No. NP005-B-P-SD-1.2 ANGLE UNIT mm ABLIC Inc. 4.0±0.1 2.0±0.1 1.1±0.1 ø1.55±0.05 0.2±0.05 0.3 4.0±0.1 ø1.05±0.1 (2.25) 2.05±0.1 3 2 1 4 5 Feed direction No. NP005-B-C-SD-2.0 TITLE SC88A-B-Carrier Tape No. NP005-B-C-SD-2.0 ANGLE UNIT mm ABLIC Inc. 12.5max. 9.0±0.3 Enlarged drawing in the central part ø13±0.2 (60°) (60°) No. NP005-B-R-SD-2.1 TITLE SC88A-B-Reel No. NP005-B-R-SD-2.1 QTY. ANGLE UNIT mm ABLIC Inc. 3,000 Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com
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