ASNT5143-ALD

Advanced Science And Novel Technology Company, Inc. 2790 Skypark Dr., Ste #112, Torrance, CA 90505 Office: (310) 530-9400 Fax: (310) 530-9402 www.adsantec.com IFC211 / ASNT5143-ALD DC-32GHz XOR Logic Gate High speed broadband Exclusive-OR (XOR) Boolean logic gate  Fully differential CML input interfaces  Fully differential CML output interface with externally adjustable voltage swing  Optional external adjustment of peaking/bandwidth  Single +3.1V or -3.1V power supply  Ground-independent floating supplies to allow for the output common mode voltage adjustment  Power consumption: 250mW  Fabricated in SiGe for high performance, yield, and reliability  Custom 16-pin QFN package with exposed die substrate at the top vcc VR vee vcc  gnd d1p d1n gnd 13 1 9 PKn_gnd qp qn gnd gnd d2p d2n gnd 5 Rev. 1.3.2 1 January 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Dr., Ste #112, Torrance, CA 90505 Office: (310) 530-9400 Fax: (310) 530-9402 www.adsantec.com DESCRIPTION vcc 50 50 d1p d1n vcc IB 55 55 vee vcc OB 50 50 d2p d2n q1p q1n PKn_gnd VR vee IB vee Fig. 1. Functional Block Diagram. This SiGe IC provides broadband Exclusive-OR (XOR) Boolean logic functionality, and is intended for use in high-speed measurement / test equipment. The IC shown in Fig. 1 can perform XOR operation with a high-speed data or clock input signal d1p/d1n and another high-speed data or clock input signal d2p/d2n. The resulting high-speed double-rate or double-frequency output signal is delivered to the output port q1p/q1n. The part’s inputs and outputs support the CML logic interface with on chip 50Ohm or 55Ohm termination to vcc respectively, and may be used differentially, AC/DC coupled, single-ended, or in any combination (also see POWER SUPPLY CONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply with the specifications shown in ELECTRICAL CHARACTERISTICS. In the input AC-coupling mode, the input termination provides the required common mode voltage automatically. In this case, the output can be used in DC-coupling mode and its common mode voltage can be adjusted using floating power supplies as described in the POWER SUPPLY CONFIGURATION section below. The output signal amplitude can be controlled by applying external voltage to the port VR. The part’s bandwidth (or AC-characteristic peaking) can be controlled by applying external voltage to the port PKn. The pin can be left not connected to provide the minimum peaking and bandwidth, or connected to vee to provide the maximum peaking and bandwidth. POWER SUPPLY CONFIGURATION The part can operate with either negative supply (vcc = 0.0V = ground), or positive supply (vee = 0.0V = ground), or floating supply as described below. In case of the positive or floating supply, all I/Os need AC termination when connected to any devices with 50Ohm termination to ground. Different PCB layouts will be needed for each different power supply combination. Rev. 1.3.2 2 January 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Dr., Ste #112, Torrance, CA 90505 Office: (310) 530-9400 Fax: (310) 530-9402 www.adsantec.com Two floating supply configurations are shown in Fig. 2. In this case, the part’s output common mode voltage can be adjusted by modifying the voltage of PSU1. The negative supply configuration provides common mode voltages below ground while the positive supply configuration delivers common mode voltages above ground. PSU1 - G + GND vcc PSU2 - G + PSU2 - G + vee vcc a. PSU1 - G + vee GND b. Fig. 2. Negative (a) and Positive (b) Floating Supply Configurations All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V. TERMINAL FUNCTIONS TERMINAL Name No. Type DESCRIPTION High-Speed I/Os Differential data/clock inputs with internal SE 50Ohm termination to vcc Differential data/clock inputs with internal SE 50Ohm termination to vcc Differential data outputs with internal SE 55Ohm termination to vcc. Require either external SE 55Ohm terminations to vcc, or differential 110Ohm termination. Low-Speed Control Ports Pkn-gnd 12 Analog DC control input with internal 32KOhm termination to vcc VR 15 Analog DC control input with internal 6.4KOhm termination to vcc Supply and Termination Voltages Name Description Pin Number vcc Positive power supply. (+2.8V or 0) 13, 16 d1p d1n d2p d2n q1p q1n vee gnd 2 3 6 7 11 10 CML input CML input CML output Negative power supply. (0V or 2.8V) Floating ground (AC-decoupled to vee on chip) 14 1, 4, 5, 8, 9 ABSOLUTE MAXIMUM RATINGS Caution: Exceeding the absolute maximum ratings shown in may cause damage to this product and/or lead to reduced reliability. Functional performance is specified over the recommended operating conditions for power supply and temperature only. AC and DC device characteristics at or beyond the absolute maximum ratings are not assumed or implied. Rev. 1.3.2 3 January 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Dr., Ste #112, Torrance, CA 90505 Office: (310) 530-9400 Fax: (310) 530-9402 www.adsantec.com Table 1. Absolute Maximum Ratings Parameter Positive supply voltage (vcc) Negative supply voltage (vee) RF Input voltage swing (SE) Case temperature Storage temperature Operational/storage humidity Min 0 vcc-3.6 -40 10 Max 3.6 0 0.8 +100 +100 98 Units V V V ºC ºC % ELECTRICAL CHARACTERISTICS Parameter Positive supply voltage Negative supply voltage Power consumption Junction temperature Number of ports On-chip termination Input resistance Data rate Clock Speed Voltage swing Common mode level Input return loss On-chip termination Data rate Clock Speed Latency Rise/Fall time Jitter Logic “1” voltage level Logic “0” voltage level Voltage swing Output return loss Input voltage range Input voltage range Rev. 1.3.2 Symbol Min Typ Max Units General Parameters vcc 1.2 1.6 V vee vcc-3.1 vcc-2.8 V 225 mW 250 mW -40 125 ºC High-Speed Inputs 2 Rin 50 Ohm 100 Ohm DC 28 Gbps DC 28 GHz ΔVin 50 400 mV vcc-0.4 vcc-ΔVin/2 V S11 TBD dB High-Speed Outputs Rout 55 Ohm DC 32 Gbps DC 36 Gbps DC 32 GHz tL TBD ps tR/tF 8.5 14 ps 2 ps 1 V vcc V 0 V vcc-0.8 vcc-0.1 ΔVout 1600 200 mV S22 TBD dB Manual Amplitude Control Port (VR) vcc-0.6 vcc-0.3 V Manual Peaking Control Port (PKn_gnd) V vee vcc 4 Notes Recommended range at 2.8V supply at 3.1V supply Differential Each input pin to vcc Differential for PRBS-type input signal pk-pk, each SE input pin in BW Each output pin to vcc PRBS eye opening >600mV PRBS eye opening >530mV Packaged die Peak-to-peak, PRBS7 input For VR from Max to Min Differential, pk-pk in BW Max output swing at vcc-0.3 Faster slope at lower voltage January 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Dr., Ste #112, Torrance, CA 90505 Office: (310) 530-9400 Fax: (310) 530-9402 www.adsantec.com PACKAGE INFORMATION The flip-chip die is housed in a custom 16-pin QFN package shown in Fig. 3. The back side of the die is exposed at the top of the package to provide the heat dissipation path. An external heat sink can be attached to the exposed top. The InfoCube part’s identification label is IFC211. The Adsnatec part’s identification label is ASNT5143ALD. The first 8 characters of the name before the dash identify the bare die including general circuit family, fabrication technology, specific circuit type, and part version while the 3 characters after the dash represent the package’s manufacturer, type, and pin out count. This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten substances. Fig. 3. LGA 16-Pin Package Drawing (All Dimensions in mm) REVISION HISTORY Revision 1.3.2 1.2.2 1.1.1 1.0.1 Rev. 1.3.2 Date Changes 01-2020 Corrected clock speed 11-2019 Corrected title Corrected maximum speed Corrected header 01-2019 Corrected ADSANTEC chip name Corrected electrical Specifications Added package drawing 04-2018 Preliminary release. 5 January 2020