SCHS229B – SEPTEMBER 1998 – REVISED NOVEMBER 2002
D AC Types Feature 1.5-V to 5.5-V Operation
D
D
D
D
D
E OR M PACKAGE
(TOP VIEW)
and Balanced Noise Immunity at 30% of the
Supply
Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
Balanced Propagation Delays
±24-mA Output Drive Current
– Fanout to 15 F Devices
SCR-Latchup-Resistant CMOS Process and
Circuit Design
Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
1A
1B
NC
1C
1D
1Y
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
2D
2C
NC
2B
2A
2Y
description/ordering information
The AC device contains two independent 4-input NAND gates. This device performs the Boolean function
Y = A • B • C • D or Y = A + B + C + D in positive logic.
ORDERING INFORMATION
PDIP – E
–55°C
55 C to 125
125°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SOIC – M
Tube
CD74AC20E
Tube
CD74AC20M
Tape and reel
CD74AC20M96
TOP-SIDE
MARKING
CD74AC20E
AC20M
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
A
B
C
D
OUTPUT
Y
H
H
H
H
L
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
logic diagram (positive logic)
1A
1B
1C
1D
1
2
4
5
6
1Y
2A
2B
2C
2D
9
10
12
13
8
2Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
! " #$ %!&
% "! "! '! ! !( !
%% )*& % "!+ %! !!$* $ %!
!+ $$ "!!&
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1
SCHS229B – SEPTEMBER 1998 – REVISED NOVEMBER 2002
absolute maximum ratings over operating free-air temperature range†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 2): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
TA = 25°C
VCC
VIH
VIL
Supply voltage
High-level
High
level in
input
ut voltage
Low-level
Low
level in
input
ut voltage
VI
VO
Input voltage
IOH
IOL
High-level output current
∆t/∆v
Input transition rise or fall rate
–40°C to
85°C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
1.5
5.5
1.5
5.5
1.5
5.5
VCC = 1.5 V
VCC = 3 V
1.2
1.2
1.2
2.1
2.1
2.1
VCC = 5.5 V
VCC = 1.5 V
3.85
3.85
3.85
VCC = 3 V
VCC = 5.5 V
0
Output voltage
Low-level output current
–55°C to
125°C
0
V
0.3
0.3
0.3
0.9
0.9
0.9
1.65
1.65
1.65
VCC
VCC
0
0
VCC
VCC
0
0
V
V
VCC
VCC
V
V
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
–24
–24
–24
mA
24
24
24
mA
VCC = 1.5 V to 3 V
VCC = 3.6 V to 5.5 V
50
50
50
20
20
20
ns/V
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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SCHS229B – SEPTEMBER 1998 – REVISED NOVEMBER 2002
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
IOH = –50
50 µA
VOH
VI = VIH or VIL
II
ICC
VI = VIH or VIL
VI = VCC or GND
VI = VCC or GND,
MAX
MIN
–40°C to
85°C
MAX
MIN
1.5 V
1.4
1.4
1.4
2.9
3V
2.9
2.9
4.5 V
4.4
4.4
4.4
IOH = –4 mA
IOH = –24 mA
IOH = –50 mA†
3V
2.58
2.4
2.48
4.5 V
3.94
3.7
3.8
IOH = –75 mA†
5.5 V
IOL = 50 µA
VOL
–55°C to
125°C
TA = 25°C
VCC
5.5 V
UNIT
MAX
V
3.85
3.85
1.5 V
0.1
0.1
0.1
3V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
IOL = 12 mA
IOL = 24 mA
IOL = 50 mA†
3V
0.36
0.5
0.44
4.5 V
0.36
0.5
0.44
IOL = 75 mA†
5.5 V
5.5 V
1.65
1.65
5.5 V
IO = 0
V
5.5 V
Ci
±0.1
±1
±1
µA
4
80
40
µA
10
10
10
pF
† Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize
power dissipation. Test verifies a minimum 50-Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C.
switching characteristics over recommended operating free-air temperature range,
VCC = 1.5 V, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A B
A,
B, C
C, or D
Y
–55°C to
125°C
MIN
MAX
–40°C to
85°C
MIN
UNIT
MAX
153
139
153
139
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A B
A,
B, C
C, or D
Y
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–55°C to
125°C
–40°C to
85°C
MIN
MAX
MIN
MAX
4.3
17.1
4.4
15.5
4.3
17.1
4.4
15.5
UNIT
ns
3
SCHS229B – SEPTEMBER 1998 – REVISED NOVEMBER 2002
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A B
A,
B, C
C, or D
Y
–55°C to
125°C
–40°C to
85°C
UNIT
MIN
MAX
MIN
MAX
3.1
12.2
3.1
11.1
3.1
12.2
3.1
11.1
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
4
TYP
Power dissipation capacitance
48
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UNIT
pF
SCHS229B – SEPTEMBER 1998 – REVISED NOVEMBER 2002
PARAMETER MEASUREMENT INFORMATION
S1
R1 = 500 Ω†
From Output
Under Test
2 × VCC
Open
GND
CL = 50 pF
(see Note A)
R2 = 500 Ω†
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
GND
tw
VCC
† When VCC = 1.5 V, R1 = R2 = 1 kΩ
Input
50% VCC
50% VCC
0V
LOAD CIRCUIT
VOLTAGE WAVEFORMS
PULSE DURATION
CLR
Input
VCC
Reference
Input
VCC
50% VCC
50% VCC
0V
0V
tsu
trec
Data
50%
Input 10%
VCC
50% VCC
CLK
90%
VOLTAGE WAVEFORMS
RECOVERY TIME
tf
VCC
50% VCC
50% VCC
tPLH
tPHL
50%
10%
90%
90%
tr
tPHL
Out-of-Phase
Output
VCC
50% VCC
10% 0 V
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
0V
In-Phase
Output
90%
tr
0V
Input
th
90%
VOH
50% VCC
10%
VOL
tf
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
tPLH
50% VCC
10%
tf
50%
10%
90%
tr
VOH
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VCC
Output
Control
50% VCC
50% VCC
0V
tPLZ
tPZL
50% VCC
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
≈VCC
20% VCC
VOL
50% VCC
VOH
80% VCC
≈0 V
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
Phase relationships between waveforms are arbitrary.
D. For clock inputs, fmax is measured with the input duty cycle at 50%.
E. The outputs are measured one at a time with one input transition per measurement.
F. tPLH and tPHL are the same as tpd.
G. tPZL and tPZH are the same as ten.
H. tPLZ and tPHZ are the same as tdis.
Figure 1. Load Circuit and Voltage Waveforms
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5
PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
CD74AC20E
ACTIVE
PDIP
N
14
25
Green (RoHS
& no Sb/Br)
NIPDAU
N / A for Pkg Type
-55 to 125
CD74AC20E
CD74AC20M
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-55 to 125
AC20M
CD74AC20M96
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-55 to 125
AC20M
CD74AC20M96E4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-55 to 125
AC20M
CD74AC20M96G4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-55 to 125
AC20M
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of