ASNT5140-KMC

Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ASNT5140-KMC DC-30GHz XOR Logic Gate  Fully differential CML input interfaces  Fully differential CML output interface with 400mV single-ended swing  Single +3.3V or -3.3V power supply  Power consumption: 270mW  Fabricated in SiGe for high performance, yield, and reliability  Custom CQFP 24-pin package vee Ideal for high speed proof-of-concept prototyping vcc  vcc Exhibits low jitter and limited temperature variation over industrial temperature range vcc  vcc High speed broadband Exclusive-OR (XOR) Boolean logic gate vcc  vee vcc vcc dap qp ASNT5140 vcc vcc dan qn vcc vcc Rev. 5.1.2 1 vcc dbn vcc dbp vcc vee vee April 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com DESCRIPTION 50 50 dap qp XOR core dan qn 50 50 50 50 dbp dbn Fig. 1. Functional Block Diagram The temperature stable ASNT5140-KMC SiGe IC provides broadband Exclusive-OR (XOR) Boolean logic functionality, and is intended for use in high-speed measurement / test equipment. The IC shown in Fig. 1 can XOR a high-speed clock input signal dap/dan with another high-speed clock input signal dbp/dbn, and deliver a high-speed double frequency clock output signal qp/qn. The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination (also see POWER SUPPLY CONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. The differential DC signaling mode is recommended for optimal performance. POWER SUPPLY CONFIGURATION The part can operate with either negative supply (vcc = 0.0V = ground and vee = −3.3V), or positive supply (vcc = +3.3V and vee = 0.0V = ground). In case of the positive supply, all I/Os need AC termination when connected to any devices with 50Ohm termination to ground. Different PCB layouts will be needed for each different power supply combination. All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V. Rev. 5.1.2 2 April 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ABSOLUTE MAXIMUM RATINGS Caution: Exceeding the absolute maximum ratings shown in Table 1 may cause damage to this product and/or lead to reduced reliability. Functional performance is specified over the recommended operating conditions for power supply and temperature only. AC and DC device characteristics at or beyond the absolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced to ground. Table 1. Absolute Maximum Ratings Parameter Supply Voltage (vee) Power Consumption RF Input Voltage Swing (SE) Case Temperature Storage Temperature Operational Humidity Storage Humidity Min -40 10 10 Max -3.6 0.30 1.0 +90 +100 98 98 Units V W V ºC ºC % % TERMINAL FUNCTIONS TERMINAL Name No. Type dap dan dbp dbn qp qn Name vcc vee Rev. 5.1.2 DESCRIPTION High-Speed I/Os Differential clock inputs with internal SE 50Ohm termination to vcc. Differential clock inputs with internal SE 50Ohm termination to vcc. Differential clock outputs with internal SE 50Ohm termination to vcc. Require external SE 50Ohm termination to vcc. Supply and Termination Voltages Description Pin Number Positive power supply. (+3.3V or 0) 2, 4, 6, 8, 10, 12, 14, 15, 16, 17, 18, 20, 22, 24 Negative power supply. (0V or -3.3V) 1, 7, 13, 19 21 23 3 5 11 9 CML input CML input CML output 3 April 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com ELECTRICAL CHARACTERISTICS PARAMETER vee vcc Ivee Power consumption Junction temperature Frequency Swing CM Voltage Level Frequency Logic “1” level Logic “0” level Rise/Fall times Output Jitter MIN TYP MAX UNIT COMMENTS General Parameters -3.1 -3.3 -3.5 V ±6% 0.0 V External ground 85 mA 270 mW -40 25 125 °C HS Input Clock (dap/dan, dbp/dbn) DC 15 GHz 0.05 1.0 V Differential or SE, p-p vcc-0.8 vcc V Must match for both inputs HS Output Clock (qp/qn) DC 30 GHz V vcc vcc-0.4 V With external 50Ohm DC termination 6 8 10 ps 20%-80% 1 ps Peak-to-peak PACKAGE INFORMATION The chip die is housed in a custom 24-pin CQFP package shown in Fig. 2. The package provides a center heat slug located on its back side to be used for heat dissipation. ADSANTEC recommends for this section to be soldered to the vcc plain, which is ground for a negative supply, or power for a positive supply. The part’s identification label is ASNT5140-KMC. The first 8 characters of the name before the dash identify the bare die including general circuit family, fabrication technology, specific circuit type, and part version while the 3 characters after the dash represent the package’s manufacturer, type, and pin out count. This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten substances. Rev. 5.1.2 4 April 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com Fig. 2. CQFP 24-Pin Package Drawing (All Dimensions in mm) Rev. 5.1.2 5 April 2020 Advanced Science And Novel Technology Company, Inc. 2790 Skypark Drive Suite 112, Torrance, CA 90505 Offices: 310-530-9400 / Fax: 310-530-9402 www.adsantec.com REVISION HISTORY Revision 5.1.2 5.0.2 5.0.1 4.0 3.0 2.0 1.0 Rev. 5.1.2 Date Changes 04-2020 Updated Package Information 07-2019 Updated Letterhead 03-2013 Corrected title Added package pin out drawing Revised functional block diagram Revised description Added power supply configuration Added absolute maximum ratings Revised terminal functions Revised electrical characteristics Added package information and mechanical drawing Format correction 02-2008 Revised electrical characteristics section Revised packaging information section 06-2007 Revised electrical characteristics section 04-2007 Revised terminal functions section 01-2007 First release 6 April 2020