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14315R-100

14315R-100

  • 厂商:

    DIALOGSEMICONDUCTOR(戴乐格)

  • 封装:

    VFQFN-48

  • 描述:

    IC INTERFACE SPECIALIZED 48QFN

  • 数据手册
  • 价格&库存
14315R-100 数据手册
The Router 5000 chip is used to build high performance half-routers that increase the scalability and surviveability of LONWORKS® control networks and lower installation costs by allowing mixed physcial media to be used in a single installation. Router 5000 Model 14315R-100 Based on the Neuron® 5000 core, the Router 5000 provides the design flexibility to interface to the external transceiver of your choice for building a LONWORKS communication channel. FEATURES • 3.3V operation. • Higher Performance — Clock rate up to 40 MHz — Larger buffer size to allow for extended NVs and improved throughput. • Transceiver-independent design. • Compact 7mm x 7mm 48-pin QFN package. • Can be connected to a transceiver running at any LonWorks® bit rate from 610 bps to 1.25Mbps. • Logical Isolation between two half-routers improves system reliability by isolating failures between channels. • Transparent multi-channel and multi-media support. • -40°C to +85°C operating temperature range. The Router 5000 includes the Router firmware required to implement a half-router. Its compact form factor minimizes the space required to develop a half-router. Customers can develop two half-routers to build a full router with the same or different external transceiver types. Commonly used transceiver types include support for TP/FT-10, TP-RS485, TP/XF-78F, TP/XF-1250 channel types and the LPT-11 transceiver. These external transceivers can run at interface bit rates from 9.8 kbps to 1.25 Mbps. The Router parameters can be stored in an external EEPROM with a maximum size of 2 KB. Customers will need to specify router parameters that are applicable for the external transceiver type used with the Router 5000. For a full router design, customers can use the same crystal and the same power supply to implement the clock and power supply needed for the two half-routers, which helps minimize the overall size needed to implement a full router. A Router 5000 can use one of four routing algorithms: Configured router, Learning router, Bridge or Repeater. The ability to choose these options allows the customer to trade off system performance for ease of installation. Configured and Learning routers fall into a class of routers known as intelligent routers, which use routing tables to selectively forward messages based on the destination address. A Bridge 1 forwards all valid packets that match its domains, whereas a Repeater forwards all valid packets. Configured routers are easily installed using an installation tool that calculates network topology and layer 4 timing parameters, such as the LonMaker® Integration Tool or an installation tool based on the LNS® network operating system. Usage A half-router consists of the Router 5000 chip and an external transceiver along with a crystal to generate the clock and an external memory to hold the router table. Any type of external transceiver can be used with the Router 5000, such as a TP/FT-10, TP-RS485, TP/XF78, TP/XF-1250 or LPT-11 transceiver. The Router 5000 is compatible with all LonWorks transceivers, including standard transceivers for free topology, link power, twisted pair, and power line. Using multiple communications media can minimize installation costs and increase system performance by allowing easily installed media, such as power line or link power, to be combined with media such as TP/XF-1250 twisted pair. The two half-routers of a full router are logically isolated so that a failure in one half-router will not affect the other. MOSI SCK MISO SCL VDD1V8 SDA_CS1~ VDD3V3 VDD3V3 CS0~ CP4 CP3 CP2 48 47 46 45 44 43 42 41 40 39 38 37 Router 5000 Pin Configuration Pin Name 1 36 GND IO0 2 35 NC IO1 3 34 CP1 IO2 4 33 AGND IO3 5 32 CP0 VDD1V8 6 31 AVDD3V3 IO4 7 30 VDD3V3 VDD3V3 8 29 VIN3V3 IO5 9 28 RST~ IO6 10 27 VOUT1V8 IO7 11 26 GNDPLL IO8 12 25 VDDPLL 13 14 15 16 17 18 19 20 21 22 23 24 IO9 IO10 IO11 VDD1V8 TRST~ VDD3V3 TCK TMS TDI TDO XIN XOUT Dashed line represents Pad (pin 49) Pad must be connected to GND Figure 2: Router 5000 Pinout Router 5000 Chip Pin Assignments Pin Name Figure 1: Block Diagram of a LONWORKS Router Based on the Router 5000 LonWorks application programs do not have to be modified to work with routers. Only the network configuration of a device has to be modified when a device is moved to the far side of a router. The required modifications to the network configuration can be done automatically by an installation tool. Routers are also independent of the network variables and message tags in a system, and can forward an unlimited number of them, which saves development cost because no code development is required to use routers in a system. It also saves installation and maintenance costs because router configuration is automatically managed by network server tools based on LNS Server. Monitoring and Control Applications, such as those based on the LCA Object Server OCX, do not require modifications to work with multi-channel networks when routers are used. All network configuration is performed over the installed network, further minimizing installation and maintenance costs because routers do not have to be physically accessed to change their configuration. Pin Number Type Description Service (active low) IO0 (side A to side B) IO1 (side A to side B) IO2 (side A to side B) IO3 (side A to side B) 1.8 V Power Input (from internal voltage regulator) IO4 (side A to side B) 3.3 V Power IO5 (side A to side B) IO6 (side A to side B) IO7 (side A to side B) IO8 (side A to side B) IO9 (side A to side B) IO10 (side A to side B) IO11 (not used for routers) 1.8 V Power Input (from internal voltage regulator) JTAG Test Reset (active low) 3.3 V Power SVC~ 1 Digital I/O IO0 2 Digital I/O IO1 3 Digital I/O IO2 4 Digital I/O IO3 5 Digital I/O VDD1V8 6 Power IO4 7 Digital I/O VDD3V3 8 Power IO5 9 Digital I/O IO6 10 Digital I/O IO7 11 Digital I/O IO8 12 Digital I/O IO9 13 Digital I/O IO10 14 Digital I/O IO11 15 Digital I/O VDD1V8 16 Power TRST~ 17 VDD3V3 18 TCK 19 Digital Input Power Digital Input 2 JTAG Test Clock Type Description JTAG Test Mode Select JTAG Test Data In JTAG Test Data Out Crystal oscillator Input Crystal oscillator Output 1.8 V Power Input (from internal voltage regulator) Ground 1.8 V Power Output (of internal voltage regulator) Reset (active low) 3.3 V Power Input 3.3 V Power 3.3 V Power CP0: Receive serial data Ground CP1: Transmit serial data Do Not Connect Ground CP2: External transceiver enable output CP3: Do Not Connect CP4: Collision detect input SPI slave select 0 (active low) 3.3 V Power 3.3 V Power I2C: serial data (SDA) SPI: slave select 1 (active low) 1.8 V Power Input (from internal voltage regulator) TMS 20 TDI 21 TDO 22 XIN 23 XOUT 24 Digital Input Digital Input Digital Output Oscillator In Oscillator Out VDDPLL 25 Power GNDPLL 26 Power VOUT1V8 27 Power RST~ VIN3V3 VDD3V3 AVDD3V3 28 29 30 31 CP0 32 AGND 33 CP1 34 NC GND 35 36 Digital I/O Power Power Power Communications Ground Communications N/A Ground CP2 37 Communications CP3 38 CP4 39 Communications Communications CS0~ 40 Digital I/O VDD3V3 VDD3V3 41 42 Power Power SDA_CS1~ 43 Digital I/O for Memory VDD1V8 44 Power SCL 45 MISO 46 SCK 47 MOSI 48 PAD 49 Digital I/O for Memory Digital I/O for Memory Digital I/O for Memory Digital I/O for Memory Ground Pad GND PAD SVC~ Router 5000 Pin Number I2C: serial clock SPI master input, slave output (MISO) SPI serial clock SPI master output, slave input (MOSI) Ground Table 1: Router 5000 Chip Pin Description Electrical Characteristics Router 5000 Operating Conditions Parameter1 Description Operating Humidity 25-90% RH @50°C, non-condensing. Minimum Typical Maximum Supply voltage 3.00 V Ambient TA -40° C temperature XIN clock fXIN frequency2 Current Tx consumption3 Current 5 – 80MHz Current consumption3 5MHz Rx 10MHz Current 20MHz 40MHz 80MHz 3.3 V 3.60 V VDD3 +85° C 10.000 MHz Rx current + 15 mA Rx current + 15 mA 9 mA 9 mA 15 mA 23 mA 38 mA 15 mA 15 mA 23 mA 33 mA 52 mA - Non-operating Humidity 95% RH @ 50°C, non-condensing. Reflow Soldering Temperature Profile Refer to Joint Industry Standard document IPC/JEDEC J-STD-020D.1 (March 2008). Peak Reflow Soldering Temperature 260°C Recommended Router 5000 Chip Pad Layout Table 2: Router 5000 Operating Conditions Notes 1. All parameters assume nominal supply voltage (VDD3 = 3.3 V ± 0.3 V) and operating temperature (TA between -40ºC and +85ºC), unless otherwise noted. 2. See Clock Requirements in the Series 5000 Chip Data Book for more detailed information about the XIN clock frequency. 3. Assumes no load on digital I/O pins, and that the I/O lines are not switching. SPECIFICATIONS Processor Neuron 5000 Processor Figure 4: Router 5000 Chip IC Mechanical Specifications Notes Figure 3: Router 5000 Chip Pad Layout Router 5000 Chip IC Mechanical Specification 1. All dimensions are in millimeters. 2. Dimensions and tolerances conform to ASME Y14.5M.-1994. 3. Package warpage max. 0.08 mm. 4. Package corners unless otherwise specified are R0.175±0.025 mm. ORDERING INFORMATION Router 5000 Chip 14315R-100 Processor Input Clock 10 MHz Operating Input Voltage 3.0 V DC to 3.6 V DC RoHS-Compliant The Router 5000 chip is compliant with the European Directive 2002/95/EC on the restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment. EMC Depends on network transceiver Transmission Speed Depends on network transceiver: 78 kbit/s for TP/FT-10 channel; 1250 kbit/s for TP/XF-1250 channel. (See EIA-485 channel specification for transmission speed characteristics.) Operating Temperature -40 to 85°C Copyright © 2007-2012, Echelon Corporation. Echelon, LonWorks, Neuron, 3120, 3150, and NodeBuilder are trademarks of Echelon Corporation registered in the United States and/or other countries. LonSupport is a trademark of Echelon Corporation. Other trademarks belong to their respective holders. Content subject to change without notice. P/N 003-0508-01A 3
14315R-100 价格&库存

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