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IRFU9220

IRFU9220

  • 厂商:

    L3HARRIS

  • 封装:

    TO-251-3

  • 描述:

    MOSFET P-CH 200V 3.6A TO251AA

  • 数据手册
  • 价格&库存
IRFU9220 数据手册
[ /Title (IRFR9 220, IRFU92 20) /Subject (3.6A, 200V, 1.500 Ohm, P-Channel Power MOSFETs) /Author () /Keywords (Harris Semiconductor, PChannel Power MOSFETs, TO251AA, TO252AA) /Creator () /DOCI IRFR9220, IRFU9220 Semiconductor 3.6A, 200V, 1.500 Ohm, P-Channel Power MOSFETs September 1998 Features Description • 3.6A, 200V These are advanced power MOSFETs designed, tested, and guaranteed to withstand a specific level of energy in the avalanche breakdown mode of operation. These are P-Channel enhancement-mode silicon gate power field-effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high-power bipolar switching transistors requiring high speed and low gate-drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 1.500Ω • Temperature Compensating PSPICE Model • Peak Current vs Pulse Width Curve • UIS Rating Curve • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Ordering Information PART NUMBER PACKAGE BRAND IRFR9220 TO-252AA IF9220 IRFU9220 TO-251AA IF9220 Formerly developmental type TA17502. Symbol D NOTE: When ordering use the entire part number. Add the suffix 9A to obtain the TO-252AA variant in tape and reel, e.g., IRFR92209A. G S Packaging JEDEC TO-251AA JEDEC TO-252AA SOURCE DRAIN GATE GATE SOURCE DRAIN (FLANGE) DRAIN (FLANGE) CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1998 6-1 File Number 4015.2 IRFR9220, IRFU9220 TC = 25oC, Unless Otherwise Specified Absolute Maximum Ratings Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Single Pulse Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg IRFR9220, IRFU9220 -200 -200 ±20 3.6 Refer to Peak Current Curve Refer to UIS Curve 42 0.33 -55 to 150 UNITS V V V A 300 260 oC oC W W/oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS Drain to Source Breakdown Voltage BVDSS Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Turn-On Time -200 - - V - -4.0 V - -25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 150oC - - -250 µA VGS = ±20V - - ±100 nA - - 1.500 Ω - - 50 ns - 8.8 - ns - 27 - ns td(OFF) - 7.3 - ns tf - 19 - ns tOFF - - 50 ns - 20 - nC IGSS rDS(ON) ID = 2.2A, VGS = -10V (Figure 9) td(ON) Fall Time Total Gate Charge UNITS - tr Turn-Off Time MAX -2.0 Rise Time Turn-Off Delay Time TYP VDS = Rated BVDSS, VGS = 0V IDSS tON Turn-On Delay Time ID = 250µA, VGS = 0V MIN VDD = -100V, ID = 3.9A RL = 24Ω, VGS = -10V RGS = 18Ω (Figures 13, 16, 17) Qg(TOT) VGS = 0 to -10V Gate to Drain Charge Qgd Gate to Source Charge Qgs Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient VDD = -160V, ID = 3.9A, RL = 41Ω IG(REF) = 1.45mA - 11 - nC - 3.3 - nC - 550 - pF - 110 - pF CRSS - 33 - pF RθJC - - 3.00 oC/W RθJA - - 100 oC/W MIN TYP MAX UNITS VDS = -25V, VGS = 0V, f = 1MHz (Figure 12) Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time Reverse Recovery Charge SYMBOL VSD trr TEST CONDITIONS ISD = -3.6A - - -6.3 V ISD = -3.6A, dISD/dt = -100A/µs - 150 300 ns 0.97 2.0 µC QRR NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 6-2 IRFR9220, IRFU9220 Typical Performance Curves Unless Otherwise Specified POWER DISSIPATION MULTIPLIER 1.2 -4 ID , DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 -3 -2 -1 0.2 0 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150 50 75 100 125 150 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE ZθJC , TRANSIENT THERMAL IMPEDANCE 25 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 0.5 1 0.2 0.1 PDM 0.05 0.1 t1 0.02 0.01 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 t1 , RECTANGULAR PULSE DURATION (s) 100 101 FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE -50 IDM , PEAK CURRENT CAPABILITY (A) -20 ID , DRAIN CURRENT (A) -10 100µs 1ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) -1 10ms 100ms DC TC = 25oC TJ = MAX RATED -0.1 -1 VDSS MAX = -200V -10 -100 VDS , DRAIN TO SOURCE VOLTAGE (V) FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS: -10 VGS = -10V TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION -1 10-5 -500 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA  150 – T C  I = I 25  -----------------------  125   VGS = -20V 10-4 10-3 10-2 10-1 t, PULSE WIDTH (s) TC = 25oC 100 FIGURE 5. PEAK CURRENT CAPABILITY 6-3 101 IRFR9220, IRFU9220 Typical Performance Curves Unless Otherwise Specified (Continued) -10 -5 STARTING TJ = 25oC STARTING TJ = 150oC If R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] -1 0.01 -3 VGS = -6V -2 PULSE DURATION = 250µs, TC = 25oC -1 VGS = -5V VGS = -4.5V 0 0.1 1 tAV , TIME IN AVALANCHE (ms) 0 10 NORMALIZED ON RESISTANCE -55oC 25oC -4 150oC -2 -2 -3 -4 -4.5 -6.0 -7.5 -5 -6 PULSE DURATION = 250µs VGS = -10V ID = -2.2A 2.0 1.5 1.0 0.5 0 -1 -3.0 FIGURE 7. SATURATION CHARACTERISTICS 2.5 PULSE DURATION = 250µs DUTY CYCLE = 0.5% MAX VDD = -15V 0 -1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) -8 -6 VGS = -7V VGS = -20V FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING IDS(ON), DRAIN TO SOURCE CURRENT (A) VGS = -10V -4 ID, DRAIN CURRENT (A) IAS , AVALANCHE CURRENT (A) VGS = -8V 0 -80 -7 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 2.0 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 2.0 NORMALIZED GATE THRESHOLD VOLTAGE VGS = VDS, ID = 250µA 1.5 1.0 0.5 0 -80 ID = 250µA 1.5 1.0 0.5 0 -80 -40 0 40 80 120 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs TEMPERATURE FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs TEMPERATURE 6-4 IRFR9220, IRFU9220 Typical Performance Curves Unless Otherwise Specified (Continued) VDS , DRAIN TO SOURCE VOLTAGE (V) -200 C, CAPACITANCE (pF) 600 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 400 300 COSS 100 CRSS 0 0 -10.0 VDD = BVDSS -8.0 -160 CISS 500 200 VDD = BVDSS -5 -10 -15 -20 VDS , DRAIN TO SOURCE VOLTAGE (V) -120 RL = 51Ω IG(REF) = -1.45mA VGS = -10V -80 0.75 BVDSS 0.75 BVDSS -6.0 -4.0 0.50 BVDSS 0.50 BVDSS 0.25 BVDSS 0.25 BVDSS -2.0 -40 0 -25 20 FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE IG(REF) t, TIME (µs) IG(ACT) 80 0.0 IG(REF) IG(ACT) NOTE: Refer to Application Notes AN7254 and AN7260. FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuits and Waveforms VDS tAV L 0 VARY tP TO OBTAIN REQUIRED PEAK IAS - RG + 0V VGS VDD DUT VDD tP IAS IAS VDS tP 0.01Ω BVDSS FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr 0 RL DUT VGS RG + 10% 10% VDS VDD tf VGS 0 90% 90% 10% 50% 50% PULSE WIDTH 90% FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS 6-5 VGS , GATE TO SOURCE VOLTAGE (V) 700 IRFR9220, IRFU9220 Test Circuits and Waveforms (Continued) -VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0 VDS DUT 12V BATTERY 0.2µF 50kΩ 0.3µF Qgs Qg(TOT) DUT G VGS Qgd D VDD 0 S Ig(REF) IG CURRENT SAMPLING RESISTOR 0 +VDS ID CURRENT SAMPLING RESISTOR Ig(REF) FIGURE 19. GATE CHARGE WAVEFORMS FIGURE 18. GATE CHARGE TEST CIRCUIT 6-6 IRFR9220, IRFU9220 PSPICE Electrical Model .SUBCKT IRFU9220 2 1 3 REV 9/6/94 CA 12 8 723e-12 CB 15 14 733e-12 CIN 6 8 517e-12 RLDRAIN DPLCAP 5 DRAIN 2 10 DBODY 5 7 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 6 DPLCAPMOD LDRAIN RSCL2 EBREAK 7 11 17 18 -244.4 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 5 10 8 6 1 EVTO 20 6 8 18 1 ESG + IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 2.609e-9 LSOURCE 3 7 2.609e-9 RLGATE + ESCL RDRAIN - 16 VTO + 21 6 11 + EBREAK 17 18 MOS2 DBODY MOS1 LGATE RIN CIN RLSOURCE MOS1 16 6 8 8 MOSMOD M=0.99 MOS2 16 21 8 8 MOSMOD M=0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 1.194 RGATE 9 20 2.17 RIN 6 8 1e9 RLDRAIN 2 5 10 RLGATE 1 9 26.09 RLSOURCE 3 7 26.09 RSCL1 5 51 RSCLMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 90.1e-3 RVTO 18 19 RVTOMOD 1 DBREAK 50 6 8 - 18 20 8 9 5 51 EVTO RGATE GATE 1 RSCL1 + 51 8 RSOURCE 7 3 SOURCE LSOURCE S1A 12 S2A 13 8 S1B 14 13 13 15 17 RBREAK S2B 18 RVTO CB CA IT + 6 EGS 8 - + EDS - 14 5 8 19 - VBAT + S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 -0.77 ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/4.6,6))} .MODEL DBDMOD D (IS=2.56e-14 RS=8.09e-2 TRS1=-2.45e-3 TRS2=-1.33e-5 CJO=4.21e-10 TT=1.17e-7) .MODEL DBKMOD D (RS=5.07 TRS1=-1.05e-3 TRS2=1.28e-5) .MODEL DPLCAPMOD D (CJO=170e-12 IS=1e-30 N=10) .MODEL MOSMOD PMOS (VTO=-3.58 KP=1.38 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=1.1e-3 TC2=-2.73e-6) .MODEL RDSMOD RES (TC1=6.95e-3 TC2=2.23e-5) .MODEL RSCLMOD RES (TC1=2.40e-3 TC2=-1.5e-5) .MODEL RVTOMOD RES (TC1=-3.27e-3 TC2=-1.33e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=5.29 VOFF=3.29) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=3.29 VOFF=5.29) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.1 VOFF=-4.9) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4.9 VOFF=0.1) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. 6-7
IRFU9220 价格&库存

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