TSM70N10CP ROG

TSM70N10 Taiwan Semiconductor N-Channel Power MOSFET 100V, 70A, 13mΩ FEATURES KEY PERFORMANCE PARAMETERS ● Low RDS(ON) to minimize conductive loss ● ● Low gate charge for fast power switching Compliant to RoHS directive 2011/65/EU and in accordance to WEEE 2002/96/EC Halogen-free according to IEC 61249-2-21 ● PARAMETER VALUE UNIT VDS 100 V RDS(on) (max) 13 mΩ Qg 145 nC ● Synchronous Rectifier in SMPS ● LED lighting application ● 48V Battery System TO-251S (IPAK SL) TO-252 (DPAK) mm TO-251 (IPAK) en de d APPLICATION Notes: MSL 3 (Moisture Sensitivity Level) per J-STD-020 eco ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage SYMBOL Limit UNIT VDS 100 V VGS ±20 V No tR TC = 25°C Continuous Drain Current (Note 3) TC = 70°C 70 ID TA = 25°C TA = 70°C Drain Current-Pulsed 61 12 A 9 (Note 1) IDM 150 A Avalanche Current, L=0.5mH IAS, IAR 25 A Avalanche Energy, L=0.5mH EAS, EAR 156 mJ TC = 25°C Maximum Power Dissipation (Note 2) 120 TC = 70°C ID TA = 25°C TA = 70°C 8.3 W 5.3 Storage Temperature Range Operating Junction Temperature Range Document Number: DS_P0000135 80 1 TSTG - 55 to +150 °C TJ - 55 to +150 °C Version: E15 TSM70N10 Taiwan Semiconductor THERMAL PERFORMANCE PARAMETER SYMBOL Limit UNIT Thermal Resistance – Junction to Case RӨJC 1 °C/W Thermal Resistance – Junction to Ambient RӨJA 40 °C/W ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT 100 -- -- V -- 10 13 mΩ Static VGS = 0V, ID = 250µA BVDSS Drain-Source On-State Resistance VGS = 10V, ID = 30A RDS(ON) Gate Threshold Voltage VDS = VGS, ID = 250µA VGS(TH) 2 3 4 V Zero Gate Voltage Drain Current VDS = 80V, VGS = 0V IDSS -- -- 1 µA Gate Body Leakage VGS = ±20V, VDS = 0V IGSS -- -- ±100 nA Qg -- 145 -- Qgs -- 25 -- Qgd -- 43 -- Ciss -- 4300 -- Coss -- 300 -- Crss -- 120 -- td(on) -- 27 -- tr -- 13 -- td(off) -- 15 -- tf -- 42 -- VGS = 0V, IS = 30A VSD -- 0.8 1.3 V Reverse Recovery Time IS = 30A, TJ = 25°C trr -- 165 -- ns Reverse Recovery Charge dIF/dt = 100A/μs Qrr -- 175 -- nC Total Gate Charge VGS = 10V Gate-Drain Charge Input Capacitance VDS = 30V, VGS = 0V, Output Capacitance VGS = 10V, VDS = 50V, RG = 3Ω, tR Turn-Off Delay Time f = 1.0MHz e co Reverse Transfer Capacitance Turn-On Rise Time mm VDS = 50V, ID = 30A, Gate-Source Charge Turn-On Delay Time de en Dynamic Switching d Drain-Source Breakdown Voltage Turn-Off Fall Time nC pF -- ns Source-Drain Diode No Forward On Voltage Notes: 1. Pulse Test: Pulse Width≦ 300μs, Duty Cycle≦2% 2. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined at the solder mounting surface of the drain pins. RθJA is guaranteed by design while RθCA is determined by the user’s board design. RθJA shown below for single device operation on FR-4PCB in still air. 3. The maximum current is limited by package. Document Number: DS_P0000135 2 Version: E15 TSM70N10 Taiwan Semiconductor ORDERING INFORMATION PACKAGE PACKING TO-252 (DPAK) 2,500pcs / 13” Reel TSM70N10CH C5G TO-251 (IPAK) 75pcs / Tube TSM70N10CH X0G TO-251S (IPAK SL) 75pcs / Tube No tR e co mm en de d PART NO. TSM70N10CP ROG Document Number: DS_P0000135 3 Version: E15 TSM70N10 Taiwan Semiconductor CHARACTERISTICS CURVES (TA = 25°C unless otherwise noted) Transfer Characteristics en de d Output Characteristics Gate Charge No tR e co mm On-Resistance vs. Gate-Source Voltage On-Resistance vs. Junction Temperature Document Number: DS_P0000135 Capacitance 4 Version: E15 TSM70N10 Taiwan Semiconductor CHARACTERISTICS CURVES (TA = 25°C unless otherwise noted) Maximum Safe Operating Area Threshold Voltage vs. Temperature mm en de d IDS=250µA No tR e co Normalized Thermal Transient Impedance, Junction-to-Ambient Document Number: DS_P0000135 5 Version: E15 TSM70N10 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) tR e co mm SUGGESTED PAD LAYOUT (Unit: Millimeters) en de d TO-252 MARKING DIAGRAM No Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000135 6 Version: E15 TSM70N10 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) en de d TO-251 mm MARKING DIAGRAM No tR e co Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000135 7 Version: E15 TSM70N10 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) en de d TO-251S mm MARKING DIAGRAM No tR e co Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000135 8 Version: E15 TSM70N10 No tR e co mm en de d Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. Document Number: DS_P0000135 9 Version: E15