TSM950N10CW RPG

TSM950N10CW Taiwan Semiconductor N-Channel Power MOSFET 100V, 6.5A, 95mΩ FEATURES ● ● ● ● KEY PERFORMANCE PARAMETERS Fast switching Pb-free plating RoHS compliant Halogen-free mold compound PARAMETER VALUE UNIT VDS 100 V RDS(on) (max) APPLICATION VGS = 10V 95 VGS = 4.5V 110 mΩ Qg ● Networking 9.3 nC ● Load Switch ● Lighting SOT-223 Note: MSL 3 (Moisture Sensitivity Level) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage VDS 100 V Gate-Source Voltage VGS ±20 V Continuous Drain Current Pulsed Drain Current (Note 1) TC = 25°C ID TC = 100°C (Note 2) 6.5 4.1 A IDM 26 A PDTOT 9 W TJ, TSTG - 55 to +150 °C SYMBOL LIMIT UNIT Junction to Case Thermal Resistance RӨJC 14 °C/W Junction to Ambient Thermal Resistance RӨJA 62 °C/W Total Power Dissipation @ TC = 25°C Operating Junction and Storage Temperature Range THERMAL PERFORMANCE PARAMETER Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined at the solder mounting surface of the drain pins. R ӨJC is guaranteed by design while RӨCA is determined by the user’s board design. RӨJA shown below for single device operation on FR-4 PCB in still air 1 Version: D1807 TSM950N10CW Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted) PARAMETER Static CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 3) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA BVDSS 100 -- -- V Gate Threshold Voltage VDS = VGS, ID = 250µA VGS(TH) 1.2 1.6 2.5 V Gate Body Leakage VGS = ±20V, VDS = 0V IGSS -- -- ±100 nA Zero Gate Voltage Drain Current VDS = 100V, VGS = 0V IDSS -- -- 1 µA -- 80 95 -- 85 110 Qg -- 9.3 -- Qgs -- 2.1 -- Qgd -- 1.8 -- Ciss -- 1480 -- Coss -- 480 -- Crss -- 35 -- Rg -- 1.3 -- td(on) -- 2.9 -- tr -- 9.5 -- td(off) -- 18.4 -- tf -- 5.3 -- VSD -- -- 1 V Continuous Drain-Source Diode IS -- -- 6.5 A Pulse Drain-Source Diode ISM -- -- 26 A Drain-Source On-State Resistance Dynamic VGS = 10V, ID = 5A VGS = 4.5V, ID = 3A RDS(on) mΩ (Note 4) Total Gate Charge VDS = 48V, ID = 5A, Gate-Source Charge VGS = 10V Gate-Drain Charge Input Capacitance VDS = 50V, VGS = 0V, Output Capacitance Reverse Transfer Capacitance Gate Resistance Switching f = 1.0MHz f = 1MHz, open drain nC pF Ω (Note 5) Turn-On Delay Time VDD = 30V, Turn-On Rise Time RGEN = 3.3Ω, Turn-Off Delay Time ID = 1A, VGS = 10V, Turn-Off Fall Time Source-Drain Diode ns (Note 3) Forward On Voltage IS = 3.3A, VGS = 0V Notes: 1. Current limited by package 2. Pulse width limited by the maximum junction temperature 3. Pulse test: PW ≤ 300µs, duty cycle ≤ 2% 4. For DESIGN AID ONLY, not subject to production testing. 5. Switching time is essentially independent of operating temperature. 2 Version: D1807 TSM950N10CW Taiwan Semiconductor ORDERING INFORMATION ORDERING CODE TSM950N10CW RPG PACKAGE PACKING SOT-223 2,500pcs / 13” Reel Note: 1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC 2. Halogen-free according to IEC 61249-2-21 definition 3 Version: D1807 TSM950N10CW Taiwan Semiconductor CHARACTERISTICS CURVES (TC = 25°C unless otherwise noted) Continuous Drain Current vs. T C Gate Charge 10 VGS, Gate to Source Voltage (V) ID, Continuous Drain Current (A) 8 6 4 2 0 25 50 75 100 125 ID=5A VDS=48V 8 6 4 2 0 150 0 2 4 TC, Case Temperature (°C) Normalized Gate Threshold Voltage Normalized On Resistance 1.8 1.5 1.2 0.9 0.6 50 100 150 1.3 1.1 0.9 0.7 0.5 -50 0 TJ, Junction Temperature (°C) 50 100 150 TJ, Junction Temperature (°C) Maximum Safe Operating Area Normalized Thermal Transient Impedance Curve 100 10 Normalized Effective Transient Thermal Impedance, ZӨJC ID, Drain Current (A) 10 Threshold Voltage vs. Junction Temperature 2.1 0 8 Qg, Gate Charge (nC) On-Resistance vs. Junction Temperature -50 6 RDS(ON) 10 1 SINGLE PULSE RӨJC=14°C/W TC=25°C 0.1 0.01 0.1 1 10 100 VDS, Drain to Source Voltage (V) SINGLE PULSE RӨJC=14°C/W 1 Duty=0.5 0.1 Notes: Duty = t1 / t2 TJ = TC + PDM x ZӨJC x RӨJC 0.01 0.0001 0.001 0.01 0.1 1 t, Square Wave Pulse Duration (sec) 4 Version: D1807 TSM950N10CW Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) SOT-223 SUGGESTED PAD LAYOUT (Unit: Millimeters) MARKING DIAGRAM 950N10 YML Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) 5 Version: D1807 TSM950N10CW Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. 6 Version: D1807