SY7065AQMC

SY7065/SY7065A 1.8V Minimum Input and 5. 5V Maximum Output 5A Peak Current Synchronous Boost with Output Disconnect General Description Features • • • • • • • • The SY7065/SY7065A is a high efficiency synchronous Boost regulator that converts down to 1.8V input and up to 5.5V output voltage. It adopts NMOS for the main switch and PMOS for the synchronous switch. It can disconnect the output from input during the shutdown mode. Ordering Information SY7065 □(□□)□ Temperature Code Package Code Optional Spec Code • Note ------- Applications 芯 Package type QFN2×2-10 QFN2×2-10 • All Single-cell Li or Dual-cell Battery Operated Products as MP-3 Player, PDAs, and Other Portable Equipment 半 导 小 Ordering Number SY7065QMC SY7065AQMC • 1.8V Minimum Input Voltage Adjustable Output Voltage from 2.5V to 5.5V 5A Peak Current Limit Input Under Voltage Lockout Load Disconnect during Shutdown Output Over Voltage Protection Input Battery Voltage Monitor Automatic Output Discharge at Shutdown:  SY7065: Auto Output Discharge Function  SY7065A: No Output Discharge Function Low RDS(ON) (Main Switch/Synchronous Switch) at 5.0V Output: 20/40mΩ Compact Package: QFN2×2-10 tia l-F or Typical Applications 96 LBO SVOUT C8 4.7uF VOUT=5V L1 1.5uH R3 300kΩ LX PVOUT R1 470kΩ LBI R4 50kΩ FB R2 EN PGND SGND 148.4kΩ C4 22uF C9 100uF Efficiency (%) fid en yC C2 22uF IN Sil erg C1 22uF 98 R5 100kΩ C6 1uF on VIN:1.8V~5.0V Efficiency vs. Load Current 100 94 92 90 88 VIN=2.0V,VOUT=5.0V VIN=3.3V,VOUT=5.0V VIN=4.2V,VOUT=5.0V 86 84 0.0 1.0 2.0 3.0 4.0 5.0 Load Current (A) Figure 1. Schematic Diagram SY7065/A Rev. 0.9B © 2020 Silergy Corp. Figure 2. Efficiency Figure Silergy Corp. Confidential- Prepared for Customer Use Only 1 All Rights Reserved. SY7065/SY7065A Pinout (top view) 10 9 8 7 FB LBO LBI EN PVOUT 1 2 LX 3 PGND SVOUT 6 IN 5 SGND 4 (QFN2×2-10) Top mark: RCxyz for SY7065 (Device code: RC, x=year code, y=week code, z= lot number code) VLxyz for SY7065A (Device code: VL, x=year code, y=week code, z=lot number code) Pin Name Pin Number PVOUT 1 LX PGND SGND IN 2 3 4 5 SVOUT 6 EN LBI LBO 7 8 9 FB 10 Description l-F or 半 导 小 芯 Power output pin. Decouple this pin to the GND pin with at least a 22μF ceramic capacitor. Inductor node. Connect an inductor between the IN pin and the LX pin. Power ground pin. Signal ground pin. Signal input pin. Signal output pin. Decouple this pin to the GND pin with at least a 4.7μF ceramic capacitor for noise immunity consideration. Enable pin. Internal integrated with a 1MΩ pull-down resistor. Low battery comparator input. Low battery comparator output (open-drain) . Feedback pin. Connect a resistor R1 between OUT and FB, and a resistor R2 between FB and GND to program the output voltage. VOUT=1.2V×(R1/R2+1). tia Block Diagram fid en LBI IN on 1.2V Ref LBO IN SVOUT IN yC Sil erg SVOUT PVOUT VCC Supply FB TG GM 1.2V Ref PWM Control Zc WELL SWITCH LX BG SGND Current Sense PGND EN Enable control Figure3. Block Diagram SY7065/A Rev. 0.9B © 2020 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 2 All Rights Reserved. SY7065/SY7065A Absolute Maximum Ratings (Note 1) EN------------------------------------------------------------------------------------------------------------------------- VOUT+0.3V Other Pins--------------------------------------------------------------------------------------------------------------------------- 6V Power Dissipation, PD@ TA=25°C QFN2×2-10---------------------------------------------------------------------------- 2.5W Package Thermal Resistance (Note 2) θ JA ----------------------------------------------------------------------------------------------------------------- 50°C/W θ JC ----------------------------------------------------------------------------------------------------------------- 10°C/W Junction Temperature Range ------------------------------------------------------------------------------------------------ 150°C Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------------ 260°C Storage Temperature Range ------------------------------------------------------------------------------------- -65°C to 150°C Recommended Operating Conditions (Note 3) Electrical Characteristics 芯 IN ---------------------------------------------------------------------------------------------------------------------- 1.8V to 5.25V PVOUT, SVOUT------------------------------------------------------------------------------------------------------ 2.5V to 5.5V EN -------------------------------------------------------------------------------------------- --------------------- 0V to VOUT+0.3V All other pins ------------------------------------------------------------------------------------------------------------------ 0-5.5V Junction Temperature Range ------------------------------------------------------------------------------------ -40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------- -40°C to 85°C Sil erg yC on fid en Soft-start Time Input VIN UVLO Threshold VIN UVLO Hysteresis EN Rising Threshold EN Falling Threshold LBI Voltage Threshold LBI Input Hysteresis Low Side Main FET RON Synchronous FET RON Main FET Current Limit Switching Frequency Feedback Reference Voltage Output Over Voltage Protection Minimum ON Time Minimum OFF Time Max ON Time Thermal Shutdown Temperature Thermal Shutdown Hysteresis Output Discharge Resistor SY7065/A Rev. 0.9B © 2020 Silergy Corp. 半 Symbol VIN VOUT IQ l-F or tia Linear Charge Current 导 小 (VIN =2.4V, VOUT=5V, IOUT=500mA, TA = 25°C unless otherwise specified) Parameter Input Voltage Output Voltage Range VIN Quiescent Current VOUT Shutdown Current ISHDN ICHARGE tSS VUVLO VHYS VENH VENL VLBI VLBI_HYS RDS(ON)1 RDS(ON)2 ILIM1 fsw VREF VOVP tON_MIN tOFF_MIN tON_MAX Test Conditions Min 1.8 2.5 Typ 10 27 0.1 1.2 1.0 1 Io=0A,VEN=VIN=1.8V, VOUT=5.0V VEN=0V, VIN=2.4V VOUT≤1V 1V