VBMB165R07

VBMB165R07 www.VBsemi.com /$IBOOFM
7
%4 Power MOSFET FEATURES PRODUCT SUMMARY • • • • • 0 VDS (V) at TJ max. RDS(on) max. at 25 °C (Ω) 1.1 VGS = 10 V  Qg max. (nC) Qgs (nC)  Qgd (nC)  APPLICATIONS Single Configuration Low figure-of-merit (FOM) Ron x Qg Low input capacitance (Ciss) Reduced switching and conduction losses Ultra low gate charge (Qg) Avalanche energy rated (UIS) • • • • Server and telecom power supplies Switch mode power supplies (SMPS) Power factor correction power supplies (PFC) Lighting - High-intensity discharge (HID) - Fluorescent ballast lighting • Industrial D TO-220 FULLPAK G S G D S N-Channel MOSFET Top View ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 650 Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Current a Single Pulse Avalanche Maximum Power Dissipation Operating Junction and Storage Temperature Range Drain-Source Voltage Slope TJ = 125 °C Reverse Diode dV/dt d Soldering Recommendations (Peak Temperature) c for 10 s V IDM 7.0 5.6 28 EAS   PD  W TJ, Tstg -55 to +150  °C ID Linear Derating Factor Energy b UNIT dV/dt  300 A W/°C mJ V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 3.5 A. c. 1.6 mm from case. d. ISD ≤ ID, dI/dt = 100 A/μs, starting TJ = 25 °C.  VBMB165R07 www.VBsemi.com THERMAL RESISTANCE RATINGS SYMBOL TYP. MAX. Maximum Junction-to-Ambient PARAMETER RthJA - 63 Maximum Junction-to-Case (Drain) RthJC - 0.6 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) VDS VGS = 0 V, ID = 250 μA 650 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.65 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.5 - 5 V VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA VDS = 650 V, VGS = 0 V - - 1 VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 10 - 1.1 - Ω  - S Gate-Source Leakage IGSS Zero Gate Voltage Drain Current IDSS Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 4 A gfs VDS = 30 V, ID = 4 A - Input Capacitance Ciss 860 - Coss - Crss - 120 15 - Reverse Transfer Capacitance VGS = 0 V, VDS = 100 V, f = 1 MHz - Output Capacitance Effective Output Capacitance, Energy Related a Co(er) - 45 - Effective Output Capacitance, Time Related b Co(tr) - 62 - - 25 - 2.0 2.7 Forward Transconductance μA Dynamic pF VDS = 0 V to 520 V, VGS = 0 V Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) VDD = 520 V, ID = 4 A, VGS = 10 V, Rg = 9.1 Ω - 25 55 - tr - 70 - - 40 - f = 1 MHz, open drain - 3.5 - - - 7 - - 18 TJ = 25 °C, IS = 4 A, VGS = 0 V - - 1.5 - 190 - ns TJ = 25 °C, IF = IS = 4 A, dI/dt = 100 A/μs, VR = 400 V - 2.3 - μC - 10 - A Rise Time Turn-Off Delay Time td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 4 A, VDS = 520 V - - nC - ns Ω Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S V Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS.  VBMB165R07 www.VBsemi.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 3 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 40 30 ID = 4 A TJ = 25 °C RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 50 20 10 2.5 2 1.5 1 VGS = 10 V 0.5 0 - 60 - 40 - 20 0 0 0 5 10 15 20 25 30 TJ, Junction Temperature (°C) Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature 1200 30 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V BOTTOM 6 V 20 TJ = 150 °C Ciss Capacitance (pF) ID, Drain-to-Source Current (A) TOP 25 20 40 60 80 100 120 140 160 VDS, Drain-to-Source Voltage (V) 15 10 600 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Coss 300 ġ Crss 10 ġ 5 5V 1 0 0 5 10 15 20 25 30 0 VDS, Drain-to-Source Voltage (V) 200 400 300 500 600 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 48 24 VGS, Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A) 100 40 32 16 TJ = 25 °C 8 TJ = 150 °C VDS = 30.8 V VDS = 520 V VDS = 325 V VDS = 130 V 20 16 12 8 4 0 0 0 5 10 15 20 25 0 20 40 60 80 100 VGS, Gate-to-Source Voltage (V) Qg, Total Gate Charge (nC) Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage  VBMB165R07 www.VBsemi.com 20 ISD, Reverse Drain Current (A) 100 ID, Drain Current (A) TJ = 150 °C TJ = 25 °C 10 1 15 10 5 VGS = 0 V 0 0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 25 1.6 VSD, Source-Drain Voltage (V) 75 100 125 150 TJ, Case Temperature (°C) Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Drain Current vs. Case Temperature 800 1000 Operation in this Area Limited by RDS(on) 10 100 μs Limited by RDS(on)* 1 1 ms 0.1 TC = 25 °C TJ = 150 °C Single Pulse BVDSS Limited 10 ms VDS, Drain-to-Source Breakdown Voltage (V) 775 IDM = Limited 100 750 725 700 675 650 625 0.01 600 - 60 - 40 - 20 0 1 10 100 1000 VDS - Drain -to-Source Voltage (V) * VGS > minimum V GS at which R DS(on) is specified 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 8 - Maximum Safe Operating Area Normalized Effective Transient Thermal Impedance ID, Drain Current (A) 50 Fig. 10 - Temperature vs. Drain-to-Source Voltage 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case 4 VBMB165R07 www.VBsemi.com RD VDS QG 10 V VGS D.U.T. RG QGS + - VDD QGD VG 10 V Pulse width ≤ 1 μs Duty factor ≤ 0.1 % Charge Fig. 12 - Switching Time Test Circuit Fig. 16 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. VDS 90 % 50 kΩ 12 V 0.2 μF 0.3 μF + 10 % VGS D.U.T. td(on) td(off) tf tr - VDS VGS 3 mA Fig. 13 - Switching Time Waveforms IG ID Current sampling resistors L Vary tp to obtain required IAS Fig. 17 - Gate Charge Test Circuit VDS D.U.T RG + - IAS V DD 10 V 0.01 Ω tp Fig. 14 - Unclamped Inductive Test Circuit VDS tp VDD VDS IAS Fig. 15 - Unclamped Inductive Waveforms  VBMB165R07 www.VBsemi.com Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer D.U.T. + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 18 - For N-Channel  VBMB165R07 www.VBsemi.com TO-220 FULLPAK (HIGH VOLTAGE) A E A1 ØP n d1 d3 D u L1 V L b3 A2 b2 c b e MILLIMETERS DIM. A A1 A2 b b2 b3 c D d1 d3 E e L L1 n ØP u v ECN: X09-0126-Rev. B, 26-Oct-09 DWG: 5972 MIN. 4.570 2.570 2.510 0.622 1.229 1.229 0.440 8.650 15.88 12.300 10.360 INCHES MAX. 4.830 2.830 2.850 0.890 1.400 1.400 0.629 9.800 16.120 12.920 10.630 MIN. 0.180 0.101 0.099 0.024 0.048 0.048 0.017 0.341 0.622 0.484 0.408 13.730 3.500 6.150 3.450 2.500 0.500 0.520 0.122 0.238 0.120 0.094 0.016 2.54 BSC 13.200 3.100 6.050 3.050 2.400 0.400 MAX. 0.190 0.111 0.112 0.035 0.055 0.055 0.025 0.386 0.635 0.509 0.419 0.100 BSC 0.541 0.138 0.242 0.136 0.098 0.020 Notes 1. To be used only for process drawing. 2. These dimensions apply to all TO-220, FULLPAK leadframe versions 3 leads. 3. All critical dimensions should C meet Cpk > 1.33. 4. All dimensions include burrs and plating thickness. 5. No chipping or package damage. 7 VBMB165R07 www.VBsemi.com Disclaimer All products due to improve reliability, function or design or for other reasons, product specifications and data are subject to change without notice. Taiwan VBsemi Electronics Co., Ltd., branches, agents, employees, and all persons acting on its or their representatives (collectively, the "Taiwan VBsemi"), assumes no responsibility for any errors, inaccuracies or incomplete data contained in the table or any other any disclosure of any information related to the product.(www.VBsemi.com) Taiwan VBsemi makes no guarantee, representation or warranty on the product for any particular purpose of any goods or continuous production. To the maximum extent permitted by applicable law on Taiwan VBsemi relinquished: (1) any application and all liability arising out of or use of any products; (2) any and all liability, including but not limited to special, consequential damages or incidental ; (3) any and all implied warranties, including a particular purpose, non-infringement and merchantability guarantee. Statement on certain types of applications are based on knowledge of the product is often used in a typical application of the general product VBsemi Taiwan demand that the Taiwan VBsemi of. Statement on whether the product is suitable for a particular application is non-binding. It is the customer's responsibility to verify specific product features in the products described in the specification is appropriate for use in a particular application. Parameter data sheets and technical specifications can be provided may vary depending on the application and performance over time. All operating parameters, including typical parameters must be made by customer's technical experts validated for each customer application. Product specifications do not expand or modify Taiwan VBsemi purchasing terms and conditions, including but not limited to warranty herein. Unless expressly stated in writing, Taiwan VBsemi products are not intended for use in medical, life saving, or life sustaining applications or any other application. Wherein VBsemi product failure could lead to personal injury or death, use or sale of products used in Taiwan VBsemi such applications using client did not express their own risk. Contact your authorized Taiwan VBsemi people who are related to product design applications and other terms and conditions in writing. The information provided in this document and the company's products without a license, express or implied, by estoppel or otherwise, to any intellectual property rights granted to the VBsemi act or document. Product names and trademarks referred to herein are trademarks of their respective representatives will be all. Material Category Policy Taiwan VBsemi Electronics Co., Ltd., hereby certify that all of the products are determined to be RoHS compliant and meets the definition of restrictions under Directive of the European Parliament 2011/65 / EU, 2011 Nian. 6. 8 Ri Yue restrict the use of certain hazardous substances in electrical and electronic equipment (EEE) - modification, unless otherwise specified as inconsistent.(www.VBsemi.com) Please note that some documents may still refer to Taiwan VBsemi RoHS Directive 2002/95 / EC. We confirm that all products identified as consistent with the Directive 2002/95 / EC European Directive 2011/65 /. Taiwan VBsemi Electronics Co., Ltd. hereby certify that all of its products comply identified as halogen-free halogen-free standards required by the JEDEC JS709A. Please note that some Taiwanese VBsemi documents still refer to the definition of IEC 61249-2-21, and we are sure that all products conform to confirm compliance with IEC 61249-2-21 standard level JS709A.