74AHC573-Q100;
74AHCT573-Q100
Octal D-type transparent latch; 3-state
Rev. 2 — 13 July 2020
Product data sheet
1. General description
The 74AHC573-Q100; 74AHCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs.
The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at
the inputs enter the latches. In this condition the latches are transparent, a latch output will change
each time its corresponding D-input changes. When LE is LOW the latches store the information
that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH
on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does
not affect the state of the latches. Inputs are overvoltage tolerant. This feature allows the use of
these devices as translators in mixed voltage environments.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
•
•
•
•
•
•
•
•
•
•
•
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 5.5 V
Balanced propagation delays
All inputs have Schmitt-trigger action
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
Common 3-state output enable input
Input levels:
• For 74AHC573-Q100: CMOS input level
• For 74AHCT573-Q100: TTL input level
ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of
solder joints
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
74AHC573D-Q100
Temperature range
Name
Description
Version
-40 °C to +125 °C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
-40 °C to +125 °C
TSSOP20
plastic thin shrink small outline package;
20 leads; body width 4.4 mm
SOT360-1
-40 °C to +125 °C
DHVQFN20 plastic dual in-line compatible
thermal enhanced very thin quad
flat package; no leads; 20 terminals;
body 2.5 × 4.5 × 0.85 mm
74AHCT573D-Q100
74AHC573PW-Q100
74AHCT573PW-Q100
74AHC573BQ-Q100
74AHCT573BQ-Q100
SOT764-1
4. Functional diagram
2
D0
Q0 19
3
D1
Q1 18
4
D2
Q2 17
5
D3
6
D4
7
D5
Q5 14
8
D6
Q6 13
9
D7
Q7 12
LATCH
1 to 8
3-STATE
OUTPUTS
Q3 16
Q4 15
11 LE
1 OE
mna809
Fig. 1.
Functional diagram
11
1
1
2
3
4
5
6
7
8
9
D0
OE
Logic symbol
74AHC_AHCT573_Q100
Product data sheet
Q0
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
LE
11
Fig. 2.
2
19
C1
EN1
19
1D
3
18
4
17
16
5
16
15
6
15
14
7
14
8
13
9
12
18
17
13
12
mna807
mna808
Fig. 3.
IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
©
Nexperia B.V. 2020. All rights reserved
2 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
D0
D1
D
Q
D2
D
Q
D3
D
Q
D4
D
Q
D5
D
Q
D6
D
Q
D7
D
Q
D
Q
LATCH
1
LATCH
2
LATCH
3
LATCH
4
LATCH
5
LATCH
6
LATCH
7
LATCH
8
LE LE
LE LE
LE LE
LE LE
LE LE
LE LE
LE LE
LE LE
LE
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
mna810
Fig. 4.
Logic diagram
5. Pinning information
5.1. Pinning
1
OE
terminal 1
index area
74AHC573
74AHCT573
D0
2
19 Q0
D1
3
18 Q1
D2
4
17 Q2
D3
5
16 Q3
OE
1
20 VCC
D4
6
15 Q4
D0
2
19 Q0
D1
3
18 Q1
D5
7
D2
4
17 Q2
D6
8
D3
5
16 Q3
D7
9
D4
6
15 Q4
D5
7
14 Q5
D6
8
13 Q6
D7
9
12 Q7
GND 10
11 LE
Product data sheet
13 Q6
LE 11
12 Q7
GND 10
Pin configuration SOT163-1 (SO20) and
SOT360-1 (TSSOP20)
74AHC_AHCT573_Q100
14 Q5
GND(1)
001aal532
Transparent top view
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
001aad099
Fig. 5.
20 VCC
74AHC573
74AHCT573
Fig. 6.
Pin configuration SOT764-1 (DHVQFN20)
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
©
Nexperia B.V. 2020. All rights reserved
3 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
OE
1
output enable input (active LOW)
D0 to D7
2, 3, 4, 5, 6, 7, 8, 9
data input
GND
10
ground (0 V)
LE
11
latch enable (active HIGH)
Q0 to Q7
19, 18, 17, 16, 15, 14, 13, 12
data output
VCC
20
supply voltage
6. Functional description
Table 3. Function table
H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level; l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
Z = high-impedance OFF-state.
Operating mode
Input
Enable and read register (transparent mode)
Latch and read register
Latch register and disable outputs
Internal latch
Output
OE
LE
Dn
L
H
L
L
L
H
H
H
l
L
L
h
H
H
l
L
Z
h
H
Z
L
L
H
L
Qn
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Min
Max
Unit
VCC
VI
supply voltage
-0.5
+7.0
V
input voltage
-0.5
+7.0
V
IIK
input clamping current
VI < -0.5 V
[1]
-20
-
mA
IOK
output clamping current
VO < -0.5 V or VO > VCC + 0.5 V
[1]
-20
+20
mA
IO
output current
VO = -0.5 V to (VCC + 0.5 V)
-25
+25
mA
ICC
IGND
supply current
-
+75
mA
ground current
-75
-
mA
Tstg
storage temperature
-65
+150
°C
Ptot
total power dissipation
-
500
mW
[1]
[2]
Conditions
Tamb = -40 °C to +125 °C
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SOT163-1 (SO20) package: Ptot derates linearly with 12.3 mW/K above 109 °C.
For SOT360-1 (TSSOP20) package: Ptot derates linearly with 10.0 mW/K above 100 °C.
For SOT764-1 (DHVQFN20) package: Ptot derates linearly with 12.9 mW/K above 111 °C.
74AHC_AHCT573_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
©
Nexperia B.V. 2020. All rights reserved
4 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
74AHC573-Q100
74AHCT573-Q100
Unit
Min
Typ
Max
Min
Typ
Max
2.0
5.0
5.5
4.5
5.0
5.5
V
VCC
supply voltage
VI
input voltage
0
-
5.5
0
-
5.5
V
VO
output voltage
0
-
VCC
0
-
VCC
V
Tamb
ambient temperature
-40
+25
+125
-40
+25
+125
°C
Δt/ΔV
input transition rise and VCC = 3.3 V ± 0.3 V
fall rate
VCC = 5.0 V ± 0.5 V
-
-
100
-
-
-
ns/V
-
-
20
-
-
20
ns/V
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
-40 °C to +85 °C
-40 °C to +125 °C
Min Typ
Unit
Min
Typ
Max
Min
Max
Max
VCC = 2.0 V
1.5
-
-
1.5
-
1.5
-
-
V
VCC = 3.0 V
2.1
-
-
2.1
-
2.1
-
-
V
VCC = 5.5 V
3.85
-
-
3.85
-
3.85
-
-
V
VCC = 2.0 V
-
-
0.5
-
0.5
-
-
0.5
V
VCC = 3.0 V
-
-
0.9
-
0.9
-
-
0.9
V
74AHC573-Q100
VIH
VIL
VOH
VOL
HIGH-level
input voltage
LOW-level
input voltage
VCC = 5.5 V
-
-
1.65
-
1.65
-
-
1.65
V
VI = VIH or VIL
HIGH-level
output voltage
IO = -50 μA; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
-
V
IO = -50 μA; VCC = 3.0 V
2.9
3.0
-
2.9
-
2.9
-
-
V
IO = -50 μA; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
-
V
IO = -4.0 mA; VCC = 3.0 V 2.58
-
-
2.48
-
2.40
-
-
V
IO = -8.0 mA; VCC = 4.5 V 3.94
-
-
3.80
-
3.70
-
-
V
VI = VIH or VIL
LOW-level
output voltage
IO = 50 μA; VCC = 2.0 V
-
0
0.1
-
0.1
-
-
0.1
V
IO = 50 μA; VCC = 3.0 V
-
0
0.1
-
0.1
-
-
0.1
V
IO = 50 μA; VCC = 4.5 V
-
0
0.1
-
0.1
-
-
0.1
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.36
-
0.44
-
-
0.55
V
IO = 8.0 mA; VCC = 4.5 V
-
-
0.36
-
0.44
-
-
0.55
V
±10.0 μA
IOZ
OFF-state
VI = VIH or VIL;
output current VO = VCC or GND;
VCC = 5.5 V
-
-
±0.25
-
±2.5
-
-
II
input leakage VI = VCC or GND;
current
VCC = 0 V to 5.5 V
-
-
0.1
-
1.0
-
-
2.0
μA
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
4.0
-
40
-
-
80
μA
74AHC_AHCT573_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
©
Nexperia B.V. 2020. All rights reserved
5 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
Symbol Parameter
CI
input
capacitance
CO
output
capacitance
Conditions
25 °C
VI = VCC or GND
-40 °C to +85 °C
-40 °C to +125 °C
Min Typ
Unit
Min
Typ
Max
Min
Max
Max
-
3
10
-
10
-
-
10
pF
-
4
-
-
-
-
-
10
pF
74AHCT573-Q100
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
2.0
-
2.0
-
-
V
VIL
LOW-level
input voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
-
0.8
-
-
0.8
V
VOH
VI = VIH or VIL; VCC = 4.5 V
HIGH-level
output voltage
IO = -50 μA
4.4
4.5
-
4.4
-
4.4
-
-
V
3.94
-
-
3.80
-
3.70
-
-
V
-
0
0.1
-
0.1
-
-
0.1
V
V
IO = -8.0 mA
VOL
VI = VIH or VIL; VCC = 4.5 V
LOW-level
output voltage
IO = 50 μA
-
-
0.36
-
0.44
-
-
0.55
IOZ
OFF-state
VI = VIH or VIL;
output current VO = VCC or GND;
VCC = 5.5 V
IO = 8.0 mA
-
-
±0.25
-
±2.5
-
-
±10.0 μA
II
input leakage VI = 5.5 V or GND;
current
VCC = 0 V to 5.5 V
-
-
0.1
-
1.0
-
-
2.0
μA
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
4.0
-
40
-
-
80
μA
ΔICC
additional
per input pin;
supply current VI = VCC - 2.1 V; IO = 0 A;
other pins at VCC or GND;
VCC = 4.5 V to 5.5 V
-
-
1.35
-
1.5
-
-
1.5
mA
CI
input
capacitance
-
3
10
-
10
-
-
10
pF
CO
output
capacitance
-
4
-
-
-
-
-
10
pF
74AHC_AHCT573_Q100
Product data sheet
VI = VCC or GND
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
©
Nexperia B.V. 2020. All rights reserved
6 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 11.
Symbol Parameter
Conditions
25 °C
Min
-40 °C to +85 °C
Typ[1] Max
-40 °C to +125 °C Unit
Min
Max
Min
Max
74AHC573-Q100
tpd
propagation
delay
Dn to Qn; see Fig. 7
[2]
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
5.5
11.0
1.0
13.0
1.0
14.0
ns
CL = 50 pF
-
7.8
14.5
1.0
16.5
1.0
18.5
ns
CL = 15 pF
-
3.9
6.8
1.0
8.0
1.0
8.5
ns
CL = 50 pF
-
5.5
8.8
1.0
10.0
1.0
11.0
ns
CL = 15 pF
-
5.8
11.9
1.0
14.0
1.0
15.0
ns
CL = 50 pF
-
8.3
15.4
1.0
17.5
1.0
19.5
ns
CL = 15 pF
-
4.2
7.7
1.0
9.0
1.0
10.0
ns
CL = 50 pF
-
5.9
9.7
1.0
11.0
1.0
12.5
ns
CL = 15 pF
-
5.8
11.5
1.0
13.5
1.0
14.5
ns
CL = 50 pF
-
8.3
15.0
1.0
17.0
1.0
19.0
ns
-
4.4
7.7
1.0
9.0
1.0
10.0
ns
-
6.3
9.7
1.0
11.0
1.0
12.5
ns
CL = 15 pF
-
6.8
11.0
1.0
13.0
1.0
14.0
ns
CL = 50 pF
-
9.7
14.5
1.0
16.5
1.0
18.5
ns
CL = 15 pF
-
4.6
7.7
1.0
9.0
1.0
10.0
ns
CL = 50 pF
-
7.4
9.7
1.0
11.0
1.0
12.5
ns
VCC = 3.0 V to 3.6 V
5.0
-
-
5.0
-
5.0
-
ns
VCC = 4.5 V to 5.5 V
5.0
-
-
5.0
-
5.0
-
ns
VCC = 3.0 V to 3.6 V
3.5
-
-
3.5
-
3.5
-
ns
VCC = 4.5 V to 5.5 V
3.5
-
-
3.5
-
3.5
-
ns
VCC = 3.0 V to 3.6 V
1.5
-
-
1.5
-
1.5
-
ns
VCC = 4.5 V to 5.5 V
1.5
-
-
1.5
-
1.5
-
ns
VCC = 4.5 V to 5.5 V
LE to Qn; see Fig. 8
[2]
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
ten
enable time
OE to Qn; see Fig. 9
[3]
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
CL = 15 pF
CL = 50 pF
tdis
disable time OE to Qn; see Fig. 9
[4]
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
tW
tsu
th
pulse width
set-up time
hold time
74AHC_AHCT573_Q100
Product data sheet
LE HIGH; see Fig. 8
Dn to LE; see Fig. 10
Dn to LE; see Fig. 10
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Rev. 2 — 13 July 2020
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Nexperia B.V. 2020. All rights reserved
7 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
Symbol Parameter
Conditions
25 °C
Min
CPD
power
fi = 1 MHz;
dissipation
VI = GND to VCC
capacitance
[5]
-40 °C to +85 °C
Typ[1] Max
-40 °C to +125 °C Unit
Min
Max
Min
Max
-
12
-
-
-
-
-
pF
CL = 15 pF
-
3.5
5.5
1
6.5
1
7.0
ns
CL = 50 pF
-
4.9
7.5
1
8.5
1
9.5
ns
CL = 15 pF
-
3.9
6.0
1
7.0
1
7.5
ns
CL = 50 pF
-
5.5
8.5
1
9.5
1
11.0
ns
CL = 15 pF
-
4.1
6.5
1
7.5
1
8.5
ns
CL = 50 pF
-
5.9
8.5
1
10.0
1
11.0
ns
-
4.5
6.5
1
7.5
1
8.5
ns
74AHCT573-Q100; VCC = 4.5 V to 5.5 V
tpd
propagation
delay
Dn to Qn; see Fig. 7
[2]
LE to Qn; see Fig. 8
ten
enable time
[2]
OE to Qn; see Fig. 9
[3]
disable time OE to Qn; see Fig. 9
tdis
[4]
CL = 15 pF
-
6.4
9.0
1
10.0
1
11.5
ns
tW
pulse width
LE HIGH; see Fig. 8
CL = 50 pF
5.0
-
-
5.0
-
5.0
-
ns
tsu
set-up time
Dn to LE; see Fig. 10
3.5
-
-
3.5
-
3.5
-
ns
th
hold time
Dn to LE; see Fig. 10
1.5
-
-
1.5
-
1.5
-
ns
CPD
power
fi = 1 MHz;
dissipation
VI = GND to VCC
capacitance
-
18
-
-
-
-
-
pF
[1]
[2]
[3]
[4]
[5]
[5]
Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
tpd is the same as tPHL and tPLH.
ten is the same as tPZH and tPZL.
tdis is the same as tPHZ and tPLZ.
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD x VCC x fi x N + Σ(CL x VCC x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
2
Σ(CL x VCC x fo) = sum of the outputs.
10.1. Waveforms and test circuit
VI
VM
Dn input
GND
tPLH
tPHL
VOH
VM
Qn output
mna811
VOL
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 7.
Data input to output propagation delays
74AHC_AHCT573_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
©
Nexperia B.V. 2020. All rights reserved
8 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
1/fmax
VI
LE input
VM
GND
tW
t PHL
t PLH
VOH
VM
Qn output
VOL
mna812
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 8.
Latch enable input to output propagation delays
VI
OE input
VM
GND
t PLZ
Qn output
LOW-to-OFF
OFF-to-LOW
t PZL
VCC
VM
VX
VOL
t PZH
t PHZ
Qn output
HIGH-to-OFF
OFF-to-HIGH
VOH
VY
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
mna813
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 9.
Enable and disable times
74AHC_AHCT573_Q100
Product data sheet
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Rev. 2 — 13 July 2020
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Nexperia B.V. 2020. All rights reserved
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Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
VI
VM
Dn input
GND
th
th
t su
t su
VI
LE input
VM
GND
mna814
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
The shaded areas indicate when the input is permitted to change for predicable output performance.
Fig. 10. Data set-up and hold times
Table 8. Measurement points
Input
Type
Output
VM
VM
VX
VY
74AHC573-Q100
0.5 x VCC
0.5 x VCC
VOL + 0.3 V
VOH - 0.3 V
74AHCT573-Q100
1.5 V
0.5 x VCC
VOL + 0.3 V
VOH - 0.3 V
VI
negative
pulse
tW
90 %
VM
0V
VI
positive
pulse
0V
VM
10 %
tf
tr
tr
tf
90 %
VM
VM
10 %
tW
VCC
VI
G
DUT
VCC
VO
RT
RL
S1
open
CL
001aad983
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
RL = load resistance.
S1 = test selection switch.
Fig. 11. Test circuit for measuring switching times
Table 9. Test data
Type
Input
Load
S1 position
VI
tr, tf
CL
RL
tPHL, tPLH
tPZH, tPHZ
tPZL, tPLZ
74AHC573-Q100
VCC
≤ 3.0 ns
15 pF, 50 pF
1 kΩ
open
GND
VCC
74AHCT573-Q100
3.0 V
≤ 3.0 ns
15 pF, 50 pF
1 kΩ
open
GND
VCC
74AHC_AHCT573_Q100
Product data sheet
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Rev. 2 — 13 July 2020
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10 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
11. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
HE
v M A
Z
20
11
Q
A2
A
(A 3 )
A1
pin 1 index
θ
Lp
L
1
10
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.1
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.05
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT163-1
075E04
MS-013
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig. 12. Package outline SOT163-1 (SO20)
74AHC_AHCT573_Q100
Product data sheet
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©
Nexperia B.V. 2020. All rights reserved
11 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
D
SOT360-1
E
A
X
c
HE
y
v M A
Z
11
20
Q
A2
pin 1 index
(A 3 )
A1
A
θ
Lp
1
L
10
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.5
0.2
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT360-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-153
Fig. 13. Package outline SOT360-1 (TSSOP20)
74AHC_AHCT573_Q100
Product data sheet
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Rev. 2 — 13 July 2020
©
Nexperia B.V. 2020. All rights reserved
12 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm
B
D
SOT764-1
A
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
e1
C
e
b
2
9
v
w
C A B
C
y1 C
y
L
1
10
Eh
e
20
11
19
12
X
Dh
0
2.5
5 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
A(1)
A1
b
max 1.00 0.05 0.30
nom 0.90 0.02 0.25
min 0.80 0.00 0.18
c
D(1)
Dh
E(1)
Eh
e
e1
L
v
0.2
4.6
4.5
4.4
3.15
3.00
2.85
2.6
2.5
2.4
1.15
1.00
0.85
0.5
3.5
0.5
0.4
0.3
0.1
w
y
0.05 0.05
y1
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References
Outline
version
IEC
JEDEC
JEITA
SOT764-1
---
MO-241
---
sot764-1_po
European
projection
Issue date
03-01-27
14-12-12
Fig. 14. Package outline SOT764-1 (DHVQFN20)
74AHC_AHCT573_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
©
Nexperia B.V. 2020. All rights reserved
13 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
12. Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
MIL
Military
TTL
Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID
Release date
74AHC_AHCT573_Q100 v.2 20200713
Modifications:
•
•
•
•
•
•
Product data sheet
Change notice
Supersedes
Product data sheet
-
74AHC_AHCT573_Q100 v.1
The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Section 1 and Section 2 updated.
Table 4: Derating values for Ptot total power dissipation have been updated.
Table 6: Conditions for IOZ corrected.
Package outline drawing of SOT764-1 (Fig. 14) updated.
74AHC_AHCT573_Q100 v.1 20130610
74AHC_AHCT573_Q100
Data sheet status
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
-
©
Nexperia B.V. 2020. All rights reserved
14 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
74AHC_AHCT573_Q100
Product data sheet
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Rev. 2 — 13 July 2020
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Nexperia B.V. 2020. All rights reserved
15 / 16
Nexperia
74AHC573-Q100; 74AHCT573-Q100
Octal D-type transparent latch; 3-state
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description............................................................. 4
6. Functional description................................................. 4
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................5
9. Static characteristics....................................................5
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit........................................ 8
11. Package outline........................................................ 11
12. Abbreviations............................................................ 14
13. Revision history........................................................14
14. Legal information......................................................15
©
Nexperia B.V. 2020. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 13 July 2020
74AHC_AHCT573_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 July 2020
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Nexperia B.V. 2020. All rights reserved
16 / 16